From b6148757f9baa2de11304c09aaf9f9a276c825cd Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Marc-Andr=C3=A9=20Lureau?= Date: Tue, 15 Jan 2019 02:27:49 +0400 Subject: tpm: add a "ppi" boolean property MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The following patches implement the TPM Physical Presence Interface, make use of a new memory region and a fw_cfg entry. Enable PPI by default with >=4.0 machine type, to avoid migration issues. Signed-off-by: Marc-André Lureau Reviewed-by: Igor Mammedov Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Michael S. Tsirkin Tested-by: Stefan Berger Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin --- hw/core/machine.c | 2 ++ 1 file changed, 2 insertions(+) (limited to 'hw/core') diff --git a/hw/core/machine.c b/hw/core/machine.c index f0c0ae6..2629515 100644 --- a/hw/core/machine.c +++ b/hw/core/machine.c @@ -28,6 +28,8 @@ GlobalProperty hw_compat_3_1[] = { { "pcie-root-port", "x-width", "1" }, { "memory-backend-file", "x-use-canonical-path-for-ramblock-id", "true" }, { "memory-backend-memfd", "x-use-canonical-path-for-ramblock-id", "true" }, + { "tpm-crb", "ppi", "false" }, + { "tpm-tis", "ppi", "false" }, }; const size_t hw_compat_3_1_len = G_N_ELEMENTS(hw_compat_3_1); -- cgit v1.1