From 8279e04257de022f40e8aaf2c9b6e55a33c10b26 Mon Sep 17 00:00:00 2001 From: Peter Maydell Date: Wed, 4 Jul 2012 10:50:58 +0000 Subject: hw/cadence_gem: Make rx_desc_addr and tx_desc_addr uint32_t Make the state fields rx_desc_addr and tx_desc_addr uint32_t; this matches the VMStateDescription, and also conforms to how hardware works: the registers don't magically become larger if the device is attached to a CPU with a larger physical address size. It also fixes a compile failure if the target_phys_addr_t type is changed to 64 bits. Signed-off-by: Peter Maydell Reviewed-by: Peter A. G. Crosthwaite --- hw/cadence_gem.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'hw/cadence_gem.c') diff --git a/hw/cadence_gem.c b/hw/cadence_gem.c index dbde392..87143ca 100644 --- a/hw/cadence_gem.c +++ b/hw/cadence_gem.c @@ -339,8 +339,8 @@ typedef struct { uint8_t phy_loop; /* Are we in phy loopback? */ /* The current DMA descriptor pointers */ - target_phys_addr_t rx_desc_addr; - target_phys_addr_t tx_desc_addr; + uint32_t rx_desc_addr; + uint32_t tx_desc_addr; } GemState; -- cgit v1.1