From d6b55a0fe9920b46d380f50d7da48ff43de21324 Mon Sep 17 00:00:00 2001 From: Arnaud Minier Date: Sun, 3 Mar 2024 15:06:36 +0100 Subject: hw/misc/stm32l4x5_rcc: Implement STM32L4x5_RCC skeleton MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Add the necessary files to add a simple RCC implementation with just reads from and writes to registers. Also instantiate the RCC in the STM32L4x5_SoC. It is needed for accurate emulation of all the SoC clocks and timers. Signed-off-by: Arnaud Minier Signed-off-by: Inès Varhol Acked-by: Alistair Francis Reviewed-by: Peter Maydell Message-id: 20240303140643.81957-2-arnaud.minier@telecom-paris.fr Signed-off-by: Peter Maydell --- hw/arm/Kconfig | 1 + hw/arm/stm32l4x5_soc.c | 12 +++++++++++- 2 files changed, 12 insertions(+), 1 deletion(-) (limited to 'hw/arm') diff --git a/hw/arm/Kconfig b/hw/arm/Kconfig index 3c15737..d58d820 100644 --- a/hw/arm/Kconfig +++ b/hw/arm/Kconfig @@ -475,6 +475,7 @@ config STM32L4X5_SOC select OR_IRQ select STM32L4X5_SYSCFG select STM32L4X5_EXTI + select STM32L4X5_RCC config XLNX_ZYNQMP_ARM bool diff --git a/hw/arm/stm32l4x5_soc.c b/hw/arm/stm32l4x5_soc.c index d1786e0..cb14705 100644 --- a/hw/arm/stm32l4x5_soc.c +++ b/hw/arm/stm32l4x5_soc.c @@ -76,6 +76,8 @@ static const int exti_irq[NUM_EXTI_IRQ] = { -1, -1, -1, -1, /* PVM[1..4] OR gate 1 */ 78 /* LCD wakeup, Direct */ }; +#define RCC_BASE_ADDRESS 0x40021000 +#define RCC_IRQ 5 static const int exti_or_gates_out[NUM_EXTI_OR_GATES] = { 23, 40, 63, 1, @@ -107,6 +109,7 @@ static void stm32l4x5_soc_initfn(Object *obj) TYPE_OR_IRQ); } object_initialize_child(obj, "syscfg", &s->syscfg, TYPE_STM32L4X5_SYSCFG); + object_initialize_child(obj, "rcc", &s->rcc, TYPE_STM32L4X5_RCC); s->sysclk = qdev_init_clock_in(DEVICE(s), "sysclk", NULL, NULL, 0); s->refclk = qdev_init_clock_in(DEVICE(s), "refclk", NULL, NULL, 0); @@ -244,6 +247,14 @@ static void stm32l4x5_soc_realize(DeviceState *dev_soc, Error **errp) qdev_get_gpio_in(DEVICE(&s->exti), i)); } + /* RCC device */ + busdev = SYS_BUS_DEVICE(&s->rcc); + if (!sysbus_realize(busdev, errp)) { + return; + } + sysbus_mmio_map(busdev, 0, RCC_BASE_ADDRESS); + sysbus_connect_irq(busdev, 0, qdev_get_gpio_in(armv7m, RCC_IRQ)); + /* APB1 BUS */ create_unimplemented_device("TIM2", 0x40000000, 0x400); create_unimplemented_device("TIM3", 0x40000400, 0x400); @@ -306,7 +317,6 @@ static void stm32l4x5_soc_realize(DeviceState *dev_soc, Error **errp) create_unimplemented_device("DMA1", 0x40020000, 0x400); create_unimplemented_device("DMA2", 0x40020400, 0x400); /* RESERVED: 0x40020800, 0x800 */ - create_unimplemented_device("RCC", 0x40021000, 0x400); /* RESERVED: 0x40021400, 0xC00 */ create_unimplemented_device("FLASH", 0x40022000, 0x400); /* RESERVED: 0x40022400, 0xC00 */ -- cgit v1.1