From b0c966661e9fcdf48bb736414df8230ab2a2da9d Mon Sep 17 00:00:00 2001 From: Niek Linnenbank Date: Wed, 11 Mar 2020 23:18:38 +0100 Subject: hw/arm: add Xunlong Orange Pi PC machine MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The Xunlong Orange Pi PC is an Allwinner H3 System on Chip based embedded computer with mainline support in both U-Boot and Linux. The board comes with a Quad Core Cortex A7 @ 1.3GHz, 1GiB RAM, 100Mbit ethernet, USB, SD/MMC, USB, HDMI and various other I/O. This commit add support for the Xunlong Orange Pi PC machine. Signed-off-by: Niek Linnenbank Tested-by: KONRAD Frederic Tested-by: Philippe Mathieu-Daudé Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Alex Bennée Acked-by: Igor Mammedov Message-id: 20200311221854.30370-3-nieklinnenbank@gmail.com Signed-off-by: Peter Maydell --- hw/arm/orangepi.c | 92 +++++++++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 92 insertions(+) create mode 100644 hw/arm/orangepi.c (limited to 'hw/arm/orangepi.c') diff --git a/hw/arm/orangepi.c b/hw/arm/orangepi.c new file mode 100644 index 0000000..3fcec19 --- /dev/null +++ b/hw/arm/orangepi.c @@ -0,0 +1,92 @@ +/* + * Orange Pi emulation + * + * Copyright (C) 2019 Niek Linnenbank + * + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see . + */ + +#include "qemu/osdep.h" +#include "qemu/units.h" +#include "exec/address-spaces.h" +#include "qapi/error.h" +#include "cpu.h" +#include "hw/sysbus.h" +#include "hw/boards.h" +#include "hw/qdev-properties.h" +#include "hw/arm/allwinner-h3.h" +#include "sysemu/sysemu.h" + +static struct arm_boot_info orangepi_binfo = { + .nb_cpus = AW_H3_NUM_CPUS, +}; + +static void orangepi_init(MachineState *machine) +{ + AwH3State *h3; + + /* BIOS is not supported by this board */ + if (bios_name) { + error_report("BIOS not supported for this machine"); + exit(1); + } + + /* This board has fixed size RAM */ + if (machine->ram_size != 1 * GiB) { + error_report("This machine can only be used with 1GiB of RAM"); + exit(1); + } + + /* Only allow Cortex-A7 for this board */ + if (strcmp(machine->cpu_type, ARM_CPU_TYPE_NAME("cortex-a7")) != 0) { + error_report("This board can only be used with cortex-a7 CPU"); + exit(1); + } + + h3 = AW_H3(object_new(TYPE_AW_H3)); + object_property_add_child(OBJECT(machine), "soc", OBJECT(h3), + &error_abort); + object_unref(OBJECT(h3)); + + /* Setup timer properties */ + object_property_set_int(OBJECT(h3), 32768, "clk0-freq", + &error_abort); + object_property_set_int(OBJECT(h3), 24 * 1000 * 1000, "clk1-freq", + &error_abort); + + /* Mark H3 object realized */ + object_property_set_bool(OBJECT(h3), true, "realized", &error_abort); + + /* SDRAM */ + memory_region_add_subregion(get_system_memory(), h3->memmap[AW_H3_SDRAM], + machine->ram); + + orangepi_binfo.loader_start = h3->memmap[AW_H3_SDRAM]; + orangepi_binfo.ram_size = machine->ram_size; + arm_load_kernel(ARM_CPU(first_cpu), machine, &orangepi_binfo); +} + +static void orangepi_machine_init(MachineClass *mc) +{ + mc->desc = "Orange Pi PC"; + mc->init = orangepi_init; + mc->min_cpus = AW_H3_NUM_CPUS; + mc->max_cpus = AW_H3_NUM_CPUS; + mc->default_cpus = AW_H3_NUM_CPUS; + mc->default_cpu_type = ARM_CPU_TYPE_NAME("cortex-a7"); + mc->default_ram_size = 1 * GiB; + mc->default_ram_id = "orangepi.ram"; +} + +DEFINE_MACHINE("orangepi-pc", orangepi_machine_init) -- cgit v1.1 From 6556617ce1a3c4a2ad91e5c5d1c936ee9134ed04 Mon Sep 17 00:00:00 2001 From: Niek Linnenbank Date: Wed, 11 Mar 2020 23:18:43 +0100 Subject: hw/arm/allwinner: add Security Identifier device MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The Security Identifier device found in various Allwinner System on Chip designs gives applications a per-board unique identifier. This commit adds support for the Allwinner Security Identifier using a 128-bit UUID value as input. Signed-off-by: Niek Linnenbank Reviewed-by: Alex Bennée Message-id: 20200311221854.30370-8-nieklinnenbank@gmail.com Signed-off-by: Peter Maydell --- hw/arm/orangepi.c | 8 ++++++++ 1 file changed, 8 insertions(+) (limited to 'hw/arm/orangepi.c') diff --git a/hw/arm/orangepi.c b/hw/arm/orangepi.c index 3fcec19..4047c4c 100644 --- a/hw/arm/orangepi.c +++ b/hw/arm/orangepi.c @@ -65,6 +65,14 @@ static void orangepi_init(MachineState *machine) object_property_set_int(OBJECT(h3), 24 * 1000 * 1000, "clk1-freq", &error_abort); + /* Setup SID properties. Currently using a default fixed SID identifier. */ + if (qemu_uuid_is_null(&h3->sid.identifier)) { + qdev_prop_set_string(DEVICE(h3), "identifier", + "02c00081-1111-2222-3333-000044556677"); + } else if (ldl_be_p(&h3->sid.identifier.data[0]) != 0x02c00081) { + warn_report("Security Identifier value does not include H3 prefix"); + } + /* Mark H3 object realized */ object_property_set_bool(OBJECT(h3), true, "realized", &error_abort); -- cgit v1.1 From 82e4838249b23c3fe20cee295f9c1b3e6abd68d1 Mon Sep 17 00:00:00 2001 From: Niek Linnenbank Date: Wed, 11 Mar 2020 23:18:44 +0100 Subject: hw/arm/allwinner: add SD/MMC host controller MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The Allwinner System on Chip families sun4i and above contain an integrated storage controller for Secure Digital (SD) and Multi Media Card (MMC) interfaces. This commit adds support for the Allwinner SD/MMC storage controller with the following emulated features: * DMA transfers * Direct FIFO I/O * Short/Long format command responses * Auto-Stop command (CMD12) * Insert & remove card detection The following boards are extended with the SD host controller: * Cubieboard (hw/arm/cubieboard.c) * Orange Pi PC (hw/arm/orangepi.c) Signed-off-by: Niek Linnenbank Reviewed-by: Alex Bennée Tested-by: Philippe Mathieu-Daudé Message-id: 20200311221854.30370-9-nieklinnenbank@gmail.com Signed-off-by: Peter Maydell --- hw/arm/orangepi.c | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) (limited to 'hw/arm/orangepi.c') diff --git a/hw/arm/orangepi.c b/hw/arm/orangepi.c index 4047c4c..e7ac7b1 100644 --- a/hw/arm/orangepi.c +++ b/hw/arm/orangepi.c @@ -35,6 +35,10 @@ static struct arm_boot_info orangepi_binfo = { static void orangepi_init(MachineState *machine) { AwH3State *h3; + DriveInfo *di; + BlockBackend *blk; + BusState *bus; + DeviceState *carddev; /* BIOS is not supported by this board */ if (bios_name) { @@ -76,6 +80,16 @@ static void orangepi_init(MachineState *machine) /* Mark H3 object realized */ object_property_set_bool(OBJECT(h3), true, "realized", &error_abort); + /* Retrieve SD bus */ + di = drive_get_next(IF_SD); + blk = di ? blk_by_legacy_dinfo(di) : NULL; + bus = qdev_get_child_bus(DEVICE(h3), "sd-bus"); + + /* Plug in SD card */ + carddev = qdev_create(bus, TYPE_SD_CARD); + qdev_prop_set_drive(carddev, "drive", blk, &error_fatal); + object_property_set_bool(OBJECT(carddev), true, "realized", &error_fatal); + /* SDRAM */ memory_region_add_subregion(get_system_memory(), h3->memmap[AW_H3_SDRAM], machine->ram); @@ -89,6 +103,8 @@ static void orangepi_machine_init(MachineClass *mc) { mc->desc = "Orange Pi PC"; mc->init = orangepi_init; + mc->block_default_type = IF_SD; + mc->units_per_default_bus = 1; mc->min_cpus = AW_H3_NUM_CPUS; mc->max_cpus = AW_H3_NUM_CPUS; mc->default_cpus = AW_H3_NUM_CPUS; -- cgit v1.1 From 29d08975d1cc2ec668d9eb430c507a4fee515ea5 Mon Sep 17 00:00:00 2001 From: Niek Linnenbank Date: Wed, 11 Mar 2020 23:18:45 +0100 Subject: hw/arm/allwinner-h3: add EMAC ethernet device MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The Allwinner Sun8i System on Chip family includes an Ethernet MAC (EMAC) which provides 10M/100M/1000M Ethernet connectivity. This commit adds support for the Allwinner EMAC from the Sun8i family (H2+, H3, A33, etc), including emulation for the following functionality: * DMA transfers * MII interface * Transmit CRC calculation Signed-off-by: Niek Linnenbank Reviewed-by: Alex Bennée Message-id: 20200311221854.30370-10-nieklinnenbank@gmail.com Signed-off-by: Peter Maydell --- hw/arm/orangepi.c | 3 +++ 1 file changed, 3 insertions(+) (limited to 'hw/arm/orangepi.c') diff --git a/hw/arm/orangepi.c b/hw/arm/orangepi.c index e7ac7b1..d65bbf8 100644 --- a/hw/arm/orangepi.c +++ b/hw/arm/orangepi.c @@ -77,6 +77,9 @@ static void orangepi_init(MachineState *machine) warn_report("Security Identifier value does not include H3 prefix"); } + /* Setup EMAC properties */ + object_property_set_int(OBJECT(&h3->emac), 1, "phy-addr", &error_abort); + /* Mark H3 object realized */ object_property_set_bool(OBJECT(h3), true, "realized", &error_abort); -- cgit v1.1 From a80beb160d4e89937b0afccb146a9f3247f88588 Mon Sep 17 00:00:00 2001 From: Niek Linnenbank Date: Wed, 11 Mar 2020 23:18:46 +0100 Subject: hw/arm/allwinner-h3: add Boot ROM support MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit A real Allwinner H3 SoC contains a Boot ROM which is the first code that runs right after the SoC is powered on. The Boot ROM is responsible for loading user code (e.g. a bootloader) from any of the supported external devices and writing the downloaded code to internal SRAM. After loading the SoC begins executing the code written to SRAM. This commits adds emulation of the Boot ROM firmware setup functionality by loading user code from SD card in the A1 SRAM. While the A1 SRAM is 64KiB, we limit the size to 32KiB because the real H3 Boot ROM also rejects sizes larger than 32KiB. For reference, this behaviour is documented by the Linux Sunxi project wiki at: https://linux-sunxi.org/BROM#U-Boot_SPL_limitations Signed-off-by: Niek Linnenbank Reviewed-by: Alex Bennée Message-id: 20200311221854.30370-11-nieklinnenbank@gmail.com Signed-off-by: Peter Maydell --- hw/arm/orangepi.c | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'hw/arm/orangepi.c') diff --git a/hw/arm/orangepi.c b/hw/arm/orangepi.c index d65bbf8..b8ebcb0 100644 --- a/hw/arm/orangepi.c +++ b/hw/arm/orangepi.c @@ -97,6 +97,11 @@ static void orangepi_init(MachineState *machine) memory_region_add_subregion(get_system_memory(), h3->memmap[AW_H3_SDRAM], machine->ram); + /* Load target kernel or start using BootROM */ + if (!machine->kernel_filename && blk_is_available(blk)) { + /* Use Boot ROM to copy data from SD card to SRAM */ + allwinner_h3_bootrom_setup(h3, blk); + } orangepi_binfo.loader_start = h3->memmap[AW_H3_SDRAM]; orangepi_binfo.ram_size = machine->ram_size; arm_load_kernel(ARM_CPU(first_cpu), machine, &orangepi_binfo); -- cgit v1.1 From b71d0385e97e230b45a88c604756c44a748736fb Mon Sep 17 00:00:00 2001 From: Niek Linnenbank Date: Wed, 11 Mar 2020 23:18:47 +0100 Subject: hw/arm/allwinner-h3: add SDRAM controller device MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit In the Allwinner H3 SoC the SDRAM controller is responsible for interfacing with the external Synchronous Dynamic Random Access Memory (SDRAM). Types of memory that the SDRAM controller supports are DDR2/DDR3 and capacities of up to 2GiB. This commit adds emulation support of the Allwinner H3 SDRAM controller. Signed-off-by: Niek Linnenbank Reviewed-by: Alex Bennée Message-id: 20200311221854.30370-12-nieklinnenbank@gmail.com Signed-off-by: Peter Maydell --- hw/arm/orangepi.c | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'hw/arm/orangepi.c') diff --git a/hw/arm/orangepi.c b/hw/arm/orangepi.c index b8ebcb0..181f5ba 100644 --- a/hw/arm/orangepi.c +++ b/hw/arm/orangepi.c @@ -80,6 +80,12 @@ static void orangepi_init(MachineState *machine) /* Setup EMAC properties */ object_property_set_int(OBJECT(&h3->emac), 1, "phy-addr", &error_abort); + /* DRAMC */ + object_property_set_uint(OBJECT(h3), h3->memmap[AW_H3_SDRAM], + "ram-addr", &error_abort); + object_property_set_int(OBJECT(h3), machine->ram_size / MiB, "ram-size", + &error_abort); + /* Mark H3 object realized */ object_property_set_bool(OBJECT(h3), true, "realized", &error_abort); -- cgit v1.1