From f0a902f76452211cadbdf1d25ef9b94732b096e8 Mon Sep 17 00:00:00 2001 From: Peter Crosthwaite Date: Thu, 14 May 2015 19:22:58 -0700 Subject: arm: Introduce Xilinx ZynqMP SoC With quad Cortex-A53 CPUs. Use SMC PSCI, with the standard policy of secondaries starting in power-off. Tested-by: Alistair Francis Reviewed-by: Alistair Francis Reviewed-by: Edgar E. Iglesias Signed-off-by: Peter Crosthwaite Message-id: a16202a6c7b79e446e5289d38cb18d2ee4b897a0.1431381507.git.peter.crosthwaite@xilinx.com Signed-off-by: Peter Maydell --- hw/arm/Makefile.objs | 1 + 1 file changed, 1 insertion(+) (limited to 'hw/arm/Makefile.objs') diff --git a/hw/arm/Makefile.objs b/hw/arm/Makefile.objs index 2577f68..d7cd5f4 100644 --- a/hw/arm/Makefile.objs +++ b/hw/arm/Makefile.objs @@ -10,3 +10,4 @@ obj-$(CONFIG_DIGIC) += digic.o obj-y += omap1.o omap2.o strongarm.o obj-$(CONFIG_ALLWINNER_A10) += allwinner-a10.o cubieboard.o obj-$(CONFIG_STM32F205_SOC) += stm32f205_soc.o +obj-$(CONFIG_XLNX_ZYNQMP) += xlnx-zynqmp.o -- cgit v1.1