From 668351a54883b6283e7ae94daf4d4eca1a071158 Mon Sep 17 00:00:00 2001
From: Xuzhou Cheng <xuzhou.cheng@windriver.com>
Date: Wed, 3 Mar 2021 21:52:52 +0800
Subject: hw/arm: xlnx-zynqmp: Connect a Xilinx CSU DMA module for QSPI

Add a Xilinx CSU DMA module to ZynqMP SoC, and connent the stream
link of GQSPI to CSU DMA.

Signed-off-by: Xuzhou Cheng <xuzhou.cheng@windriver.com>
Signed-off-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Message-id: 20210303135254.3970-4-bmeng.cn@gmail.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
 hw/arm/Kconfig | 1 +
 1 file changed, 1 insertion(+)

(limited to 'hw/arm/Kconfig')

diff --git a/hw/arm/Kconfig b/hw/arm/Kconfig
index f2b7a8f..8c37cf0 100644
--- a/hw/arm/Kconfig
+++ b/hw/arm/Kconfig
@@ -353,6 +353,7 @@ config XLNX_ZYNQMP_ARM
     select SSI_M25P80
     select XILINX_AXI
     select XILINX_SPIPS
+    select XLNX_CSU_DMA
     select XLNX_ZYNQMP
     select XLNX_ZDMA
 
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