From dd673288a8ff73ad77fcc1c255486d2466a772e1 Mon Sep 17 00:00:00 2001 From: Igor Mammedov Date: Mon, 23 Jul 2012 15:22:27 +0200 Subject: target-i386: move cpu halted decision into x86_cpu_reset MP initialization protocol differs between cpu families, and for P6 and onward models it is up to CPU to decide if it will be BSP using this protocol, so try to model this. However there is no point in implementing MP initialization protocol in qemu. Thus first CPU is always marked as BSP. This patch: - moves decision to designate BSP from board into cpu, making cpu self-sufficient in this regard. Later it will allow to cleanup hw/pc.c and remove cpu_reset and wrappers from there. - stores flag that CPU is BSP in IA32_APIC_BASE to model behavior described in Inted SDM vol 3a part 1 chapter 8.4.1 - uses MSR_IA32_APICBASE_BSP flag in apic_base for checking if cpu is BSP patch is based on Jan Kiszka's proposal: http://thread.gmane.org/gmane.comp.emulators.qemu/100806 Signed-off-by: Igor Mammedov Signed-off-by: Anthony Liguori --- hw/apic.h | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) (limited to 'hw/apic.h') diff --git a/hw/apic.h b/hw/apic.h index a89542b..1d48e02 100644 --- a/hw/apic.h +++ b/hw/apic.h @@ -21,9 +21,12 @@ void apic_sipi(DeviceState *s); void apic_handle_tpr_access_report(DeviceState *d, target_ulong ip, TPRAccess access); void apic_poll_irq(DeviceState *d); +void apic_designate_bsp(DeviceState *d); /* pc.c */ -int cpu_is_bsp(CPUX86State *env); DeviceState *cpu_get_current_apic(void); +/* cpu.c */ +bool cpu_is_bsp(X86CPU *cpu); + #endif -- cgit v1.1