From 6128720af88eb9b5b3857f88785d32bc052049a7 Mon Sep 17 00:00:00 2001 From: Peter Maydell Date: Tue, 29 Oct 2024 12:54:44 +0000 Subject: docs/system/arm: Add placeholder doc for xlnx-zcu102 board MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Add a placeholder doc for the xlnx-zcu102 board. Signed-off-by: Peter Maydell Reviewed-by: Alex Bennée Reviewed-by: Cédric Le Goater Reviewed-by: Alistair Francis Message-id: 20241018141332.942844-6-peter.maydell@linaro.org --- docs/system/arm/xlnx-zcu102.rst | 19 +++++++++++++++++++ docs/system/target-arm.rst | 1 + 2 files changed, 20 insertions(+) create mode 100644 docs/system/arm/xlnx-zcu102.rst (limited to 'docs') diff --git a/docs/system/arm/xlnx-zcu102.rst b/docs/system/arm/xlnx-zcu102.rst new file mode 100644 index 0000000..534cd1d --- /dev/null +++ b/docs/system/arm/xlnx-zcu102.rst @@ -0,0 +1,19 @@ +Xilinx ZynqMP ZCU102 (``xlnx-zcu102``) +====================================== + +The ``xlnx-zcu102`` board models the Xilinx ZynqMP ZCU102 board. +This board has 4 Cortex-A53 CPUs and 2 Cortex-R5F CPUs. + +Machine-specific options +"""""""""""""""""""""""" + +The following machine-specific options are supported: + +secure + Set ``on``/``off`` to enable/disable emulating a guest CPU which implements the + Arm Security Extensions (TrustZone). The default is ``off``. + +virtualization + Set ``on``/``off`` to enable/disable emulating a guest CPU which implements the + Arm Virtualization Extensions. The default is ``off``. + diff --git a/docs/system/target-arm.rst b/docs/system/target-arm.rst index a7f88c8..ace36d1 100644 --- a/docs/system/target-arm.rst +++ b/docs/system/target-arm.rst @@ -107,6 +107,7 @@ undocumented; you can get a complete list by running arm/xenpvh arm/xlnx-versal-virt arm/xlnx-zynq + arm/xlnx-zcu102 Emulated CPU architecture support ================================= -- cgit v1.1