From 5f1fffa0a6575cfb39834d36c52e973a95dfb275 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Alex=20Benn=C3=A9e?= Date: Wed, 28 Apr 2021 14:13:16 +0100 Subject: docs: fix link in sbsa description MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit A trailing _ makes all the difference to the rendered link. Signed-off-by: Alex Bennée Message-id: 20210428131316.31390-1-alex.bennee@linaro.org Reviewed-by: Peter Maydell Signed-off-by: Peter Maydell --- docs/system/arm/sbsa.rst | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'docs/system') diff --git a/docs/system/arm/sbsa.rst b/docs/system/arm/sbsa.rst index b8ecfdb..27b0999 100644 --- a/docs/system/arm/sbsa.rst +++ b/docs/system/arm/sbsa.rst @@ -4,7 +4,7 @@ Arm Server Base System Architecture Reference board (``sbsa-ref``) While the `virt` board is a generic board platform that doesn't match any real hardware the `sbsa-ref` board intends to look like real hardware. The `Server Base System Architecture -` defines a +`_ defines a minimum base line of hardware support and importantly how the firmware reports that to any operating system. It is a static system that reports a very minimal DT to the firmware for non-discoverable -- cgit v1.1 From f1dfab0d9b77b8649d60ded3d96870f88d0baccd Mon Sep 17 00:00:00 2001 From: Peter Maydell Date: Tue, 4 May 2021 13:09:12 +0100 Subject: hw/arm/mps2-tz: Implement AN524 memory remapping via machine property MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The AN524 FPGA image supports two memory maps, which differ in where the QSPI and BRAM are. In the default map, the BRAM is at 0x0000_0000, and the QSPI at 0x2800_0000. In the second map, they are the other way around. In hardware, the initial mapping can be selected by the user by writing either "REMAP: BRAM" (the default) or "REMAP: QSPI" in the board configuration file. The board config file is acted on by the "Motherboard Configuration Controller", which is an entirely separate microcontroller on the dev board but outside the FPGA. The guest can also dynamically change the mapping via the SCC CFG_REG0 register. Implement this functionality for QEMU, using a machine property "remap" with valid values "BRAM" and "QSPI" to allow the user to set the initial mapping, in the same way they can on the FPGA, and wiring up the bit from the SCC register to also switch the mapping. Signed-off-by: Peter Maydell Reviewed-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daudé Message-id: 20210504120912.23094-4-peter.maydell@linaro.org --- docs/system/arm/mps2.rst | 10 ++++++++++ 1 file changed, 10 insertions(+) (limited to 'docs/system') diff --git a/docs/system/arm/mps2.rst b/docs/system/arm/mps2.rst index f83b151..8a75beb 100644 --- a/docs/system/arm/mps2.rst +++ b/docs/system/arm/mps2.rst @@ -45,3 +45,13 @@ Differences between QEMU and real hardware: flash, but only as simple ROM, so attempting to rewrite the flash from the guest will fail - QEMU does not model the USB controller in MPS3 boards + +Machine-specific options +"""""""""""""""""""""""" + +The following machine-specific options are supported: + +remap + Supported for ``mps3-an524`` only. + Set ``BRAM``/``QSPI`` to select the initial memory mapping. The + default is ``BRAM``. -- cgit v1.1