From 1a987a1d5faaff6c3616a857c111aa3fd9d40ffa Mon Sep 17 00:00:00 2001
From: Jim Wilson <jimw@sifive.com>
Date: Fri, 15 Mar 2019 03:26:55 -0700
Subject: RISC-V: Add 32-bit gdb xml files.

Signed-off-by: Jim Wilson <jimw@sifive.com>
Signed-off-by: Chih-Min Chao <chihmin.chao@sifive.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
---
 configure | 1 +
 1 file changed, 1 insertion(+)

(limited to 'configure')

diff --git a/configure b/configure
index 02ea221..e191456 100755
--- a/configure
+++ b/configure
@@ -7514,6 +7514,7 @@ case "$target_name" in
     TARGET_BASE_ARCH=riscv
     TARGET_ABI_DIR=riscv
     mttcg=yes
+    gdb_xml_files="riscv-32bit-cpu.xml riscv-32bit-fpu.xml riscv-32bit-csr.xml"
     target_compiler=$cross_cc_riscv32
   ;;
   riscv64)
-- 
cgit v1.1