From e32605062cd62c2a958ad28a6ad7de4eeab12027 Mon Sep 17 00:00:00 2001 From: "Peter A. G. Crosthwaite" Date: Mon, 5 Mar 2012 14:39:13 +1000 Subject: xilinx_zynq: machine model initial version Xilinx zynq-7000 machine model. Also includes device model for the zynq-specific system level control register (SLCR) module. Signed-off-by: Peter A. G. Crosthwaite Acked-by: Edgar E. Iglesias Signed-off-by: Edgar E. Iglesias --- Makefile.target | 1 + 1 file changed, 1 insertion(+) (limited to 'Makefile.target') diff --git a/Makefile.target b/Makefile.target index 4dd415c..5f3fc40 100644 --- a/Makefile.target +++ b/Makefile.target @@ -349,6 +349,7 @@ obj-arm-y += versatile_pci.o obj-arm-y += cadence_uart.o obj-arm-y += cadence_ttc.o obj-arm-y += cadence_gem.o +obj-arm-y += xilinx_zynq.o zynq_slcr.o obj-arm-y += realview_gic.o realview.o arm_sysctl.o arm11mpcore.o a9mpcore.o obj-arm-y += exynos4210_gic.o exynos4210_combiner.o exynos4210.o obj-arm-y += exynos4_boards.o exynos4210_uart.o exynos4210_pwm.o -- cgit v1.1