From baead642970602ec5ec935fc8e3653b5fa5f22fa Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Date: Wed, 28 Dec 2022 20:10:41 +0000 Subject: linux-user/sparc: Don't use 16-bit UIDs on SPARC V9 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The 64-bit SPARC V9 syscall ABI uses 32-bit UIDs. Only enable the 16-bit UID wrappers for 32-bit SPARC (V7 and V8). Possibly missed in commit 992f48a036 ("Support for 32 bit ABI on 64 bit targets (only enabled Sparc64)"). Reported-by: Gregor Riepl Tested-by: John Paul Adrian Glaubitz Tested-by: Zach van Rijn Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1394 Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Acked-by: Laurent Vivier Message-Id: <20230327131910.78564-1-philmd@linaro.org> --- linux-user/syscall_defs.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/linux-user/syscall_defs.h b/linux-user/syscall_defs.h index 614a1cb..cc37054 100644 --- a/linux-user/syscall_defs.h +++ b/linux-user/syscall_defs.h @@ -61,7 +61,7 @@ #if (defined(TARGET_I386) && defined(TARGET_ABI32)) \ || (defined(TARGET_ARM) && defined(TARGET_ABI32)) \ - || defined(TARGET_SPARC) \ + || (defined(TARGET_SPARC) && defined(TARGET_ABI32)) \ || defined(TARGET_M68K) || defined(TARGET_SH4) || defined(TARGET_CRIS) /* 16 bit uid wrappers emulation */ #define USE_UID16 -- cgit v1.1 From 450cb7ec2c5fda51b9650ca25e59ac9deeb60d1b Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Date: Wed, 15 Mar 2023 08:39:23 +0100 Subject: linux-user/mips: Use P5600 as default CPU to run NaN2008 ELF binaries MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Per the release 6.06 revision history: 5.03 August 21, 2013 • ABS2008 and NAN2008 fields of Table 5.7 “FCSR RegisterField Descriptions” were optional in release 3 and could be R/W, but as of release 5 are required, read-only, and preset by hardware. The P5600 core implements the release 5, and has the ABS2008 and NAN2008 bits set in CP1_fcr31. Therefore it is able to run ELF binaries compiled with EF_MIPS_NAN2008, such the CIP United Debian NaN2008 distribution: http://repo.oss.cipunited.com/mipsel-nan2008/README.txt In order to run such compiled binaries, select by default the P5600 core when the ELF 'MIPS_NAN2008' flag is set. Reported-by: Jiaxun Yang Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Acked-by: Laurent Vivier Message-Id: <20230327162444.388-1-philmd@linaro.org> --- linux-user/mips/target_elf.h | 3 +++ 1 file changed, 3 insertions(+) diff --git a/linux-user/mips/target_elf.h b/linux-user/mips/target_elf.h index a98c9bd..b965e86 100644 --- a/linux-user/mips/target_elf.h +++ b/linux-user/mips/target_elf.h @@ -15,6 +15,9 @@ static inline const char *cpu_get_model(uint32_t eflags) if ((eflags & EF_MIPS_MACH) == EF_MIPS_MACH_5900) { return "R5900"; } + if (eflags & EF_MIPS_NAN2008) { + return "P5600"; + } return "24Kf"; } #endif -- cgit v1.1 From 3d85c7c15fc7ce986cf1a8e73da1217228f35685 Mon Sep 17 00:00:00 2001 From: Jiaxun Yang Date: Thu, 23 Feb 2023 16:19:58 +0000 Subject: hw/mips/gt64xxx_pci: Don't endian-swap GT_PCI0_CFGADDR MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit 145e2198d749 ("hw/mips/gt64xxx_pci: Endian-swap using PCI_HOST_BRIDGE MemoryRegionOps") converted CFGADDR/CFGDATA registers to use PCI_HOST_BRIDGE's accessor facility and enabled byte swap for both CFGADDR/CFGDATA register. However CFGADDR as a ISD internal register is not controlled by MByteSwap bit, it follows endian of all other ISD register, which means it ties to little endian. Move mapping of CFGADDR out of gt64120_update_pci_cfgdata_mapping to disable endian-swapping. Fixes: 145e2198d749 ("hw/mips/gt64xxx_pci: Endian-swap using PCI_HOST_BRIDGE MemoryRegionOps") Reported-by: Nathan Chancellor Signed-off-by: Jiaxun Yang Tested-by: Philippe Mathieu-Daudé Reviewed-by: Philippe Mathieu-Daudé Tested-by: Nathan Chancellor Message-Id: <20230223161958.48696-1-jiaxun.yang@flygoat.com> [PMD: !!! Note this only fixes little-endian hosts !!! ] Signed-off-by: Philippe Mathieu-Daudé --- hw/pci-host/gt64120.c | 18 ++++++------------ 1 file changed, 6 insertions(+), 12 deletions(-) diff --git a/hw/pci-host/gt64120.c b/hw/pci-host/gt64120.c index f226d03..82c15ed 100644 --- a/hw/pci-host/gt64120.c +++ b/hw/pci-host/gt64120.c @@ -321,9 +321,6 @@ static void gt64120_isd_mapping(GT64120State *s) static void gt64120_update_pci_cfgdata_mapping(GT64120State *s) { /* Indexed on MByteSwap bit, see Table 158: PCI_0 Command, Offset: 0xc00 */ - static const MemoryRegionOps *pci_host_conf_ops[] = { - &pci_host_conf_be_ops, &pci_host_conf_le_ops - }; static const MemoryRegionOps *pci_host_data_ops[] = { &pci_host_data_be_ops, &pci_host_data_le_ops }; @@ -339,15 +336,6 @@ static void gt64120_update_pci_cfgdata_mapping(GT64120State *s) * - Table 16: 32-bit PCI Transaction Endianess * - Table 158: PCI_0 Command, Offset: 0xc00 */ - if (memory_region_is_mapped(&phb->conf_mem)) { - memory_region_del_subregion(&s->ISD_mem, &phb->conf_mem); - object_unparent(OBJECT(&phb->conf_mem)); - } - memory_region_init_io(&phb->conf_mem, OBJECT(phb), - pci_host_conf_ops[s->regs[GT_PCI0_CMD] & 1], - s, "pci-conf-idx", 4); - memory_region_add_subregion_overlap(&s->ISD_mem, GT_PCI0_CFGADDR << 2, - &phb->conf_mem, 1); if (memory_region_is_mapped(&phb->data_mem)) { memory_region_del_subregion(&s->ISD_mem, &phb->data_mem); @@ -1208,6 +1196,12 @@ static void gt64120_realize(DeviceState *dev, Error **errp) PCI_DEVFN(18, 0), TYPE_PCI_BUS); pci_create_simple(phb->bus, PCI_DEVFN(0, 0), "gt64120_pci"); + memory_region_init_io(&phb->conf_mem, OBJECT(phb), + &pci_host_conf_le_ops, + s, "pci-conf-idx", 4); + memory_region_add_subregion_overlap(&s->ISD_mem, GT_PCI0_CFGADDR << 2, + &phb->conf_mem, 1); + /* * The whole address space decoded by the GT-64120A doesn't generate -- cgit v1.1 From 9d403d27bc85928aa9b8eb53fcceb2d7745d51ac Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Date: Thu, 23 Feb 2023 21:58:18 +0000 Subject: tests/avocado: Enable TuxRun/mips64 (big-endian) test MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Now that the previous commit ("hw/mips/gt64xxx_pci: Don't endian-swap GT_PCI0_CFGADDR") fixed the issue accessing the GT64120 PCI config-address register on big-endian targets, we can enable this TuxRun test. Signed-off-by: Philippe Mathieu-Daudé Acked-by: Alex Bennée Message-Id: <20230223220404.63630-1-philmd@linaro.org> --- tests/avocado/tuxrun_baselines.py | 1 - 1 file changed, 1 deletion(-) diff --git a/tests/avocado/tuxrun_baselines.py b/tests/avocado/tuxrun_baselines.py index c3fb67f..d343376 100644 --- a/tests/avocado/tuxrun_baselines.py +++ b/tests/avocado/tuxrun_baselines.py @@ -270,7 +270,6 @@ class TuxRunBaselineTest(QemuSystemTest): """ self.common_tuxrun(drive="driver=ide-hd,bus=ide.0,unit=0") - @skip("QEMU currently broken") # regression against stable QEMU def test_mips64(self): """ :avocado: tags=arch:mips64 -- cgit v1.1 From 95bf34186577a3fc8d8b686bf6bc253a7f0d8c61 Mon Sep 17 00:00:00 2001 From: Titus Rwantare Date: Wed, 22 Mar 2023 17:55:12 +0000 Subject: hw/i2c: pmbus: block uninitialised string reads MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Devices models calling pmbus_send_string can't be relied upon to send a non-zero pointer. This logs an error and doesn't segfault. Reviewed-by: Patrick Venture Signed-off-by: Titus Rwantare Reviewed-by: Philippe Mathieu-Daudé Message-Id: <20230322175513.1550412-5-titusr@google.com> Signed-off-by: Philippe Mathieu-Daudé --- hw/i2c/pmbus_device.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/hw/i2c/pmbus_device.c b/hw/i2c/pmbus_device.c index c3d6046..44fe4ed 100644 --- a/hw/i2c/pmbus_device.c +++ b/hw/i2c/pmbus_device.c @@ -94,6 +94,13 @@ void pmbus_send64(PMBusDevice *pmdev, uint64_t data) void pmbus_send_string(PMBusDevice *pmdev, const char *data) { + if (!data) { + qemu_log_mask(LOG_GUEST_ERROR, + "%s: %s: uninitialised read from 0x%02x\n", + __func__, DEVICE(pmdev)->canonical_path, pmdev->code); + return; + } + size_t len = strlen(data); g_assert(len > 0); g_assert(len + pmdev->out_buf_len < SMBUS_DATA_MAX_LEN); -- cgit v1.1 From aad3eb1ffeb65205153fb31d81d4f268186cde7a Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Date: Fri, 24 Mar 2023 15:47:01 +0100 Subject: block/dmg: Ignore C99 prototype declaration mismatch from MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit When liblzfe (Apple LZFSE compression library) is present (for example installed via 'brew') on Darwin, QEMU build fails as: Has header "lzfse.h" : YES Library lzfse found: YES Dependencies lzo support : NO snappy support : NO bzip2 support : YES lzfse support : YES zstd support : YES 1.5.2 User defined options dmg : enabled lzfse : enabled [221/903] Compiling C object libblock.fa.p/block_dmg-lzfse.c.o FAILED: libblock.fa.p/block_dmg-lzfse.c.o /opt/homebrew/Cellar/lzfse/1.0/include/lzfse.h:56:43: error: this function declaration is not a prototype [-Werror,-Wstrict-prototypes] LZFSE_API size_t lzfse_encode_scratch_size(); ^ void /opt/homebrew/Cellar/lzfse/1.0/include/lzfse.h:94:43: error: this function declaration is not a prototype [-Werror,-Wstrict-prototypes] LZFSE_API size_t lzfse_decode_scratch_size(); ^ void 2 errors generated. ninja: build stopped: subcommand failed. This issue has been reported in the lzfse project in 2016: https://github.com/lzfse/lzfse/issues/3#issuecomment-226574719 Since the project seems unmaintained, simply ignore the strict-prototypes warning check for the header, similarly to how we deal with the GtkItemFactoryCallback prototype from , indirectly included by . Cc: Julio Faracco Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Stefan Weil Message-Id: <20230327151349.97572-1-philmd@linaro.org> --- block/dmg-lzfse.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/block/dmg-lzfse.c b/block/dmg-lzfse.c index 6798cf4..4ea0b9b 100644 --- a/block/dmg-lzfse.c +++ b/block/dmg-lzfse.c @@ -23,7 +23,12 @@ */ #include "qemu/osdep.h" #include "dmg.h" + +/* Work around a -Wstrict-prototypes warning in LZFSE headers */ +#pragma GCC diagnostic push +#pragma GCC diagnostic ignored "-Wstrict-prototypes" #include +#pragma GCC diagnostic pop static int dmg_uncompress_lzfse_do(char *next_in, unsigned int avail_in, char *next_out, unsigned int avail_out) -- cgit v1.1