From beceb99c0c1218d0b55cc04ce6ef77579d3416cb Mon Sep 17 00:00:00 2001 From: Aaron Lindsay Date: Mon, 21 Jan 2019 10:23:14 +0000 Subject: target/arm: Define FIELDs for ID_DFR0 This is immediately necessary for the PMUv3 implementation to check ID_DFR0.PerfMon to enable/disable specific features, but defines the full complement of fields for possible future use elsewhere. Signed-off-by: Aaron Lindsay Reviewed-by: Peter Maydell Message-id: 20181211151945.29137-8-aaron@os.amperecomputing.com Signed-off-by: Peter Maydell --- target/arm/cpu.h | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/target/arm/cpu.h b/target/arm/cpu.h index 8c0d26e..147a285 100644 --- a/target/arm/cpu.h +++ b/target/arm/cpu.h @@ -1681,6 +1681,15 @@ FIELD(ID_AA64MMFR1, PAN, 20, 4) FIELD(ID_AA64MMFR1, SPECSEI, 24, 4) FIELD(ID_AA64MMFR1, XNX, 28, 4) +FIELD(ID_DFR0, COPDBG, 0, 4) +FIELD(ID_DFR0, COPSDBG, 4, 4) +FIELD(ID_DFR0, MMAPDBG, 8, 4) +FIELD(ID_DFR0, COPTRC, 12, 4) +FIELD(ID_DFR0, MMAPTRC, 16, 4) +FIELD(ID_DFR0, MPROFDBG, 20, 4) +FIELD(ID_DFR0, PERFMON, 24, 4) +FIELD(ID_DFR0, TRACEFILT, 28, 4) + QEMU_BUILD_BUG_ON(ARRAY_SIZE(((ARMCPU *)0)->ccsidr) <= R_V7M_CSSELR_INDEX_MASK); /* If adding a feature bit which corresponds to a Linux ELF -- cgit v1.1