From a95c4c26f1dc233987350e7cb1cf62d46ade5ce5 Mon Sep 17 00:00:00 2001 From: Fredrik Noring Date: Thu, 27 Dec 2018 20:29:14 +0100 Subject: target/mips: Support R5900 three-operand MADD1 and MADDU1 instructions The three-operand MADD and MADDU are specific to R5900 cores. Reviewed-by: Aleksandar Markovic Signed-off-by: Aleksandar Markovic Signed-off-by: Fredrik Noring --- target/mips/translate.c | 12 +++++++++--- 1 file changed, 9 insertions(+), 3 deletions(-) diff --git a/target/mips/translate.c b/target/mips/translate.c index 0a49926..2636e8c 100644 --- a/target/mips/translate.c +++ b/target/mips/translate.c @@ -5045,7 +5045,7 @@ static void gen_muldiv(DisasContext *ctx, uint32_t opc, * * and * - * MADD[U] rd, rs, rt + * MADD[U][1] rd, rs, rt * * such that * @@ -5107,6 +5107,9 @@ static void gen_mul_txx9(DisasContext *ctx, uint32_t opc, tcg_temp_free_i32(t3); } break; + case MMI_OPC_MADD1: + acc = 1; + /* Fall through */ case MMI_OPC_MADD: { TCGv_i64 t2 = tcg_temp_new_i64(); @@ -5126,6 +5129,9 @@ static void gen_mul_txx9(DisasContext *ctx, uint32_t opc, tcg_temp_free_i64(t2); } break; + case MMI_OPC_MADDU1: + acc = 1; + /* Fall through */ case MMI_OPC_MADDU: { TCGv_i64 t2 = tcg_temp_new_i64(); @@ -27370,6 +27376,8 @@ static void decode_mmi(CPUMIPSState *env, DisasContext *ctx) case MMI_OPC_MULTU1: case MMI_OPC_MADD: case MMI_OPC_MADDU: + case MMI_OPC_MADD1: + case MMI_OPC_MADDU1: gen_mul_txx9(ctx, opc, rd, rs, rt); break; case MMI_OPC_DIV1: @@ -27385,8 +27393,6 @@ static void decode_mmi(CPUMIPSState *env, DisasContext *ctx) gen_HILO1_tx79(ctx, opc, rd); break; case MMI_OPC_PLZCW: /* TODO: MMI_OPC_PLZCW */ - case MMI_OPC_MADD1: /* TODO: MMI_OPC_MADD1 */ - case MMI_OPC_MADDU1: /* TODO: MMI_OPC_MADDU1 */ case MMI_OPC_PMFHL: /* TODO: MMI_OPC_PMFHL */ case MMI_OPC_PMTHL: /* TODO: MMI_OPC_PMTHL */ case MMI_OPC_PSLLH: /* TODO: MMI_OPC_PSLLH */ -- cgit v1.1