From 9d1d106a3d95ada648703e871975897c1cf05383 Mon Sep 17 00:00:00 2001
From: bellard <bellard@c046a42c-6fe2-441c-8c8c-71466251a162>
Date: Sat, 2 Jul 2005 15:20:06 +0000
Subject: unaligned load fix (Ralf Baechle)

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1471 c046a42c-6fe2-441c-8c8c-71466251a162
---
 target-mips/translate.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/target-mips/translate.c b/target-mips/translate.c
index cb1791f..386bf74 100644
--- a/target-mips/translate.c
+++ b/target-mips/translate.c
@@ -329,6 +329,7 @@ static void gen_ldst (DisasContext *ctx, uint16_t opc, int rt,
         opn = "lbu";
         break;
     case OPC_LWL:
+	GEN_LOAD_REG_TN(T1, rt);
         op_ldst(lwl);
         GEN_STORE_TN_REG(rt, T0);
         opn = "lwl";
@@ -339,6 +340,7 @@ static void gen_ldst (DisasContext *ctx, uint16_t opc, int rt,
         opn = "swr";
         break;
     case OPC_LWR:
+	GEN_LOAD_REG_TN(T1, rt);
         op_ldst(lwr);
         GEN_STORE_TN_REG(rt, T0);
         opn = "lwr";
-- 
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