From 3b52ad1fae804acdc2fdc41b418a65249beae430 Mon Sep 17 00:00:00 2001 From: Peter Maydell Date: Thu, 13 Jun 2019 17:39:10 +0100 Subject: target/arm: Stop using cpu_F0s for NEON_2RM_VRINT* MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Switch NEON_2RM_VRINT* away from using cpu_F0s. Signed-off-by: Peter Maydell Reviewed-by: Richard Henderson Tested-by: Philippe Mathieu-Daudé Message-id: 20190613163917.28589-6-peter.maydell@linaro.org --- target/arm/translate.c | 8 +++----- 1 file changed, 3 insertions(+), 5 deletions(-) diff --git a/target/arm/translate.c b/target/arm/translate.c index a006ab4..243dbee 100644 --- a/target/arm/translate.c +++ b/target/arm/translate.c @@ -4181,9 +4181,7 @@ static int neon_2rm_is_float_op(int op) * what we are asking here is "does the code for this case in * the Neon for-each-pass loop use cpu_F0s?". */ - return ((op >= NEON_2RM_VRINTN && op <= NEON_2RM_VRINTZ) || - op == NEON_2RM_VRINTM || - (op >= NEON_2RM_VRINTP && op <= NEON_2RM_VCVTMS) || + return ((op >= NEON_2RM_VCVTAU && op <= NEON_2RM_VCVTMS) || op >= NEON_2RM_VRECPE_F); } @@ -6786,7 +6784,7 @@ static int disas_neon_data_insn(DisasContext *s, uint32_t insn) tcg_rmode = tcg_const_i32(arm_rmode_to_sf(rmode)); gen_helper_set_neon_rmode(tcg_rmode, tcg_rmode, cpu_env); - gen_helper_rints(cpu_F0s, cpu_F0s, fpstatus); + gen_helper_rints(tmp, tmp, fpstatus); gen_helper_set_neon_rmode(tcg_rmode, tcg_rmode, cpu_env); tcg_temp_free_ptr(fpstatus); @@ -6796,7 +6794,7 @@ static int disas_neon_data_insn(DisasContext *s, uint32_t insn) case NEON_2RM_VRINTX: { TCGv_ptr fpstatus = get_fpstatus_ptr(1); - gen_helper_rints_exact(cpu_F0s, cpu_F0s, fpstatus); + gen_helper_rints_exact(tmp, tmp, fpstatus); tcg_temp_free_ptr(fpstatus); break; } -- cgit v1.1