From 204dab83fe00a3e0781d93ad7899192a9409e987 Mon Sep 17 00:00:00 2001 From: Joel Stanley Date: Fri, 18 Sep 2020 09:04:36 +0200 Subject: misc: aspeed_scu: Update AST2600 silicon id register MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Aspeed have released an updated datasheet (v7) containing the silicon id for the AST2600 A2. It looks like this: SCU004 SCU014 AST2600-A0 0x05000303 0x05000303 AST2600-A1 0x05010303 0x05010303 AST2600-A2 0x05010303 0x05020303 AST2620-A1 0x05010203 0x05010203 AST2620-A2 0x05010203 0x05020203 The SCU004 (silicon id 1) value matches SCU014 for A0, but for subsequent revisions it is hard coded to the A1 value. Qemu effectively dropped support for the A0 in 7582591ae745 ("aspeed: Support AST2600A1 silicon revision") as the A0 reset table was removed, so it makes sense to only support the behaviour of A1 and onwards. Signed-off-by: Joel Stanley Reviewed-by: Cédric Le Goater Message-Id: <20200916082012.776628-1-joel@jms.id.au> Signed-off-by: Cédric Le Goater --- hw/misc/aspeed_scu.c | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/hw/misc/aspeed_scu.c b/hw/misc/aspeed_scu.c index dc6dd87..40a38eb 100644 --- a/hw/misc/aspeed_scu.c +++ b/hw/misc/aspeed_scu.c @@ -670,7 +670,12 @@ static void aspeed_ast2600_scu_reset(DeviceState *dev) memcpy(s->regs, asc->resets, asc->nr_regs * 4); - s->regs[AST2600_SILICON_REV] = s->silicon_rev; + /* + * A0 reports A0 in _REV, but subsequent revisions report A1 regardless + * of actual revision. QEMU and Linux only support A1 onwards so this is + * sufficient. + */ + s->regs[AST2600_SILICON_REV] = AST2600_A1_SILICON_REV; s->regs[AST2600_SILICON_REV2] = s->silicon_rev; s->regs[AST2600_HW_STRAP1] = s->hw_strap1; s->regs[AST2600_HW_STRAP2] = s->hw_strap2; -- cgit v1.1