From c8b0bf545631b55f9e8288252a7b026a97872dd3 Mon Sep 17 00:00:00 2001 From: Peter Maydell Date: Mon, 23 Jul 2012 08:05:20 +0000 Subject: linux-user: Fix incorrect TARGET_BLKBSZGET, TARGET_BLKBSZSET The definitions for the ioctl numbers TARGET_BLKBSZGET and TARGET_BLKBSZSET had the wrong size parameters (they are defined with size_t, not int, even though the ioctl implementations themselves read and write integers). Since commit 354a0008 we now have an ioctl wrapper definition for BLKBSZGET and so on an x86-64-to-x86-64 linux-user binary we were triggering the mismatch warning in syscall_init(). Signed-off-by: Peter Maydell --- linux-user/syscall_defs.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/linux-user/syscall_defs.h b/linux-user/syscall_defs.h index ba9a58c..2026579 100644 --- a/linux-user/syscall_defs.h +++ b/linux-user/syscall_defs.h @@ -880,8 +880,8 @@ struct target_pollfd { #define TARGET_BLKSECTGET TARGET_IO(0x12,103)/* get max sectors per request (ll_rw_blk.c) */ #define TARGET_BLKSSZGET TARGET_IO(0x12,104)/* get block device sector size */ /* A jump here: 108-111 have been used for various private purposes. */ -#define TARGET_BLKBSZGET TARGET_IOR(0x12,112,int) -#define TARGET_BLKBSZSET TARGET_IOW(0x12,113,int) +#define TARGET_BLKBSZGET TARGET_IOR(0x12, 112, abi_ulong) +#define TARGET_BLKBSZSET TARGET_IOW(0x12, 113, abi_ulong) #define TARGET_BLKGETSIZE64 TARGET_IOR(0x12,114,abi_ulong) /* return device size in bytes (u64 *arg) */ -- cgit v1.1 From 5f72307d90a00caabdf786d940418f810bd7c095 Mon Sep 17 00:00:00 2001 From: Peter Maydell Date: Mon, 23 Jul 2012 08:06:15 +0000 Subject: linux-user: Fix SNDCTL_DSP_MAP{IN, OUT}BUF ioctl definitions Fix the SNDCTL_DSP_MAP{IN,OUT}BUF ioctl definitions so that they refer to a suitably defined target struct layout rather than hardcoding the ioctl number. This fixes complaints from the syscall_init() consistency check when running an x86_64-to-x86_64 linux-user qemu. Signed-off-by: Peter Maydell --- linux-user/ioctls.h | 4 ++-- linux-user/syscall_defs.h | 4 ++-- linux-user/syscall_types.h | 3 +++ 3 files changed, 7 insertions(+), 4 deletions(-) diff --git a/linux-user/ioctls.h b/linux-user/ioctls.h index eb96a08..8a47767 100644 --- a/linux-user/ioctls.h +++ b/linux-user/ioctls.h @@ -186,8 +186,8 @@ IOCTL(SNDCTL_DSP_GETISPACE, IOC_R, MK_PTR(MK_STRUCT(STRUCT_audio_buf_info))) IOCTL(SNDCTL_DSP_GETOSPACE, IOC_R, MK_PTR(MK_STRUCT(STRUCT_audio_buf_info))) IOCTL(SNDCTL_DSP_GETTRIGGER, IOC_R, MK_PTR(TYPE_INT)) - IOCTL(SNDCTL_DSP_MAPINBUF, IOC_R, MK_PTR(TYPE_INT)) - IOCTL(SNDCTL_DSP_MAPOUTBUF, IOC_R, MK_PTR(TYPE_INT)) + IOCTL(SNDCTL_DSP_MAPINBUF, IOC_R, MK_PTR(MK_STRUCT(STRUCT_buffmem_desc))) + IOCTL(SNDCTL_DSP_MAPOUTBUF, IOC_R, MK_PTR(MK_STRUCT(STRUCT_buffmem_desc))) IOCTL(SNDCTL_DSP_NONBLOCK, 0, TYPE_NULL) IOCTL(SNDCTL_DSP_POST, 0, TYPE_NULL) IOCTL(SNDCTL_DSP_RESET, 0, TYPE_NULL) diff --git a/linux-user/syscall_defs.h b/linux-user/syscall_defs.h index 2026579..2cfda5a 100644 --- a/linux-user/syscall_defs.h +++ b/linux-user/syscall_defs.h @@ -2226,8 +2226,8 @@ struct target_eabi_flock64 { #define TARGET_SNDCTL_DSP_GETTRIGGER TARGET_IOR('P',16, int) #define TARGET_SNDCTL_DSP_GETIPTR TARGET_IORU('P',17) #define TARGET_SNDCTL_DSP_GETOPTR TARGET_IORU('P',18) -#define TARGET_SNDCTL_DSP_MAPINBUF 0x80085013 -#define TARGET_SNDCTL_DSP_MAPOUTBUF 0x80085014 +#define TARGET_SNDCTL_DSP_MAPINBUF TARGET_IORU('P', 19) +#define TARGET_SNDCTL_DSP_MAPOUTBUF TARGET_IORU('P', 20) #define TARGET_SNDCTL_DSP_NONBLOCK 0x0000500e #define TARGET_SNDCTL_DSP_SAMPLESIZE 0xc0045005 #define TARGET_SNDCTL_DSP_SETDUPLEX 0x00005016 diff --git a/linux-user/syscall_types.h b/linux-user/syscall_types.h index 601618d..44b6a58 100644 --- a/linux-user/syscall_types.h +++ b/linux-user/syscall_types.h @@ -77,6 +77,9 @@ STRUCT(audio_buf_info, STRUCT(count_info, TYPE_INT, TYPE_INT, TYPE_INT) +STRUCT(buffmem_desc, + TYPE_PTRVOID, TYPE_INT) + STRUCT(mixer_info, MK_ARRAY(TYPE_CHAR, 16), MK_ARRAY(TYPE_CHAR, 32), TYPE_INT, MK_ARRAY(TYPE_INT, 10)) -- cgit v1.1 From dd6e957a142d9582df766b5c6de2fbb6773241f2 Mon Sep 17 00:00:00 2001 From: Peter Maydell Date: Mon, 23 Jul 2012 08:07:22 +0000 Subject: linux-user: Move target_to_host_errno_table[] setup out of ioctl loop The code to initialise the target_to_host_errno_table[] array was accidentally inside the loop through checking and initialising all the supported ioctls. This was harmless but meant that we reinitialised the array several hundred times on startup. Signed-off-by: Peter Maydell --- linux-user/syscall.c | 11 ++++++----- 1 file changed, 6 insertions(+), 5 deletions(-) diff --git a/linux-user/syscall.c b/linux-user/syscall.c index 3ba3ef5..8a06131 100644 --- a/linux-user/syscall.c +++ b/linux-user/syscall.c @@ -4606,6 +4606,12 @@ void syscall_init(void) #undef STRUCT #undef STRUCT_SPECIAL + /* Build target_to_host_errno_table[] table from + * host_to_target_errno_table[]. */ + for (i = 0; i < ERRNO_TABLE_SIZE; i++) { + target_to_host_errno_table[host_to_target_errno_table[i]] = i; + } + /* we patch the ioctl size if necessary. We rely on the fact that no ioctl has all the bits at '1' in the size field */ ie = ioctl_entries; @@ -4625,11 +4631,6 @@ void syscall_init(void) (size << TARGET_IOC_SIZESHIFT); } - /* Build target_to_host_errno_table[] table from - * host_to_target_errno_table[]. */ - for (i=0; i < ERRNO_TABLE_SIZE; i++) - target_to_host_errno_table[host_to_target_errno_table[i]] = i; - /* automatic consistency check if same arch */ #if (defined(__i386__) && defined(TARGET_I386) && defined(TARGET_ABI32)) || \ (defined(__x86_64__) && defined(TARGET_X86_64)) -- cgit v1.1 From d3eb5eaeb56e48891bb98ab5f092f43e142e3f28 Mon Sep 17 00:00:00 2001 From: Blue Swirl Date: Sat, 28 Apr 2012 21:28:09 +0000 Subject: x86: avoid AREG0 for FPU helpers Make FPU helpers take a parameter for CPUState instead of relying on global env. Introduce temporary wrappers for FPU load and store ops. Remove wrappers for non-AREG0 code. Don't call unconverted helpers directly. Signed-off-by: Blue Swirl --- target-i386/Makefile.objs | 1 - target-i386/cpu.h | 11 + target-i386/fpu_helper.c | 433 +++++++++++++++++++--------------------- target-i386/helper.h | 172 ++++++++-------- target-i386/mem_helper.c | 49 +++++ target-i386/ops_sse.h | 378 ++++++++++++++++++----------------- target-i386/ops_sse_header.h | 334 +++++++++++++++---------------- target-i386/translate.c | 466 +++++++++++++++++++++++-------------------- 8 files changed, 968 insertions(+), 876 deletions(-) diff --git a/target-i386/Makefile.objs b/target-i386/Makefile.objs index 0715f58..88e7280 100644 --- a/target-i386/Makefile.objs +++ b/target-i386/Makefile.objs @@ -7,7 +7,6 @@ obj-$(CONFIG_NO_KVM) += kvm-stub.o obj-$(CONFIG_LINUX_USER) += ioport-user.o obj-$(CONFIG_BSD_USER) += ioport-user.o -$(obj)/fpu_helper.o: QEMU_CFLAGS += $(HELPER_CFLAGS) $(obj)/cc_helper.o: QEMU_CFLAGS += $(HELPER_CFLAGS) $(obj)/int_helper.o: QEMU_CFLAGS += $(HELPER_CFLAGS) $(obj)/svm_helper.o: QEMU_CFLAGS += $(HELPER_CFLAGS) diff --git a/target-i386/cpu.h b/target-i386/cpu.h index 60f9e97..b6d5e83 100644 --- a/target-i386/cpu.h +++ b/target-i386/cpu.h @@ -1138,4 +1138,15 @@ void do_smm_enter(CPUX86State *env1); void cpu_report_tpr_access(CPUX86State *env, TPRAccess access); +/* temporary wrappers */ +uint32_t cpu_ldub_data(CPUX86State *env, target_ulong ptr); +uint32_t cpu_lduw_data(CPUX86State *env, target_ulong ptr); +uint32_t cpu_ldl_data(CPUX86State *env, target_ulong ptr); +uint64_t cpu_ldq_data(CPUX86State *env, target_ulong ptr); + +void cpu_stb_data(CPUX86State *env, target_ulong ptr, uint32_t data); +void cpu_stw_data(CPUX86State *env, target_ulong ptr, uint32_t data); +void cpu_stl_data(CPUX86State *env, target_ulong ptr, uint32_t data); +void cpu_stq_data(CPUX86State *env, target_ulong ptr, uint64_t data); + #endif /* CPU_I386_H */ diff --git a/target-i386/fpu_helper.c b/target-i386/fpu_helper.c index 6065c2e..a1d7ef7 100644 --- a/target-i386/fpu_helper.c +++ b/target-i386/fpu_helper.c @@ -19,13 +19,8 @@ #include #include "cpu.h" -#include "dyngen-exec.h" #include "helper.h" -#if !defined(CONFIG_USER_ONLY) -#include "softmmu_exec.h" -#endif /* !defined(CONFIG_USER_ONLY) */ - #define FPU_RC_MASK 0xc00 #define FPU_RC_NEAR 0x000 #define FPU_RC_DOWN 0x400 @@ -58,39 +53,39 @@ #define floatx80_l2e make_floatx80(0x3fff, 0xb8aa3b295c17f0bcLL) #define floatx80_l2t make_floatx80(0x4000, 0xd49a784bcd1b8afeLL) -static inline void fpush(void) +static inline void fpush(CPUX86State *env) { env->fpstt = (env->fpstt - 1) & 7; env->fptags[env->fpstt] = 0; /* validate stack entry */ } -static inline void fpop(void) +static inline void fpop(CPUX86State *env) { env->fptags[env->fpstt] = 1; /* invalidate stack entry */ env->fpstt = (env->fpstt + 1) & 7; } -static inline floatx80 helper_fldt(target_ulong ptr) +static inline floatx80 helper_fldt(CPUX86State *env, target_ulong ptr) { CPU_LDoubleU temp; - temp.l.lower = ldq(ptr); - temp.l.upper = lduw(ptr + 8); + temp.l.lower = cpu_ldq_data(env, ptr); + temp.l.upper = cpu_lduw_data(env, ptr + 8); return temp.d; } -static inline void helper_fstt(floatx80 f, target_ulong ptr) +static inline void helper_fstt(CPUX86State *env, floatx80 f, target_ulong ptr) { CPU_LDoubleU temp; temp.d = f; - stq(ptr, temp.l.lower); - stw(ptr + 8, temp.l.upper); + cpu_stq_data(env, ptr, temp.l.lower); + cpu_stw_data(env, ptr + 8, temp.l.upper); } /* x87 FPU helpers */ -static inline double floatx80_to_double(floatx80 a) +static inline double floatx80_to_double(CPUX86State *env, floatx80 a) { union { float64 f64; @@ -101,7 +96,7 @@ static inline double floatx80_to_double(floatx80 a) return u.d; } -static inline floatx80 double_to_floatx80(double a) +static inline floatx80 double_to_floatx80(CPUX86State *env, double a) { union { float64 f64; @@ -112,7 +107,7 @@ static inline floatx80 double_to_floatx80(double a) return float64_to_floatx80(u.f64, &env->fp_status); } -static void fpu_set_exception(int mask) +static void fpu_set_exception(CPUX86State *env, int mask) { env->fpus |= mask; if (env->fpus & (~env->fpuc & FPUC_EM)) { @@ -120,15 +115,15 @@ static void fpu_set_exception(int mask) } } -static inline floatx80 helper_fdiv(floatx80 a, floatx80 b) +static inline floatx80 helper_fdiv(CPUX86State *env, floatx80 a, floatx80 b) { if (floatx80_is_zero(b)) { - fpu_set_exception(FPUS_ZE); + fpu_set_exception(env, FPUS_ZE); } return floatx80_div(a, b, &env->fp_status); } -static void fpu_raise_exception(void) +static void fpu_raise_exception(CPUX86State *env) { if (env->cr[0] & CR0_NE_MASK) { raise_exception(env, EXCP10_COPR); @@ -140,7 +135,7 @@ static void fpu_raise_exception(void) #endif } -void helper_flds_FT0(uint32_t val) +void helper_flds_FT0(CPUX86State *env, uint32_t val) { union { float32 f; @@ -151,7 +146,7 @@ void helper_flds_FT0(uint32_t val) FT0 = float32_to_floatx80(u.f, &env->fp_status); } -void helper_fldl_FT0(uint64_t val) +void helper_fldl_FT0(CPUX86State *env, uint64_t val) { union { float64 f; @@ -162,12 +157,12 @@ void helper_fldl_FT0(uint64_t val) FT0 = float64_to_floatx80(u.f, &env->fp_status); } -void helper_fildl_FT0(int32_t val) +void helper_fildl_FT0(CPUX86State *env, int32_t val) { FT0 = int32_to_floatx80(val, &env->fp_status); } -void helper_flds_ST0(uint32_t val) +void helper_flds_ST0(CPUX86State *env, uint32_t val) { int new_fpstt; union { @@ -182,7 +177,7 @@ void helper_flds_ST0(uint32_t val) env->fptags[new_fpstt] = 0; /* validate stack entry */ } -void helper_fldl_ST0(uint64_t val) +void helper_fldl_ST0(CPUX86State *env, uint64_t val) { int new_fpstt; union { @@ -197,7 +192,7 @@ void helper_fldl_ST0(uint64_t val) env->fptags[new_fpstt] = 0; /* validate stack entry */ } -void helper_fildl_ST0(int32_t val) +void helper_fildl_ST0(CPUX86State *env, int32_t val) { int new_fpstt; @@ -207,7 +202,7 @@ void helper_fildl_ST0(int32_t val) env->fptags[new_fpstt] = 0; /* validate stack entry */ } -void helper_fildll_ST0(int64_t val) +void helper_fildll_ST0(CPUX86State *env, int64_t val) { int new_fpstt; @@ -217,7 +212,7 @@ void helper_fildll_ST0(int64_t val) env->fptags[new_fpstt] = 0; /* validate stack entry */ } -uint32_t helper_fsts_ST0(void) +uint32_t helper_fsts_ST0(CPUX86State *env) { union { float32 f; @@ -228,7 +223,7 @@ uint32_t helper_fsts_ST0(void) return u.i; } -uint64_t helper_fstl_ST0(void) +uint64_t helper_fstl_ST0(CPUX86State *env) { union { float64 f; @@ -239,7 +234,7 @@ uint64_t helper_fstl_ST0(void) return u.i; } -int32_t helper_fist_ST0(void) +int32_t helper_fist_ST0(CPUX86State *env) { int32_t val; @@ -250,7 +245,7 @@ int32_t helper_fist_ST0(void) return val; } -int32_t helper_fistl_ST0(void) +int32_t helper_fistl_ST0(CPUX86State *env) { int32_t val; @@ -258,7 +253,7 @@ int32_t helper_fistl_ST0(void) return val; } -int64_t helper_fistll_ST0(void) +int64_t helper_fistll_ST0(CPUX86State *env) { int64_t val; @@ -266,7 +261,7 @@ int64_t helper_fistll_ST0(void) return val; } -int32_t helper_fistt_ST0(void) +int32_t helper_fistt_ST0(CPUX86State *env) { int32_t val; @@ -277,7 +272,7 @@ int32_t helper_fistt_ST0(void) return val; } -int32_t helper_fisttl_ST0(void) +int32_t helper_fisttl_ST0(CPUX86State *env) { int32_t val; @@ -285,7 +280,7 @@ int32_t helper_fisttl_ST0(void) return val; } -int64_t helper_fisttll_ST0(void) +int64_t helper_fisttll_ST0(CPUX86State *env) { int64_t val; @@ -293,38 +288,38 @@ int64_t helper_fisttll_ST0(void) return val; } -void helper_fldt_ST0(target_ulong ptr) +void helper_fldt_ST0(CPUX86State *env, target_ulong ptr) { int new_fpstt; new_fpstt = (env->fpstt - 1) & 7; - env->fpregs[new_fpstt].d = helper_fldt(ptr); + env->fpregs[new_fpstt].d = helper_fldt(env, ptr); env->fpstt = new_fpstt; env->fptags[new_fpstt] = 0; /* validate stack entry */ } -void helper_fstt_ST0(target_ulong ptr) +void helper_fstt_ST0(CPUX86State *env, target_ulong ptr) { - helper_fstt(ST0, ptr); + helper_fstt(env, ST0, ptr); } -void helper_fpush(void) +void helper_fpush(CPUX86State *env) { - fpush(); + fpush(env); } -void helper_fpop(void) +void helper_fpop(CPUX86State *env) { - fpop(); + fpop(env); } -void helper_fdecstp(void) +void helper_fdecstp(CPUX86State *env) { env->fpstt = (env->fpstt - 1) & 7; env->fpus &= ~0x4700; } -void helper_fincstp(void) +void helper_fincstp(CPUX86State *env) { env->fpstt = (env->fpstt + 1) & 7; env->fpus &= ~0x4700; @@ -332,32 +327,32 @@ void helper_fincstp(void) /* FPU move */ -void helper_ffree_STN(int st_index) +void helper_ffree_STN(CPUX86State *env, int st_index) { env->fptags[(env->fpstt + st_index) & 7] = 1; } -void helper_fmov_ST0_FT0(void) +void helper_fmov_ST0_FT0(CPUX86State *env) { ST0 = FT0; } -void helper_fmov_FT0_STN(int st_index) +void helper_fmov_FT0_STN(CPUX86State *env, int st_index) { FT0 = ST(st_index); } -void helper_fmov_ST0_STN(int st_index) +void helper_fmov_ST0_STN(CPUX86State *env, int st_index) { ST0 = ST(st_index); } -void helper_fmov_STN_ST0(int st_index) +void helper_fmov_STN_ST0(CPUX86State *env, int st_index) { ST(st_index) = ST0; } -void helper_fxchg_ST0_STN(int st_index) +void helper_fxchg_ST0_STN(CPUX86State *env, int st_index) { floatx80 tmp; @@ -370,7 +365,7 @@ void helper_fxchg_ST0_STN(int st_index) static const int fcom_ccval[4] = {0x0100, 0x4000, 0x0000, 0x4500}; -void helper_fcom_ST0_FT0(void) +void helper_fcom_ST0_FT0(CPUX86State *env) { int ret; @@ -378,7 +373,7 @@ void helper_fcom_ST0_FT0(void) env->fpus = (env->fpus & ~0x4500) | fcom_ccval[ret + 1]; } -void helper_fucom_ST0_FT0(void) +void helper_fucom_ST0_FT0(CPUX86State *env) { int ret; @@ -388,158 +383,158 @@ void helper_fucom_ST0_FT0(void) static const int fcomi_ccval[4] = {CC_C, CC_Z, 0, CC_Z | CC_P | CC_C}; -void helper_fcomi_ST0_FT0(void) +void helper_fcomi_ST0_FT0(CPUX86State *env) { int eflags; int ret; ret = floatx80_compare(ST0, FT0, &env->fp_status); - eflags = helper_cc_compute_all(CC_OP); + eflags = cpu_cc_compute_all(env, CC_OP); eflags = (eflags & ~(CC_Z | CC_P | CC_C)) | fcomi_ccval[ret + 1]; CC_SRC = eflags; } -void helper_fucomi_ST0_FT0(void) +void helper_fucomi_ST0_FT0(CPUX86State *env) { int eflags; int ret; ret = floatx80_compare_quiet(ST0, FT0, &env->fp_status); - eflags = helper_cc_compute_all(CC_OP); + eflags = cpu_cc_compute_all(env, CC_OP); eflags = (eflags & ~(CC_Z | CC_P | CC_C)) | fcomi_ccval[ret + 1]; CC_SRC = eflags; } -void helper_fadd_ST0_FT0(void) +void helper_fadd_ST0_FT0(CPUX86State *env) { ST0 = floatx80_add(ST0, FT0, &env->fp_status); } -void helper_fmul_ST0_FT0(void) +void helper_fmul_ST0_FT0(CPUX86State *env) { ST0 = floatx80_mul(ST0, FT0, &env->fp_status); } -void helper_fsub_ST0_FT0(void) +void helper_fsub_ST0_FT0(CPUX86State *env) { ST0 = floatx80_sub(ST0, FT0, &env->fp_status); } -void helper_fsubr_ST0_FT0(void) +void helper_fsubr_ST0_FT0(CPUX86State *env) { ST0 = floatx80_sub(FT0, ST0, &env->fp_status); } -void helper_fdiv_ST0_FT0(void) +void helper_fdiv_ST0_FT0(CPUX86State *env) { - ST0 = helper_fdiv(ST0, FT0); + ST0 = helper_fdiv(env, ST0, FT0); } -void helper_fdivr_ST0_FT0(void) +void helper_fdivr_ST0_FT0(CPUX86State *env) { - ST0 = helper_fdiv(FT0, ST0); + ST0 = helper_fdiv(env, FT0, ST0); } /* fp operations between STN and ST0 */ -void helper_fadd_STN_ST0(int st_index) +void helper_fadd_STN_ST0(CPUX86State *env, int st_index) { ST(st_index) = floatx80_add(ST(st_index), ST0, &env->fp_status); } -void helper_fmul_STN_ST0(int st_index) +void helper_fmul_STN_ST0(CPUX86State *env, int st_index) { ST(st_index) = floatx80_mul(ST(st_index), ST0, &env->fp_status); } -void helper_fsub_STN_ST0(int st_index) +void helper_fsub_STN_ST0(CPUX86State *env, int st_index) { ST(st_index) = floatx80_sub(ST(st_index), ST0, &env->fp_status); } -void helper_fsubr_STN_ST0(int st_index) +void helper_fsubr_STN_ST0(CPUX86State *env, int st_index) { ST(st_index) = floatx80_sub(ST0, ST(st_index), &env->fp_status); } -void helper_fdiv_STN_ST0(int st_index) +void helper_fdiv_STN_ST0(CPUX86State *env, int st_index) { floatx80 *p; p = &ST(st_index); - *p = helper_fdiv(*p, ST0); + *p = helper_fdiv(env, *p, ST0); } -void helper_fdivr_STN_ST0(int st_index) +void helper_fdivr_STN_ST0(CPUX86State *env, int st_index) { floatx80 *p; p = &ST(st_index); - *p = helper_fdiv(ST0, *p); + *p = helper_fdiv(env, ST0, *p); } /* misc FPU operations */ -void helper_fchs_ST0(void) +void helper_fchs_ST0(CPUX86State *env) { ST0 = floatx80_chs(ST0); } -void helper_fabs_ST0(void) +void helper_fabs_ST0(CPUX86State *env) { ST0 = floatx80_abs(ST0); } -void helper_fld1_ST0(void) +void helper_fld1_ST0(CPUX86State *env) { ST0 = floatx80_one; } -void helper_fldl2t_ST0(void) +void helper_fldl2t_ST0(CPUX86State *env) { ST0 = floatx80_l2t; } -void helper_fldl2e_ST0(void) +void helper_fldl2e_ST0(CPUX86State *env) { ST0 = floatx80_l2e; } -void helper_fldpi_ST0(void) +void helper_fldpi_ST0(CPUX86State *env) { ST0 = floatx80_pi; } -void helper_fldlg2_ST0(void) +void helper_fldlg2_ST0(CPUX86State *env) { ST0 = floatx80_lg2; } -void helper_fldln2_ST0(void) +void helper_fldln2_ST0(CPUX86State *env) { ST0 = floatx80_ln2; } -void helper_fldz_ST0(void) +void helper_fldz_ST0(CPUX86State *env) { ST0 = floatx80_zero; } -void helper_fldz_FT0(void) +void helper_fldz_FT0(CPUX86State *env) { FT0 = floatx80_zero; } -uint32_t helper_fnstsw(void) +uint32_t helper_fnstsw(CPUX86State *env) { return (env->fpus & ~0x3800) | (env->fpstt & 0x7) << 11; } -uint32_t helper_fnstcw(void) +uint32_t helper_fnstcw(CPUX86State *env) { return env->fpuc; } -static void update_fp_status(void) +static void update_fp_status(CPUX86State *env) { int rnd_type; @@ -575,25 +570,25 @@ static void update_fp_status(void) set_floatx80_rounding_precision(rnd_type, &env->fp_status); } -void helper_fldcw(uint32_t val) +void helper_fldcw(CPUX86State *env, uint32_t val) { env->fpuc = val; - update_fp_status(); + update_fp_status(env); } -void helper_fclex(void) +void helper_fclex(CPUX86State *env) { env->fpus &= 0x7f00; } -void helper_fwait(void) +void helper_fwait(CPUX86State *env) { if (env->fpus & FPUS_SE) { - fpu_raise_exception(); + fpu_raise_exception(env); } } -void helper_fninit(void) +void helper_fninit(CPUX86State *env) { env->fpus = 0; env->fpstt = 0; @@ -610,7 +605,7 @@ void helper_fninit(void) /* BCD ops */ -void helper_fbld_ST0(target_ulong ptr) +void helper_fbld_ST0(CPUX86State *env, target_ulong ptr) { floatx80 tmp; uint64_t val; @@ -619,18 +614,18 @@ void helper_fbld_ST0(target_ulong ptr) val = 0; for (i = 8; i >= 0; i--) { - v = ldub(ptr + i); + v = cpu_ldub_data(env, ptr + i); val = (val * 100) + ((v >> 4) * 10) + (v & 0xf); } tmp = int64_to_floatx80(val, &env->fp_status); - if (ldub(ptr + 9) & 0x80) { + if (cpu_ldub_data(env, ptr + 9) & 0x80) { floatx80_chs(tmp); } - fpush(); + fpush(env); ST0 = tmp; } -void helper_fbst_ST0(target_ulong ptr) +void helper_fbst_ST0(CPUX86State *env, target_ulong ptr) { int v; target_ulong mem_ref, mem_end; @@ -640,10 +635,10 @@ void helper_fbst_ST0(target_ulong ptr) mem_ref = ptr; mem_end = mem_ref + 9; if (val < 0) { - stb(mem_end, 0x80); + cpu_stb_data(env, mem_end, 0x80); val = -val; } else { - stb(mem_end, 0x00); + cpu_stb_data(env, mem_end, 0x00); } while (mem_ref < mem_end) { if (val == 0) { @@ -652,63 +647,63 @@ void helper_fbst_ST0(target_ulong ptr) v = val % 100; val = val / 100; v = ((v / 10) << 4) | (v % 10); - stb(mem_ref++, v); + cpu_stb_data(env, mem_ref++, v); } while (mem_ref < mem_end) { - stb(mem_ref++, 0); + cpu_stb_data(env, mem_ref++, 0); } } -void helper_f2xm1(void) +void helper_f2xm1(CPUX86State *env) { - double val = floatx80_to_double(ST0); + double val = floatx80_to_double(env, ST0); val = pow(2.0, val) - 1.0; - ST0 = double_to_floatx80(val); + ST0 = double_to_floatx80(env, val); } -void helper_fyl2x(void) +void helper_fyl2x(CPUX86State *env) { - double fptemp = floatx80_to_double(ST0); + double fptemp = floatx80_to_double(env, ST0); if (fptemp > 0.0) { fptemp = log(fptemp) / log(2.0); /* log2(ST) */ - fptemp *= floatx80_to_double(ST1); - ST1 = double_to_floatx80(fptemp); - fpop(); + fptemp *= floatx80_to_double(env, ST1); + ST1 = double_to_floatx80(env, fptemp); + fpop(env); } else { env->fpus &= ~0x4700; env->fpus |= 0x400; } } -void helper_fptan(void) +void helper_fptan(CPUX86State *env) { - double fptemp = floatx80_to_double(ST0); + double fptemp = floatx80_to_double(env, ST0); if ((fptemp > MAXTAN) || (fptemp < -MAXTAN)) { env->fpus |= 0x400; } else { fptemp = tan(fptemp); - ST0 = double_to_floatx80(fptemp); - fpush(); + ST0 = double_to_floatx80(env, fptemp); + fpush(env); ST0 = floatx80_one; env->fpus &= ~0x400; /* C2 <-- 0 */ /* the above code is for |arg| < 2**52 only */ } } -void helper_fpatan(void) +void helper_fpatan(CPUX86State *env) { double fptemp, fpsrcop; - fpsrcop = floatx80_to_double(ST1); - fptemp = floatx80_to_double(ST0); - ST1 = double_to_floatx80(atan2(fpsrcop, fptemp)); - fpop(); + fpsrcop = floatx80_to_double(env, ST1); + fptemp = floatx80_to_double(env, ST0); + ST1 = double_to_floatx80(env, atan2(fpsrcop, fptemp)); + fpop(env); } -void helper_fxtract(void) +void helper_fxtract(CPUX86State *env) { CPU_LDoubleU temp; @@ -718,7 +713,7 @@ void helper_fxtract(void) /* Easy way to generate -inf and raising division by 0 exception */ ST0 = floatx80_div(floatx80_chs(floatx80_one), floatx80_zero, &env->fp_status); - fpush(); + fpush(env); ST0 = temp.d; } else { int expdif; @@ -726,24 +721,24 @@ void helper_fxtract(void) expdif = EXPD(temp) - EXPBIAS; /* DP exponent bias */ ST0 = int32_to_floatx80(expdif, &env->fp_status); - fpush(); + fpush(env); BIASEXPONENT(temp); ST0 = temp.d; } } -void helper_fprem1(void) +void helper_fprem1(CPUX86State *env) { double st0, st1, dblq, fpsrcop, fptemp; CPU_LDoubleU fpsrcop1, fptemp1; int expdif; signed long long int q; - st0 = floatx80_to_double(ST0); - st1 = floatx80_to_double(ST1); + st0 = floatx80_to_double(env, ST0); + st1 = floatx80_to_double(env, ST1); if (isinf(st0) || isnan(st0) || isnan(st1) || (st1 == 0.0)) { - ST0 = double_to_floatx80(0.0 / 0.0); /* NaN */ + ST0 = double_to_floatx80(env, 0.0 / 0.0); /* NaN */ env->fpus &= ~0x4700; /* (C3,C2,C1,C0) <-- 0000 */ return; } @@ -788,21 +783,21 @@ void helper_fprem1(void) -(floor(fabs(fpsrcop))) : floor(fpsrcop); st0 -= (st1 * fpsrcop * fptemp); } - ST0 = double_to_floatx80(st0); + ST0 = double_to_floatx80(env, st0); } -void helper_fprem(void) +void helper_fprem(CPUX86State *env) { double st0, st1, dblq, fpsrcop, fptemp; CPU_LDoubleU fpsrcop1, fptemp1; int expdif; signed long long int q; - st0 = floatx80_to_double(ST0); - st1 = floatx80_to_double(ST1); + st0 = floatx80_to_double(env, ST0); + st1 = floatx80_to_double(env, ST1); if (isinf(st0) || isnan(st0) || isnan(st1) || (st1 == 0.0)) { - ST0 = double_to_floatx80(0.0 / 0.0); /* NaN */ + ST0 = double_to_floatx80(env, 0.0 / 0.0); /* NaN */ env->fpus &= ~0x4700; /* (C3,C2,C1,C0) <-- 0000 */ return; } @@ -849,25 +844,25 @@ void helper_fprem(void) -(floor(fabs(fpsrcop))) : floor(fpsrcop); st0 -= (st1 * fpsrcop * fptemp); } - ST0 = double_to_floatx80(st0); + ST0 = double_to_floatx80(env, st0); } -void helper_fyl2xp1(void) +void helper_fyl2xp1(CPUX86State *env) { - double fptemp = floatx80_to_double(ST0); + double fptemp = floatx80_to_double(env, ST0); if ((fptemp + 1.0) > 0.0) { fptemp = log(fptemp + 1.0) / log(2.0); /* log2(ST + 1.0) */ - fptemp *= floatx80_to_double(ST1); - ST1 = double_to_floatx80(fptemp); - fpop(); + fptemp *= floatx80_to_double(env, ST1); + ST1 = double_to_floatx80(env, fptemp); + fpop(env); } else { env->fpus &= ~0x4700; env->fpus |= 0x400; } } -void helper_fsqrt(void) +void helper_fsqrt(CPUX86State *env) { if (floatx80_is_neg(ST0)) { env->fpus &= ~0x4700; /* (C3,C2,C1,C0) <-- 0000 */ @@ -876,27 +871,27 @@ void helper_fsqrt(void) ST0 = floatx80_sqrt(ST0, &env->fp_status); } -void helper_fsincos(void) +void helper_fsincos(CPUX86State *env) { - double fptemp = floatx80_to_double(ST0); + double fptemp = floatx80_to_double(env, ST0); if ((fptemp > MAXTAN) || (fptemp < -MAXTAN)) { env->fpus |= 0x400; } else { - ST0 = double_to_floatx80(sin(fptemp)); - fpush(); - ST0 = double_to_floatx80(cos(fptemp)); + ST0 = double_to_floatx80(env, sin(fptemp)); + fpush(env); + ST0 = double_to_floatx80(env, cos(fptemp)); env->fpus &= ~0x400; /* C2 <-- 0 */ /* the above code is for |arg| < 2**63 only */ } } -void helper_frndint(void) +void helper_frndint(CPUX86State *env) { ST0 = floatx80_round_to_int(ST0, &env->fp_status); } -void helper_fscale(void) +void helper_fscale(CPUX86State *env) { if (floatx80_is_any_nan(ST1)) { ST0 = ST1; @@ -906,33 +901,33 @@ void helper_fscale(void) } } -void helper_fsin(void) +void helper_fsin(CPUX86State *env) { - double fptemp = floatx80_to_double(ST0); + double fptemp = floatx80_to_double(env, ST0); if ((fptemp > MAXTAN) || (fptemp < -MAXTAN)) { env->fpus |= 0x400; } else { - ST0 = double_to_floatx80(sin(fptemp)); + ST0 = double_to_floatx80(env, sin(fptemp)); env->fpus &= ~0x400; /* C2 <-- 0 */ /* the above code is for |arg| < 2**53 only */ } } -void helper_fcos(void) +void helper_fcos(CPUX86State *env) { - double fptemp = floatx80_to_double(ST0); + double fptemp = floatx80_to_double(env, ST0); if ((fptemp > MAXTAN) || (fptemp < -MAXTAN)) { env->fpus |= 0x400; } else { - ST0 = double_to_floatx80(cos(fptemp)); + ST0 = double_to_floatx80(env, cos(fptemp)); env->fpus &= ~0x400; /* C2 <-- 0 */ /* the above code is for |arg| < 2**63 only */ } } -void helper_fxam_ST0(void) +void helper_fxam_ST0(CPUX86State *env) { CPU_LDoubleU temp; int expdif; @@ -963,7 +958,7 @@ void helper_fxam_ST0(void) } } -void helper_fstenv(target_ulong ptr, int data32) +void helper_fstenv(CPUX86State *env, target_ulong ptr, int data32) { int fpus, fptag, exp, i; uint64_t mant; @@ -991,37 +986,37 @@ void helper_fstenv(target_ulong ptr, int data32) } if (data32) { /* 32 bit */ - stl(ptr, env->fpuc); - stl(ptr + 4, fpus); - stl(ptr + 8, fptag); - stl(ptr + 12, 0); /* fpip */ - stl(ptr + 16, 0); /* fpcs */ - stl(ptr + 20, 0); /* fpoo */ - stl(ptr + 24, 0); /* fpos */ + cpu_stl_data(env, ptr, env->fpuc); + cpu_stl_data(env, ptr + 4, fpus); + cpu_stl_data(env, ptr + 8, fptag); + cpu_stl_data(env, ptr + 12, 0); /* fpip */ + cpu_stl_data(env, ptr + 16, 0); /* fpcs */ + cpu_stl_data(env, ptr + 20, 0); /* fpoo */ + cpu_stl_data(env, ptr + 24, 0); /* fpos */ } else { /* 16 bit */ - stw(ptr, env->fpuc); - stw(ptr + 2, fpus); - stw(ptr + 4, fptag); - stw(ptr + 6, 0); - stw(ptr + 8, 0); - stw(ptr + 10, 0); - stw(ptr + 12, 0); + cpu_stw_data(env, ptr, env->fpuc); + cpu_stw_data(env, ptr + 2, fpus); + cpu_stw_data(env, ptr + 4, fptag); + cpu_stw_data(env, ptr + 6, 0); + cpu_stw_data(env, ptr + 8, 0); + cpu_stw_data(env, ptr + 10, 0); + cpu_stw_data(env, ptr + 12, 0); } } -void helper_fldenv(target_ulong ptr, int data32) +void helper_fldenv(CPUX86State *env, target_ulong ptr, int data32) { int i, fpus, fptag; if (data32) { - env->fpuc = lduw(ptr); - fpus = lduw(ptr + 4); - fptag = lduw(ptr + 8); + env->fpuc = cpu_lduw_data(env, ptr); + fpus = cpu_lduw_data(env, ptr + 4); + fptag = cpu_lduw_data(env, ptr + 8); } else { - env->fpuc = lduw(ptr); - fpus = lduw(ptr + 2); - fptag = lduw(ptr + 4); + env->fpuc = cpu_lduw_data(env, ptr); + fpus = cpu_lduw_data(env, ptr + 2); + fptag = cpu_lduw_data(env, ptr + 4); } env->fpstt = (fpus >> 11) & 7; env->fpus = fpus & ~0x3800; @@ -1031,17 +1026,17 @@ void helper_fldenv(target_ulong ptr, int data32) } } -void helper_fsave(target_ulong ptr, int data32) +void helper_fsave(CPUX86State *env, target_ulong ptr, int data32) { floatx80 tmp; int i; - helper_fstenv(ptr, data32); + helper_fstenv(env, ptr, data32); ptr += (14 << data32); for (i = 0; i < 8; i++) { tmp = ST(i); - helper_fstt(tmp, ptr); + helper_fstt(env, tmp, ptr); ptr += 10; } @@ -1059,48 +1054,34 @@ void helper_fsave(target_ulong ptr, int data32) env->fptags[7] = 1; } -void helper_frstor(target_ulong ptr, int data32) +void helper_frstor(CPUX86State *env, target_ulong ptr, int data32) { floatx80 tmp; int i; - helper_fldenv(ptr, data32); + helper_fldenv(env, ptr, data32); ptr += (14 << data32); for (i = 0; i < 8; i++) { - tmp = helper_fldt(ptr); + tmp = helper_fldt(env, ptr); ST(i) = tmp; ptr += 10; } } #if defined(CONFIG_USER_ONLY) -void cpu_x86_fsave(CPUX86State *s, target_ulong ptr, int data32) +void cpu_x86_fsave(CPUX86State *env, target_ulong ptr, int data32) { - CPUX86State *saved_env; - - saved_env = env; - env = s; - - helper_fsave(ptr, data32); - - env = saved_env; + helper_fsave(env, ptr, data32); } -void cpu_x86_frstor(CPUX86State *s, target_ulong ptr, int data32) +void cpu_x86_frstor(CPUX86State *env, target_ulong ptr, int data32) { - CPUX86State *saved_env; - - saved_env = env; - env = s; - - helper_frstor(ptr, data32); - - env = saved_env; + helper_frstor(env, ptr, data32); } #endif -void helper_fxsave(target_ulong ptr, int data64) +void helper_fxsave(CPUX86State *env, target_ulong ptr, int data64) { int fpus, fptag, i, nb_xmm_regs; floatx80 tmp; @@ -1116,33 +1097,33 @@ void helper_fxsave(target_ulong ptr, int data64) for (i = 0; i < 8; i++) { fptag |= (env->fptags[i] << i); } - stw(ptr, env->fpuc); - stw(ptr + 2, fpus); - stw(ptr + 4, fptag ^ 0xff); + cpu_stw_data(env, ptr, env->fpuc); + cpu_stw_data(env, ptr + 2, fpus); + cpu_stw_data(env, ptr + 4, fptag ^ 0xff); #ifdef TARGET_X86_64 if (data64) { - stq(ptr + 0x08, 0); /* rip */ - stq(ptr + 0x10, 0); /* rdp */ + cpu_stq_data(env, ptr + 0x08, 0); /* rip */ + cpu_stq_data(env, ptr + 0x10, 0); /* rdp */ } else #endif { - stl(ptr + 0x08, 0); /* eip */ - stl(ptr + 0x0c, 0); /* sel */ - stl(ptr + 0x10, 0); /* dp */ - stl(ptr + 0x14, 0); /* sel */ + cpu_stl_data(env, ptr + 0x08, 0); /* eip */ + cpu_stl_data(env, ptr + 0x0c, 0); /* sel */ + cpu_stl_data(env, ptr + 0x10, 0); /* dp */ + cpu_stl_data(env, ptr + 0x14, 0); /* sel */ } addr = ptr + 0x20; for (i = 0; i < 8; i++) { tmp = ST(i); - helper_fstt(tmp, addr); + helper_fstt(env, tmp, addr); addr += 16; } if (env->cr[4] & CR4_OSFXSR_MASK) { /* XXX: finish it */ - stl(ptr + 0x18, env->mxcsr); /* mxcsr */ - stl(ptr + 0x1c, 0x0000ffff); /* mxcsr_mask */ + cpu_stl_data(env, ptr + 0x18, env->mxcsr); /* mxcsr */ + cpu_stl_data(env, ptr + 0x1c, 0x0000ffff); /* mxcsr_mask */ if (env->hflags & HF_CS64_MASK) { nb_xmm_regs = 16; } else { @@ -1154,15 +1135,15 @@ void helper_fxsave(target_ulong ptr, int data64) || (env->hflags & HF_CPL_MASK) || !(env->hflags & HF_LMA_MASK)) { for (i = 0; i < nb_xmm_regs; i++) { - stq(addr, env->xmm_regs[i].XMM_Q(0)); - stq(addr + 8, env->xmm_regs[i].XMM_Q(1)); + cpu_stq_data(env, addr, env->xmm_regs[i].XMM_Q(0)); + cpu_stq_data(env, addr + 8, env->xmm_regs[i].XMM_Q(1)); addr += 16; } } } } -void helper_fxrstor(target_ulong ptr, int data64) +void helper_fxrstor(CPUX86State *env, target_ulong ptr, int data64) { int i, fpus, fptag, nb_xmm_regs; floatx80 tmp; @@ -1173,9 +1154,9 @@ void helper_fxrstor(target_ulong ptr, int data64) raise_exception(env, EXCP0D_GPF); } - env->fpuc = lduw(ptr); - fpus = lduw(ptr + 2); - fptag = lduw(ptr + 4); + env->fpuc = cpu_lduw_data(env, ptr); + fpus = cpu_lduw_data(env, ptr + 2); + fptag = cpu_lduw_data(env, ptr + 4); env->fpstt = (fpus >> 11) & 7; env->fpus = fpus & ~0x3800; fptag ^= 0xff; @@ -1185,15 +1166,15 @@ void helper_fxrstor(target_ulong ptr, int data64) addr = ptr + 0x20; for (i = 0; i < 8; i++) { - tmp = helper_fldt(addr); + tmp = helper_fldt(env, addr); ST(i) = tmp; addr += 16; } if (env->cr[4] & CR4_OSFXSR_MASK) { /* XXX: finish it */ - env->mxcsr = ldl(ptr + 0x18); - /* ldl(ptr + 0x1c); */ + env->mxcsr = cpu_ldl_data(env, ptr + 0x18); + /* cpu_ldl_data(env, ptr + 0x1c); */ if (env->hflags & HF_CS64_MASK) { nb_xmm_regs = 16; } else { @@ -1205,8 +1186,8 @@ void helper_fxrstor(target_ulong ptr, int data64) || (env->hflags & HF_CPL_MASK) || !(env->hflags & HF_LMA_MASK)) { for (i = 0; i < nb_xmm_regs; i++) { - env->xmm_regs[i].XMM_Q(0) = ldq(addr); - env->xmm_regs[i].XMM_Q(1) = ldq(addr + 8); + env->xmm_regs[i].XMM_Q(0) = cpu_ldq_data(env, addr); + env->xmm_regs[i].XMM_Q(1) = cpu_ldq_data(env, addr + 8); addr += 16; } } @@ -1242,7 +1223,7 @@ floatx80 cpu_set_fp80(uint64_t mant, uint16_t upper) #define SSE_RC_CHOP 0x6000 #define SSE_FZ 0x8000 -static void update_sse_status(void) +static void update_sse_status(CPUX86State *env) { int rnd_type; @@ -1271,20 +1252,20 @@ static void update_sse_status(void) set_flush_to_zero((env->mxcsr & SSE_FZ) ? 1 : 0, &env->fp_status); } -void helper_ldmxcsr(uint32_t val) +void helper_ldmxcsr(CPUX86State *env, uint32_t val) { env->mxcsr = val; - update_sse_status(); + update_sse_status(env); } -void helper_enter_mmx(void) +void helper_enter_mmx(CPUX86State *env) { env->fpstt = 0; *(uint32_t *)(env->fptags) = 0; *(uint32_t *)(env->fptags + 4) = 0; } -void helper_emms(void) +void helper_emms(CPUX86State *env) { /* set to empty state */ *(uint32_t *)(env->fptags) = 0x01010101; @@ -1292,7 +1273,7 @@ void helper_emms(void) } /* XXX: suppress */ -void helper_movq(void *d, void *s) +void helper_movq(CPUX86State *env, void *d, void *s) { *(uint64_t *)d = *(uint64_t *)s; } diff --git a/target-i386/helper.h b/target-i386/helper.h index 99ca183..6fdee8a 100644 --- a/target-i386/helper.h +++ b/target-i386/helper.h @@ -109,98 +109,98 @@ DEF_HELPER_1(invlpga, void, int) /* x86 FPU */ -DEF_HELPER_1(flds_FT0, void, i32) -DEF_HELPER_1(fldl_FT0, void, i64) -DEF_HELPER_1(fildl_FT0, void, s32) -DEF_HELPER_1(flds_ST0, void, i32) -DEF_HELPER_1(fldl_ST0, void, i64) -DEF_HELPER_1(fildl_ST0, void, s32) -DEF_HELPER_1(fildll_ST0, void, s64) -DEF_HELPER_0(fsts_ST0, i32) -DEF_HELPER_0(fstl_ST0, i64) -DEF_HELPER_0(fist_ST0, s32) -DEF_HELPER_0(fistl_ST0, s32) -DEF_HELPER_0(fistll_ST0, s64) -DEF_HELPER_0(fistt_ST0, s32) -DEF_HELPER_0(fisttl_ST0, s32) -DEF_HELPER_0(fisttll_ST0, s64) -DEF_HELPER_1(fldt_ST0, void, tl) -DEF_HELPER_1(fstt_ST0, void, tl) -DEF_HELPER_0(fpush, void) -DEF_HELPER_0(fpop, void) -DEF_HELPER_0(fdecstp, void) -DEF_HELPER_0(fincstp, void) -DEF_HELPER_1(ffree_STN, void, int) -DEF_HELPER_0(fmov_ST0_FT0, void) -DEF_HELPER_1(fmov_FT0_STN, void, int) -DEF_HELPER_1(fmov_ST0_STN, void, int) -DEF_HELPER_1(fmov_STN_ST0, void, int) -DEF_HELPER_1(fxchg_ST0_STN, void, int) -DEF_HELPER_0(fcom_ST0_FT0, void) -DEF_HELPER_0(fucom_ST0_FT0, void) -DEF_HELPER_0(fcomi_ST0_FT0, void) -DEF_HELPER_0(fucomi_ST0_FT0, void) -DEF_HELPER_0(fadd_ST0_FT0, void) -DEF_HELPER_0(fmul_ST0_FT0, void) -DEF_HELPER_0(fsub_ST0_FT0, void) -DEF_HELPER_0(fsubr_ST0_FT0, void) -DEF_HELPER_0(fdiv_ST0_FT0, void) -DEF_HELPER_0(fdivr_ST0_FT0, void) -DEF_HELPER_1(fadd_STN_ST0, void, int) -DEF_HELPER_1(fmul_STN_ST0, void, int) -DEF_HELPER_1(fsub_STN_ST0, void, int) -DEF_HELPER_1(fsubr_STN_ST0, void, int) -DEF_HELPER_1(fdiv_STN_ST0, void, int) -DEF_HELPER_1(fdivr_STN_ST0, void, int) -DEF_HELPER_0(fchs_ST0, void) -DEF_HELPER_0(fabs_ST0, void) -DEF_HELPER_0(fxam_ST0, void) -DEF_HELPER_0(fld1_ST0, void) -DEF_HELPER_0(fldl2t_ST0, void) -DEF_HELPER_0(fldl2e_ST0, void) -DEF_HELPER_0(fldpi_ST0, void) -DEF_HELPER_0(fldlg2_ST0, void) -DEF_HELPER_0(fldln2_ST0, void) -DEF_HELPER_0(fldz_ST0, void) -DEF_HELPER_0(fldz_FT0, void) -DEF_HELPER_0(fnstsw, i32) -DEF_HELPER_0(fnstcw, i32) -DEF_HELPER_1(fldcw, void, i32) -DEF_HELPER_0(fclex, void) -DEF_HELPER_0(fwait, void) -DEF_HELPER_0(fninit, void) -DEF_HELPER_1(fbld_ST0, void, tl) -DEF_HELPER_1(fbst_ST0, void, tl) -DEF_HELPER_0(f2xm1, void) -DEF_HELPER_0(fyl2x, void) -DEF_HELPER_0(fptan, void) -DEF_HELPER_0(fpatan, void) -DEF_HELPER_0(fxtract, void) -DEF_HELPER_0(fprem1, void) -DEF_HELPER_0(fprem, void) -DEF_HELPER_0(fyl2xp1, void) -DEF_HELPER_0(fsqrt, void) -DEF_HELPER_0(fsincos, void) -DEF_HELPER_0(frndint, void) -DEF_HELPER_0(fscale, void) -DEF_HELPER_0(fsin, void) -DEF_HELPER_0(fcos, void) -DEF_HELPER_2(fstenv, void, tl, int) -DEF_HELPER_2(fldenv, void, tl, int) -DEF_HELPER_2(fsave, void, tl, int) -DEF_HELPER_2(frstor, void, tl, int) -DEF_HELPER_2(fxsave, void, tl, int) -DEF_HELPER_2(fxrstor, void, tl, int) +DEF_HELPER_2(flds_FT0, void, env, i32) +DEF_HELPER_2(fldl_FT0, void, env, i64) +DEF_HELPER_2(fildl_FT0, void, env, s32) +DEF_HELPER_2(flds_ST0, void, env, i32) +DEF_HELPER_2(fldl_ST0, void, env, i64) +DEF_HELPER_2(fildl_ST0, void, env, s32) +DEF_HELPER_2(fildll_ST0, void, env, s64) +DEF_HELPER_1(fsts_ST0, i32, env) +DEF_HELPER_1(fstl_ST0, i64, env) +DEF_HELPER_1(fist_ST0, s32, env) +DEF_HELPER_1(fistl_ST0, s32, env) +DEF_HELPER_1(fistll_ST0, s64, env) +DEF_HELPER_1(fistt_ST0, s32, env) +DEF_HELPER_1(fisttl_ST0, s32, env) +DEF_HELPER_1(fisttll_ST0, s64, env) +DEF_HELPER_2(fldt_ST0, void, env, tl) +DEF_HELPER_2(fstt_ST0, void, env, tl) +DEF_HELPER_1(fpush, void, env) +DEF_HELPER_1(fpop, void, env) +DEF_HELPER_1(fdecstp, void, env) +DEF_HELPER_1(fincstp, void, env) +DEF_HELPER_2(ffree_STN, void, env, int) +DEF_HELPER_1(fmov_ST0_FT0, void, env) +DEF_HELPER_2(fmov_FT0_STN, void, env, int) +DEF_HELPER_2(fmov_ST0_STN, void, env, int) +DEF_HELPER_2(fmov_STN_ST0, void, env, int) +DEF_HELPER_2(fxchg_ST0_STN, void, env, int) +DEF_HELPER_1(fcom_ST0_FT0, void, env) +DEF_HELPER_1(fucom_ST0_FT0, void, env) +DEF_HELPER_1(fcomi_ST0_FT0, void, env) +DEF_HELPER_1(fucomi_ST0_FT0, void, env) +DEF_HELPER_1(fadd_ST0_FT0, void, env) +DEF_HELPER_1(fmul_ST0_FT0, void, env) +DEF_HELPER_1(fsub_ST0_FT0, void, env) +DEF_HELPER_1(fsubr_ST0_FT0, void, env) +DEF_HELPER_1(fdiv_ST0_FT0, void, env) +DEF_HELPER_1(fdivr_ST0_FT0, void, env) +DEF_HELPER_2(fadd_STN_ST0, void, env, int) +DEF_HELPER_2(fmul_STN_ST0, void, env, int) +DEF_HELPER_2(fsub_STN_ST0, void, env, int) +DEF_HELPER_2(fsubr_STN_ST0, void, env, int) +DEF_HELPER_2(fdiv_STN_ST0, void, env, int) +DEF_HELPER_2(fdivr_STN_ST0, void, env, int) +DEF_HELPER_1(fchs_ST0, void, env) +DEF_HELPER_1(fabs_ST0, void, env) +DEF_HELPER_1(fxam_ST0, void, env) +DEF_HELPER_1(fld1_ST0, void, env) +DEF_HELPER_1(fldl2t_ST0, void, env) +DEF_HELPER_1(fldl2e_ST0, void, env) +DEF_HELPER_1(fldpi_ST0, void, env) +DEF_HELPER_1(fldlg2_ST0, void, env) +DEF_HELPER_1(fldln2_ST0, void, env) +DEF_HELPER_1(fldz_ST0, void, env) +DEF_HELPER_1(fldz_FT0, void, env) +DEF_HELPER_1(fnstsw, i32, env) +DEF_HELPER_1(fnstcw, i32, env) +DEF_HELPER_2(fldcw, void, env, i32) +DEF_HELPER_1(fclex, void, env) +DEF_HELPER_1(fwait, void, env) +DEF_HELPER_1(fninit, void, env) +DEF_HELPER_2(fbld_ST0, void, env, tl) +DEF_HELPER_2(fbst_ST0, void, env, tl) +DEF_HELPER_1(f2xm1, void, env) +DEF_HELPER_1(fyl2x, void, env) +DEF_HELPER_1(fptan, void, env) +DEF_HELPER_1(fpatan, void, env) +DEF_HELPER_1(fxtract, void, env) +DEF_HELPER_1(fprem1, void, env) +DEF_HELPER_1(fprem, void, env) +DEF_HELPER_1(fyl2xp1, void, env) +DEF_HELPER_1(fsqrt, void, env) +DEF_HELPER_1(fsincos, void, env) +DEF_HELPER_1(frndint, void, env) +DEF_HELPER_1(fscale, void, env) +DEF_HELPER_1(fsin, void, env) +DEF_HELPER_1(fcos, void, env) +DEF_HELPER_3(fstenv, void, env, tl, int) +DEF_HELPER_3(fldenv, void, env, tl, int) +DEF_HELPER_3(fsave, void, env, tl, int) +DEF_HELPER_3(frstor, void, env, tl, int) +DEF_HELPER_3(fxsave, void, env, tl, int) +DEF_HELPER_3(fxrstor, void, env, tl, int) DEF_HELPER_1(bsf, tl, tl) DEF_HELPER_1(bsr, tl, tl) DEF_HELPER_2(lzcnt, tl, tl, int) /* MMX/SSE */ -DEF_HELPER_1(ldmxcsr, void, i32) -DEF_HELPER_0(enter_mmx, void) -DEF_HELPER_0(emms, void) -DEF_HELPER_2(movq, void, ptr, ptr) +DEF_HELPER_2(ldmxcsr, void, env, i32) +DEF_HELPER_1(enter_mmx, void, env) +DEF_HELPER_1(emms, void, env) +DEF_HELPER_3(movq, void, env, ptr, ptr) #define SHIFT 0 #include "ops_sse_header.h" diff --git a/target-i386/mem_helper.c b/target-i386/mem_helper.c index 91353c0..4e0af4b 100644 --- a/target-i386/mem_helper.c +++ b/target-i386/mem_helper.c @@ -159,3 +159,52 @@ void tlb_fill(CPUX86State *env1, target_ulong addr, int is_write, int mmu_idx, env = saved_env; } #endif + +/* temporary wrappers */ +#if defined(CONFIG_USER_ONLY) +#define ldub_data(addr) ldub_raw(addr) +#define lduw_data(addr) lduw_raw(addr) +#define ldl_data(addr) ldl_raw(addr) +#define ldq_data(addr) ldq_raw(addr) + +#define stb_data(addr, data) stb_raw(addr, data) +#define stw_data(addr, data) stw_raw(addr, data) +#define stl_data(addr, data) stl_raw(addr, data) +#define stq_data(addr, data) stq_raw(addr, data) +#endif + +#define WRAP_LD(rettype, fn) \ + rettype cpu_ ## fn(CPUX86State *env1, target_ulong addr) \ + { \ + CPUX86State *saved_env; \ + rettype ret; \ + \ + saved_env = env; \ + env = env1; \ + ret = fn(addr); \ + env = saved_env; \ + return ret; \ + } + +WRAP_LD(uint32_t, ldub_data) +WRAP_LD(uint32_t, lduw_data) +WRAP_LD(uint32_t, ldl_data) +WRAP_LD(uint64_t, ldq_data) +#undef WRAP_LD + +#define WRAP_ST(datatype, fn) \ + void cpu_ ## fn(CPUX86State *env1, target_ulong addr, datatype val) \ + { \ + CPUX86State *saved_env; \ + \ + saved_env = env; \ + env = env1; \ + fn(addr, val); \ + env = saved_env; \ + } + +WRAP_ST(uint32_t, stb_data) +WRAP_ST(uint32_t, stw_data) +WRAP_ST(uint32_t, stl_data) +WRAP_ST(uint64_t, stq_data) +#undef WRAP_ST diff --git a/target-i386/ops_sse.h b/target-i386/ops_sse.h index d109512..cad9d75 100644 --- a/target-i386/ops_sse.h +++ b/target-i386/ops_sse.h @@ -35,7 +35,7 @@ #define SUFFIX _xmm #endif -void glue(helper_psrlw, SUFFIX)(Reg *d, Reg *s) +void glue(helper_psrlw, SUFFIX)(CPUX86State *env, Reg *d, Reg *s) { int shift; @@ -59,7 +59,7 @@ void glue(helper_psrlw, SUFFIX)(Reg *d, Reg *s) } } -void glue(helper_psraw, SUFFIX)(Reg *d, Reg *s) +void glue(helper_psraw, SUFFIX)(CPUX86State *env, Reg *d, Reg *s) { int shift; @@ -80,7 +80,7 @@ void glue(helper_psraw, SUFFIX)(Reg *d, Reg *s) #endif } -void glue(helper_psllw, SUFFIX)(Reg *d, Reg *s) +void glue(helper_psllw, SUFFIX)(CPUX86State *env, Reg *d, Reg *s) { int shift; @@ -104,7 +104,7 @@ void glue(helper_psllw, SUFFIX)(Reg *d, Reg *s) } } -void glue(helper_psrld, SUFFIX)(Reg *d, Reg *s) +void glue(helper_psrld, SUFFIX)(CPUX86State *env, Reg *d, Reg *s) { int shift; @@ -124,7 +124,7 @@ void glue(helper_psrld, SUFFIX)(Reg *d, Reg *s) } } -void glue(helper_psrad, SUFFIX)(Reg *d, Reg *s) +void glue(helper_psrad, SUFFIX)(CPUX86State *env, Reg *d, Reg *s) { int shift; @@ -141,7 +141,7 @@ void glue(helper_psrad, SUFFIX)(Reg *d, Reg *s) #endif } -void glue(helper_pslld, SUFFIX)(Reg *d, Reg *s) +void glue(helper_pslld, SUFFIX)(CPUX86State *env, Reg *d, Reg *s) { int shift; @@ -161,7 +161,7 @@ void glue(helper_pslld, SUFFIX)(Reg *d, Reg *s) } } -void glue(helper_psrlq, SUFFIX)(Reg *d, Reg *s) +void glue(helper_psrlq, SUFFIX)(CPUX86State *env, Reg *d, Reg *s) { int shift; @@ -179,7 +179,7 @@ void glue(helper_psrlq, SUFFIX)(Reg *d, Reg *s) } } -void glue(helper_psllq, SUFFIX)(Reg *d, Reg *s) +void glue(helper_psllq, SUFFIX)(CPUX86State *env, Reg *d, Reg *s) { int shift; @@ -198,7 +198,7 @@ void glue(helper_psllq, SUFFIX)(Reg *d, Reg *s) } #if SHIFT == 1 -void glue(helper_psrldq, SUFFIX)(Reg *d, Reg *s) +void glue(helper_psrldq, SUFFIX)(CPUX86State *env, Reg *d, Reg *s) { int shift, i; @@ -214,7 +214,7 @@ void glue(helper_psrldq, SUFFIX)(Reg *d, Reg *s) } } -void glue(helper_pslldq, SUFFIX)(Reg *d, Reg *s) +void glue(helper_pslldq, SUFFIX)(CPUX86State *env, Reg *d, Reg *s) { int shift, i; @@ -232,7 +232,7 @@ void glue(helper_pslldq, SUFFIX)(Reg *d, Reg *s) #endif #define SSE_HELPER_B(name, F) \ - void glue(name, SUFFIX)(Reg *d, Reg *s) \ + void glue(name, SUFFIX)(CPUX86State *env, Reg *d, Reg *s) \ { \ d->B(0) = F(d->B(0), s->B(0)); \ d->B(1) = F(d->B(1), s->B(1)); \ @@ -255,7 +255,7 @@ void glue(helper_pslldq, SUFFIX)(Reg *d, Reg *s) } #define SSE_HELPER_W(name, F) \ - void glue(name, SUFFIX)(Reg *d, Reg *s) \ + void glue(name, SUFFIX)(CPUX86State *env, Reg *d, Reg *s) \ { \ d->W(0) = F(d->W(0), s->W(0)); \ d->W(1) = F(d->W(1), s->W(1)); \ @@ -270,7 +270,7 @@ void glue(helper_pslldq, SUFFIX)(Reg *d, Reg *s) } #define SSE_HELPER_L(name, F) \ - void glue(name, SUFFIX)(Reg *d, Reg *s) \ + void glue(name, SUFFIX)(CPUX86State *env, Reg *d, Reg *s) \ { \ d->L(0) = F(d->L(0), s->L(0)); \ d->L(1) = F(d->L(1), s->L(1)); \ @@ -281,7 +281,7 @@ void glue(helper_pslldq, SUFFIX)(Reg *d, Reg *s) } #define SSE_HELPER_Q(name, F) \ - void glue(name, SUFFIX)(Reg *d, Reg *s) \ + void glue(name, SUFFIX)(CPUX86State *env, Reg *d, Reg *s) \ { \ d->Q(0) = F(d->Q(0), s->Q(0)); \ XMM_ONLY( \ @@ -417,7 +417,7 @@ SSE_HELPER_W(helper_pmulhw, FMULHW) SSE_HELPER_B(helper_pavgb, FAVG) SSE_HELPER_W(helper_pavgw, FAVG) -void glue(helper_pmuludq, SUFFIX)(Reg *d, Reg *s) +void glue(helper_pmuludq, SUFFIX)(CPUX86State *env, Reg *d, Reg *s) { d->Q(0) = (uint64_t)s->L(0) * (uint64_t)d->L(0); #if SHIFT == 1 @@ -425,7 +425,7 @@ void glue(helper_pmuludq, SUFFIX)(Reg *d, Reg *s) #endif } -void glue(helper_pmaddwd, SUFFIX)(Reg *d, Reg *s) +void glue(helper_pmaddwd, SUFFIX)(CPUX86State *env, Reg *d, Reg *s) { int i; @@ -445,7 +445,7 @@ static inline int abs1(int a) } } #endif -void glue(helper_psadbw, SUFFIX)(Reg *d, Reg *s) +void glue(helper_psadbw, SUFFIX)(CPUX86State *env, Reg *d, Reg *s) { unsigned int val; @@ -473,13 +473,14 @@ void glue(helper_psadbw, SUFFIX)(Reg *d, Reg *s) #endif } -void glue(helper_maskmov, SUFFIX)(Reg *d, Reg *s, target_ulong a0) +void glue(helper_maskmov, SUFFIX)(CPUX86State *env, Reg *d, Reg *s, + target_ulong a0) { int i; for (i = 0; i < (8 << SHIFT); i++) { if (s->B(i) & 0x80) { - stb(a0 + i, d->B(i)); + cpu_stb_data(env, a0 + i, d->B(i)); } } } @@ -575,29 +576,29 @@ void glue(helper_pshufhw, SUFFIX)(Reg *d, Reg *s, int order) /* FPU ops */ /* XXX: not accurate */ -#define SSE_HELPER_S(name, F) \ - void helper_ ## name ## ps(Reg *d, Reg *s) \ - { \ - d->XMM_S(0) = F(32, d->XMM_S(0), s->XMM_S(0)); \ - d->XMM_S(1) = F(32, d->XMM_S(1), s->XMM_S(1)); \ - d->XMM_S(2) = F(32, d->XMM_S(2), s->XMM_S(2)); \ - d->XMM_S(3) = F(32, d->XMM_S(3), s->XMM_S(3)); \ - } \ - \ - void helper_ ## name ## ss(Reg *d, Reg *s) \ - { \ - d->XMM_S(0) = F(32, d->XMM_S(0), s->XMM_S(0)); \ - } \ - \ - void helper_ ## name ## pd(Reg *d, Reg *s) \ - { \ - d->XMM_D(0) = F(64, d->XMM_D(0), s->XMM_D(0)); \ - d->XMM_D(1) = F(64, d->XMM_D(1), s->XMM_D(1)); \ - } \ - \ - void helper_ ## name ## sd(Reg *d, Reg *s) \ - { \ - d->XMM_D(0) = F(64, d->XMM_D(0), s->XMM_D(0)); \ +#define SSE_HELPER_S(name, F) \ + void helper_ ## name ## ps(CPUX86State *env, Reg *d, Reg *s) \ + { \ + d->XMM_S(0) = F(32, d->XMM_S(0), s->XMM_S(0)); \ + d->XMM_S(1) = F(32, d->XMM_S(1), s->XMM_S(1)); \ + d->XMM_S(2) = F(32, d->XMM_S(2), s->XMM_S(2)); \ + d->XMM_S(3) = F(32, d->XMM_S(3), s->XMM_S(3)); \ + } \ + \ + void helper_ ## name ## ss(CPUX86State *env, Reg *d, Reg *s) \ + { \ + d->XMM_S(0) = F(32, d->XMM_S(0), s->XMM_S(0)); \ + } \ + \ + void helper_ ## name ## pd(CPUX86State *env, Reg *d, Reg *s) \ + { \ + d->XMM_D(0) = F(64, d->XMM_D(0), s->XMM_D(0)); \ + d->XMM_D(1) = F(64, d->XMM_D(1), s->XMM_D(1)); \ + } \ + \ + void helper_ ## name ## sd(CPUX86State *env, Reg *d, Reg *s) \ + { \ + d->XMM_D(0) = F(64, d->XMM_D(0), s->XMM_D(0)); \ } #define FPU_ADD(size, a, b) float ## size ## _add(a, b, &env->sse_status) @@ -625,7 +626,7 @@ SSE_HELPER_S(sqrt, FPU_SQRT) /* float to float conversions */ -void helper_cvtps2pd(Reg *d, Reg *s) +void helper_cvtps2pd(CPUX86State *env, Reg *d, Reg *s) { float32 s0, s1; @@ -635,25 +636,25 @@ void helper_cvtps2pd(Reg *d, Reg *s) d->XMM_D(1) = float32_to_float64(s1, &env->sse_status); } -void helper_cvtpd2ps(Reg *d, Reg *s) +void helper_cvtpd2ps(CPUX86State *env, Reg *d, Reg *s) { d->XMM_S(0) = float64_to_float32(s->XMM_D(0), &env->sse_status); d->XMM_S(1) = float64_to_float32(s->XMM_D(1), &env->sse_status); d->Q(1) = 0; } -void helper_cvtss2sd(Reg *d, Reg *s) +void helper_cvtss2sd(CPUX86State *env, Reg *d, Reg *s) { d->XMM_D(0) = float32_to_float64(s->XMM_S(0), &env->sse_status); } -void helper_cvtsd2ss(Reg *d, Reg *s) +void helper_cvtsd2ss(CPUX86State *env, Reg *d, Reg *s) { d->XMM_S(0) = float64_to_float32(s->XMM_D(0), &env->sse_status); } /* integer to float */ -void helper_cvtdq2ps(Reg *d, Reg *s) +void helper_cvtdq2ps(CPUX86State *env, Reg *d, Reg *s) { d->XMM_S(0) = int32_to_float32(s->XMM_L(0), &env->sse_status); d->XMM_S(1) = int32_to_float32(s->XMM_L(1), &env->sse_status); @@ -661,7 +662,7 @@ void helper_cvtdq2ps(Reg *d, Reg *s) d->XMM_S(3) = int32_to_float32(s->XMM_L(3), &env->sse_status); } -void helper_cvtdq2pd(Reg *d, Reg *s) +void helper_cvtdq2pd(CPUX86State *env, Reg *d, Reg *s) { int32_t l0, l1; @@ -671,42 +672,42 @@ void helper_cvtdq2pd(Reg *d, Reg *s) d->XMM_D(1) = int32_to_float64(l1, &env->sse_status); } -void helper_cvtpi2ps(XMMReg *d, MMXReg *s) +void helper_cvtpi2ps(CPUX86State *env, XMMReg *d, MMXReg *s) { d->XMM_S(0) = int32_to_float32(s->MMX_L(0), &env->sse_status); d->XMM_S(1) = int32_to_float32(s->MMX_L(1), &env->sse_status); } -void helper_cvtpi2pd(XMMReg *d, MMXReg *s) +void helper_cvtpi2pd(CPUX86State *env, XMMReg *d, MMXReg *s) { d->XMM_D(0) = int32_to_float64(s->MMX_L(0), &env->sse_status); d->XMM_D(1) = int32_to_float64(s->MMX_L(1), &env->sse_status); } -void helper_cvtsi2ss(XMMReg *d, uint32_t val) +void helper_cvtsi2ss(CPUX86State *env, XMMReg *d, uint32_t val) { d->XMM_S(0) = int32_to_float32(val, &env->sse_status); } -void helper_cvtsi2sd(XMMReg *d, uint32_t val) +void helper_cvtsi2sd(CPUX86State *env, XMMReg *d, uint32_t val) { d->XMM_D(0) = int32_to_float64(val, &env->sse_status); } #ifdef TARGET_X86_64 -void helper_cvtsq2ss(XMMReg *d, uint64_t val) +void helper_cvtsq2ss(CPUX86State *env, XMMReg *d, uint64_t val) { d->XMM_S(0) = int64_to_float32(val, &env->sse_status); } -void helper_cvtsq2sd(XMMReg *d, uint64_t val) +void helper_cvtsq2sd(CPUX86State *env, XMMReg *d, uint64_t val) { d->XMM_D(0) = int64_to_float64(val, &env->sse_status); } #endif /* float to integer */ -void helper_cvtps2dq(XMMReg *d, XMMReg *s) +void helper_cvtps2dq(CPUX86State *env, XMMReg *d, XMMReg *s) { d->XMM_L(0) = float32_to_int32(s->XMM_S(0), &env->sse_status); d->XMM_L(1) = float32_to_int32(s->XMM_S(1), &env->sse_status); @@ -714,49 +715,49 @@ void helper_cvtps2dq(XMMReg *d, XMMReg *s) d->XMM_L(3) = float32_to_int32(s->XMM_S(3), &env->sse_status); } -void helper_cvtpd2dq(XMMReg *d, XMMReg *s) +void helper_cvtpd2dq(CPUX86State *env, XMMReg *d, XMMReg *s) { d->XMM_L(0) = float64_to_int32(s->XMM_D(0), &env->sse_status); d->XMM_L(1) = float64_to_int32(s->XMM_D(1), &env->sse_status); d->XMM_Q(1) = 0; } -void helper_cvtps2pi(MMXReg *d, XMMReg *s) +void helper_cvtps2pi(CPUX86State *env, MMXReg *d, XMMReg *s) { d->MMX_L(0) = float32_to_int32(s->XMM_S(0), &env->sse_status); d->MMX_L(1) = float32_to_int32(s->XMM_S(1), &env->sse_status); } -void helper_cvtpd2pi(MMXReg *d, XMMReg *s) +void helper_cvtpd2pi(CPUX86State *env, MMXReg *d, XMMReg *s) { d->MMX_L(0) = float64_to_int32(s->XMM_D(0), &env->sse_status); d->MMX_L(1) = float64_to_int32(s->XMM_D(1), &env->sse_status); } -int32_t helper_cvtss2si(XMMReg *s) +int32_t helper_cvtss2si(CPUX86State *env, XMMReg *s) { return float32_to_int32(s->XMM_S(0), &env->sse_status); } -int32_t helper_cvtsd2si(XMMReg *s) +int32_t helper_cvtsd2si(CPUX86State *env, XMMReg *s) { return float64_to_int32(s->XMM_D(0), &env->sse_status); } #ifdef TARGET_X86_64 -int64_t helper_cvtss2sq(XMMReg *s) +int64_t helper_cvtss2sq(CPUX86State *env, XMMReg *s) { return float32_to_int64(s->XMM_S(0), &env->sse_status); } -int64_t helper_cvtsd2sq(XMMReg *s) +int64_t helper_cvtsd2sq(CPUX86State *env, XMMReg *s) { return float64_to_int64(s->XMM_D(0), &env->sse_status); } #endif /* float to integer truncated */ -void helper_cvttps2dq(XMMReg *d, XMMReg *s) +void helper_cvttps2dq(CPUX86State *env, XMMReg *d, XMMReg *s) { d->XMM_L(0) = float32_to_int32_round_to_zero(s->XMM_S(0), &env->sse_status); d->XMM_L(1) = float32_to_int32_round_to_zero(s->XMM_S(1), &env->sse_status); @@ -764,48 +765,48 @@ void helper_cvttps2dq(XMMReg *d, XMMReg *s) d->XMM_L(3) = float32_to_int32_round_to_zero(s->XMM_S(3), &env->sse_status); } -void helper_cvttpd2dq(XMMReg *d, XMMReg *s) +void helper_cvttpd2dq(CPUX86State *env, XMMReg *d, XMMReg *s) { d->XMM_L(0) = float64_to_int32_round_to_zero(s->XMM_D(0), &env->sse_status); d->XMM_L(1) = float64_to_int32_round_to_zero(s->XMM_D(1), &env->sse_status); d->XMM_Q(1) = 0; } -void helper_cvttps2pi(MMXReg *d, XMMReg *s) +void helper_cvttps2pi(CPUX86State *env, MMXReg *d, XMMReg *s) { d->MMX_L(0) = float32_to_int32_round_to_zero(s->XMM_S(0), &env->sse_status); d->MMX_L(1) = float32_to_int32_round_to_zero(s->XMM_S(1), &env->sse_status); } -void helper_cvttpd2pi(MMXReg *d, XMMReg *s) +void helper_cvttpd2pi(CPUX86State *env, MMXReg *d, XMMReg *s) { d->MMX_L(0) = float64_to_int32_round_to_zero(s->XMM_D(0), &env->sse_status); d->MMX_L(1) = float64_to_int32_round_to_zero(s->XMM_D(1), &env->sse_status); } -int32_t helper_cvttss2si(XMMReg *s) +int32_t helper_cvttss2si(CPUX86State *env, XMMReg *s) { return float32_to_int32_round_to_zero(s->XMM_S(0), &env->sse_status); } -int32_t helper_cvttsd2si(XMMReg *s) +int32_t helper_cvttsd2si(CPUX86State *env, XMMReg *s) { return float64_to_int32_round_to_zero(s->XMM_D(0), &env->sse_status); } #ifdef TARGET_X86_64 -int64_t helper_cvttss2sq(XMMReg *s) +int64_t helper_cvttss2sq(CPUX86State *env, XMMReg *s) { return float32_to_int64_round_to_zero(s->XMM_S(0), &env->sse_status); } -int64_t helper_cvttsd2sq(XMMReg *s) +int64_t helper_cvttsd2sq(CPUX86State *env, XMMReg *s) { return float64_to_int64_round_to_zero(s->XMM_D(0), &env->sse_status); } #endif -void helper_rsqrtps(XMMReg *d, XMMReg *s) +void helper_rsqrtps(CPUX86State *env, XMMReg *d, XMMReg *s) { d->XMM_S(0) = float32_div(float32_one, float32_sqrt(s->XMM_S(0), &env->sse_status), @@ -821,14 +822,14 @@ void helper_rsqrtps(XMMReg *d, XMMReg *s) &env->sse_status); } -void helper_rsqrtss(XMMReg *d, XMMReg *s) +void helper_rsqrtss(CPUX86State *env, XMMReg *d, XMMReg *s) { d->XMM_S(0) = float32_div(float32_one, float32_sqrt(s->XMM_S(0), &env->sse_status), &env->sse_status); } -void helper_rcpps(XMMReg *d, XMMReg *s) +void helper_rcpps(CPUX86State *env, XMMReg *d, XMMReg *s) { d->XMM_S(0) = float32_div(float32_one, s->XMM_S(0), &env->sse_status); d->XMM_S(1) = float32_div(float32_one, s->XMM_S(1), &env->sse_status); @@ -836,7 +837,7 @@ void helper_rcpps(XMMReg *d, XMMReg *s) d->XMM_S(3) = float32_div(float32_one, s->XMM_S(3), &env->sse_status); } -void helper_rcpss(XMMReg *d, XMMReg *s) +void helper_rcpss(CPUX86State *env, XMMReg *d, XMMReg *s) { d->XMM_S(0) = float32_div(float32_one, s->XMM_S(0), &env->sse_status); } @@ -853,12 +854,12 @@ static inline uint64_t helper_extrq(uint64_t src, int shift, int len) return (src >> shift) & mask; } -void helper_extrq_r(XMMReg *d, XMMReg *s) +void helper_extrq_r(CPUX86State *env, XMMReg *d, XMMReg *s) { d->XMM_Q(0) = helper_extrq(d->XMM_Q(0), s->XMM_B(1), s->XMM_B(0)); } -void helper_extrq_i(XMMReg *d, int index, int length) +void helper_extrq_i(CPUX86State *env, XMMReg *d, int index, int length) { d->XMM_Q(0) = helper_extrq(d->XMM_Q(0), index, length); } @@ -875,17 +876,17 @@ static inline uint64_t helper_insertq(uint64_t src, int shift, int len) return (src & ~(mask << shift)) | ((src & mask) << shift); } -void helper_insertq_r(XMMReg *d, XMMReg *s) +void helper_insertq_r(CPUX86State *env, XMMReg *d, XMMReg *s) { d->XMM_Q(0) = helper_insertq(s->XMM_Q(0), s->XMM_B(9), s->XMM_B(8)); } -void helper_insertq_i(XMMReg *d, int index, int length) +void helper_insertq_i(CPUX86State *env, XMMReg *d, int index, int length) { d->XMM_Q(0) = helper_insertq(d->XMM_Q(0), index, length); } -void helper_haddps(XMMReg *d, XMMReg *s) +void helper_haddps(CPUX86State *env, XMMReg *d, XMMReg *s) { XMMReg r; @@ -896,7 +897,7 @@ void helper_haddps(XMMReg *d, XMMReg *s) *d = r; } -void helper_haddpd(XMMReg *d, XMMReg *s) +void helper_haddpd(CPUX86State *env, XMMReg *d, XMMReg *s) { XMMReg r; @@ -905,7 +906,7 @@ void helper_haddpd(XMMReg *d, XMMReg *s) *d = r; } -void helper_hsubps(XMMReg *d, XMMReg *s) +void helper_hsubps(CPUX86State *env, XMMReg *d, XMMReg *s) { XMMReg r; @@ -916,7 +917,7 @@ void helper_hsubps(XMMReg *d, XMMReg *s) *d = r; } -void helper_hsubpd(XMMReg *d, XMMReg *s) +void helper_hsubpd(CPUX86State *env, XMMReg *d, XMMReg *s) { XMMReg r; @@ -925,7 +926,7 @@ void helper_hsubpd(XMMReg *d, XMMReg *s) *d = r; } -void helper_addsubps(XMMReg *d, XMMReg *s) +void helper_addsubps(CPUX86State *env, XMMReg *d, XMMReg *s) { d->XMM_S(0) = float32_sub(d->XMM_S(0), s->XMM_S(0), &env->sse_status); d->XMM_S(1) = float32_add(d->XMM_S(1), s->XMM_S(1), &env->sse_status); @@ -933,36 +934,36 @@ void helper_addsubps(XMMReg *d, XMMReg *s) d->XMM_S(3) = float32_add(d->XMM_S(3), s->XMM_S(3), &env->sse_status); } -void helper_addsubpd(XMMReg *d, XMMReg *s) +void helper_addsubpd(CPUX86State *env, XMMReg *d, XMMReg *s) { d->XMM_D(0) = float64_sub(d->XMM_D(0), s->XMM_D(0), &env->sse_status); d->XMM_D(1) = float64_add(d->XMM_D(1), s->XMM_D(1), &env->sse_status); } /* XXX: unordered */ -#define SSE_HELPER_CMP(name, F) \ - void helper_ ## name ## ps(Reg *d, Reg *s) \ - { \ - d->XMM_L(0) = F(32, d->XMM_S(0), s->XMM_S(0)); \ - d->XMM_L(1) = F(32, d->XMM_S(1), s->XMM_S(1)); \ - d->XMM_L(2) = F(32, d->XMM_S(2), s->XMM_S(2)); \ - d->XMM_L(3) = F(32, d->XMM_S(3), s->XMM_S(3)); \ - } \ - \ - void helper_ ## name ## ss(Reg *d, Reg *s) \ - { \ - d->XMM_L(0) = F(32, d->XMM_S(0), s->XMM_S(0)); \ - } \ - \ - void helper_ ## name ## pd(Reg *d, Reg *s) \ - { \ - d->XMM_Q(0) = F(64, d->XMM_D(0), s->XMM_D(0)); \ - d->XMM_Q(1) = F(64, d->XMM_D(1), s->XMM_D(1)); \ - } \ - \ - void helper_ ## name ## sd(Reg *d, Reg *s) \ - { \ - d->XMM_Q(0) = F(64, d->XMM_D(0), s->XMM_D(0)); \ +#define SSE_HELPER_CMP(name, F) \ + void helper_ ## name ## ps(CPUX86State *env, Reg *d, Reg *s) \ + { \ + d->XMM_L(0) = F(32, d->XMM_S(0), s->XMM_S(0)); \ + d->XMM_L(1) = F(32, d->XMM_S(1), s->XMM_S(1)); \ + d->XMM_L(2) = F(32, d->XMM_S(2), s->XMM_S(2)); \ + d->XMM_L(3) = F(32, d->XMM_S(3), s->XMM_S(3)); \ + } \ + \ + void helper_ ## name ## ss(CPUX86State *env, Reg *d, Reg *s) \ + { \ + d->XMM_L(0) = F(32, d->XMM_S(0), s->XMM_S(0)); \ + } \ + \ + void helper_ ## name ## pd(CPUX86State *env, Reg *d, Reg *s) \ + { \ + d->XMM_Q(0) = F(64, d->XMM_D(0), s->XMM_D(0)); \ + d->XMM_Q(1) = F(64, d->XMM_D(1), s->XMM_D(1)); \ + } \ + \ + void helper_ ## name ## sd(CPUX86State *env, Reg *d, Reg *s) \ + { \ + d->XMM_Q(0) = F(64, d->XMM_D(0), s->XMM_D(0)); \ } #define FPU_CMPEQ(size, a, b) \ @@ -993,7 +994,7 @@ SSE_HELPER_CMP(cmpord, FPU_CMPORD) static const int comis_eflags[4] = {CC_C, CC_Z, 0, CC_Z | CC_P | CC_C}; -void helper_ucomiss(Reg *d, Reg *s) +void helper_ucomiss(CPUX86State *env, Reg *d, Reg *s) { int ret; float32 s0, s1; @@ -1004,7 +1005,7 @@ void helper_ucomiss(Reg *d, Reg *s) CC_SRC = comis_eflags[ret + 1]; } -void helper_comiss(Reg *d, Reg *s) +void helper_comiss(CPUX86State *env, Reg *d, Reg *s) { int ret; float32 s0, s1; @@ -1015,7 +1016,7 @@ void helper_comiss(Reg *d, Reg *s) CC_SRC = comis_eflags[ret + 1]; } -void helper_ucomisd(Reg *d, Reg *s) +void helper_ucomisd(CPUX86State *env, Reg *d, Reg *s) { int ret; float64 d0, d1; @@ -1026,7 +1027,7 @@ void helper_ucomisd(Reg *d, Reg *s) CC_SRC = comis_eflags[ret + 1]; } -void helper_comisd(Reg *d, Reg *s) +void helper_comisd(CPUX86State *env, Reg *d, Reg *s) { int ret; float64 d0, d1; @@ -1037,7 +1038,7 @@ void helper_comisd(Reg *d, Reg *s) CC_SRC = comis_eflags[ret + 1]; } -uint32_t helper_movmskps(Reg *s) +uint32_t helper_movmskps(CPUX86State *env, Reg *s) { int b0, b1, b2, b3; @@ -1048,7 +1049,7 @@ uint32_t helper_movmskps(Reg *s) return b0 | (b1 << 1) | (b2 << 2) | (b3 << 3); } -uint32_t helper_movmskpd(Reg *s) +uint32_t helper_movmskpd(CPUX86State *env, Reg *s) { int b0, b1; @@ -1059,7 +1060,7 @@ uint32_t helper_movmskpd(Reg *s) #endif -uint32_t glue(helper_pmovmskb, SUFFIX)(Reg *s) +uint32_t glue(helper_pmovmskb, SUFFIX)(CPUX86State *env, Reg *s) { uint32_t val; @@ -1085,7 +1086,7 @@ uint32_t glue(helper_pmovmskb, SUFFIX)(Reg *s) return val; } -void glue(helper_packsswb, SUFFIX)(Reg *d, Reg *s) +void glue(helper_packsswb, SUFFIX)(CPUX86State *env, Reg *d, Reg *s) { Reg r; @@ -1112,7 +1113,7 @@ void glue(helper_packsswb, SUFFIX)(Reg *d, Reg *s) *d = r; } -void glue(helper_packuswb, SUFFIX)(Reg *d, Reg *s) +void glue(helper_packuswb, SUFFIX)(CPUX86State *env, Reg *d, Reg *s) { Reg r; @@ -1139,7 +1140,7 @@ void glue(helper_packuswb, SUFFIX)(Reg *d, Reg *s) *d = r; } -void glue(helper_packssdw, SUFFIX)(Reg *d, Reg *s) +void glue(helper_packssdw, SUFFIX)(CPUX86State *env, Reg *d, Reg *s) { Reg r; @@ -1160,7 +1161,8 @@ void glue(helper_packssdw, SUFFIX)(Reg *d, Reg *s) #define UNPCK_OP(base_name, base) \ \ - void glue(helper_punpck ## base_name ## bw, SUFFIX)(Reg *d, Reg *s) \ + void glue(helper_punpck ## base_name ## bw, SUFFIX)(CPUX86State *env,\ + Reg *d, Reg *s) \ { \ Reg r; \ \ @@ -1181,11 +1183,12 @@ void glue(helper_packssdw, SUFFIX)(Reg *d, Reg *s) r.B(13) = s->B((base << (SHIFT + 2)) + 6); \ r.B(14) = d->B((base << (SHIFT + 2)) + 7); \ r.B(15) = s->B((base << (SHIFT + 2)) + 7); \ - ) \ + ) \ *d = r; \ } \ \ - void glue(helper_punpck ## base_name ## wd, SUFFIX)(Reg *d, Reg *s) \ + void glue(helper_punpck ## base_name ## wd, SUFFIX)(CPUX86State *env,\ + Reg *d, Reg *s) \ { \ Reg r; \ \ @@ -1198,11 +1201,12 @@ void glue(helper_packssdw, SUFFIX)(Reg *d, Reg *s) r.W(5) = s->W((base << (SHIFT + 1)) + 2); \ r.W(6) = d->W((base << (SHIFT + 1)) + 3); \ r.W(7) = s->W((base << (SHIFT + 1)) + 3); \ - ) \ + ) \ *d = r; \ } \ \ - void glue(helper_punpck ## base_name ## dq, SUFFIX)(Reg *d, Reg *s) \ + void glue(helper_punpck ## base_name ## dq, SUFFIX)(CPUX86State *env,\ + Reg *d, Reg *s) \ { \ Reg r; \ \ @@ -1211,12 +1215,14 @@ void glue(helper_packssdw, SUFFIX)(Reg *d, Reg *s) XMM_ONLY( \ r.L(2) = d->L((base << SHIFT) + 1); \ r.L(3) = s->L((base << SHIFT) + 1); \ - ) \ + ) \ *d = r; \ } \ \ XMM_ONLY( \ - void glue(helper_punpck ## base_name ## qdq, SUFFIX)(Reg *d, \ + void glue(helper_punpck ## base_name ## qdq, SUFFIX)(CPUX86State \ + *env, \ + Reg *d, \ Reg *s) \ { \ Reg r; \ @@ -1232,25 +1238,25 @@ UNPCK_OP(h, 1) /* 3DNow! float ops */ #if SHIFT == 0 -void helper_pi2fd(MMXReg *d, MMXReg *s) +void helper_pi2fd(CPUX86State *env, MMXReg *d, MMXReg *s) { d->MMX_S(0) = int32_to_float32(s->MMX_L(0), &env->mmx_status); d->MMX_S(1) = int32_to_float32(s->MMX_L(1), &env->mmx_status); } -void helper_pi2fw(MMXReg *d, MMXReg *s) +void helper_pi2fw(CPUX86State *env, MMXReg *d, MMXReg *s) { d->MMX_S(0) = int32_to_float32((int16_t)s->MMX_W(0), &env->mmx_status); d->MMX_S(1) = int32_to_float32((int16_t)s->MMX_W(2), &env->mmx_status); } -void helper_pf2id(MMXReg *d, MMXReg *s) +void helper_pf2id(CPUX86State *env, MMXReg *d, MMXReg *s) { d->MMX_L(0) = float32_to_int32_round_to_zero(s->MMX_S(0), &env->mmx_status); d->MMX_L(1) = float32_to_int32_round_to_zero(s->MMX_S(1), &env->mmx_status); } -void helper_pf2iw(MMXReg *d, MMXReg *s) +void helper_pf2iw(CPUX86State *env, MMXReg *d, MMXReg *s) { d->MMX_L(0) = satsw(float32_to_int32_round_to_zero(s->MMX_S(0), &env->mmx_status)); @@ -1258,7 +1264,7 @@ void helper_pf2iw(MMXReg *d, MMXReg *s) &env->mmx_status)); } -void helper_pfacc(MMXReg *d, MMXReg *s) +void helper_pfacc(CPUX86State *env, MMXReg *d, MMXReg *s) { MMXReg r; @@ -1267,13 +1273,13 @@ void helper_pfacc(MMXReg *d, MMXReg *s) *d = r; } -void helper_pfadd(MMXReg *d, MMXReg *s) +void helper_pfadd(CPUX86State *env, MMXReg *d, MMXReg *s) { d->MMX_S(0) = float32_add(d->MMX_S(0), s->MMX_S(0), &env->mmx_status); d->MMX_S(1) = float32_add(d->MMX_S(1), s->MMX_S(1), &env->mmx_status); } -void helper_pfcmpeq(MMXReg *d, MMXReg *s) +void helper_pfcmpeq(CPUX86State *env, MMXReg *d, MMXReg *s) { d->MMX_L(0) = float32_eq_quiet(d->MMX_S(0), s->MMX_S(0), &env->mmx_status) ? -1 : 0; @@ -1281,7 +1287,7 @@ void helper_pfcmpeq(MMXReg *d, MMXReg *s) &env->mmx_status) ? -1 : 0; } -void helper_pfcmpge(MMXReg *d, MMXReg *s) +void helper_pfcmpge(CPUX86State *env, MMXReg *d, MMXReg *s) { d->MMX_L(0) = float32_le(s->MMX_S(0), d->MMX_S(0), &env->mmx_status) ? -1 : 0; @@ -1289,7 +1295,7 @@ void helper_pfcmpge(MMXReg *d, MMXReg *s) &env->mmx_status) ? -1 : 0; } -void helper_pfcmpgt(MMXReg *d, MMXReg *s) +void helper_pfcmpgt(CPUX86State *env, MMXReg *d, MMXReg *s) { d->MMX_L(0) = float32_lt(s->MMX_S(0), d->MMX_S(0), &env->mmx_status) ? -1 : 0; @@ -1297,7 +1303,7 @@ void helper_pfcmpgt(MMXReg *d, MMXReg *s) &env->mmx_status) ? -1 : 0; } -void helper_pfmax(MMXReg *d, MMXReg *s) +void helper_pfmax(CPUX86State *env, MMXReg *d, MMXReg *s) { if (float32_lt(d->MMX_S(0), s->MMX_S(0), &env->mmx_status)) { d->MMX_S(0) = s->MMX_S(0); @@ -1307,7 +1313,7 @@ void helper_pfmax(MMXReg *d, MMXReg *s) } } -void helper_pfmin(MMXReg *d, MMXReg *s) +void helper_pfmin(CPUX86State *env, MMXReg *d, MMXReg *s) { if (float32_lt(s->MMX_S(0), d->MMX_S(0), &env->mmx_status)) { d->MMX_S(0) = s->MMX_S(0); @@ -1317,13 +1323,13 @@ void helper_pfmin(MMXReg *d, MMXReg *s) } } -void helper_pfmul(MMXReg *d, MMXReg *s) +void helper_pfmul(CPUX86State *env, MMXReg *d, MMXReg *s) { d->MMX_S(0) = float32_mul(d->MMX_S(0), s->MMX_S(0), &env->mmx_status); d->MMX_S(1) = float32_mul(d->MMX_S(1), s->MMX_S(1), &env->mmx_status); } -void helper_pfnacc(MMXReg *d, MMXReg *s) +void helper_pfnacc(CPUX86State *env, MMXReg *d, MMXReg *s) { MMXReg r; @@ -1332,7 +1338,7 @@ void helper_pfnacc(MMXReg *d, MMXReg *s) *d = r; } -void helper_pfpnacc(MMXReg *d, MMXReg *s) +void helper_pfpnacc(CPUX86State *env, MMXReg *d, MMXReg *s) { MMXReg r; @@ -1341,13 +1347,13 @@ void helper_pfpnacc(MMXReg *d, MMXReg *s) *d = r; } -void helper_pfrcp(MMXReg *d, MMXReg *s) +void helper_pfrcp(CPUX86State *env, MMXReg *d, MMXReg *s) { d->MMX_S(0) = float32_div(float32_one, s->MMX_S(0), &env->mmx_status); d->MMX_S(1) = d->MMX_S(0); } -void helper_pfrsqrt(MMXReg *d, MMXReg *s) +void helper_pfrsqrt(CPUX86State *env, MMXReg *d, MMXReg *s) { d->MMX_L(1) = s->MMX_L(0) & 0x7fffffff; d->MMX_S(1) = float32_div(float32_one, @@ -1357,19 +1363,19 @@ void helper_pfrsqrt(MMXReg *d, MMXReg *s) d->MMX_L(0) = d->MMX_L(1); } -void helper_pfsub(MMXReg *d, MMXReg *s) +void helper_pfsub(CPUX86State *env, MMXReg *d, MMXReg *s) { d->MMX_S(0) = float32_sub(d->MMX_S(0), s->MMX_S(0), &env->mmx_status); d->MMX_S(1) = float32_sub(d->MMX_S(1), s->MMX_S(1), &env->mmx_status); } -void helper_pfsubr(MMXReg *d, MMXReg *s) +void helper_pfsubr(CPUX86State *env, MMXReg *d, MMXReg *s) { d->MMX_S(0) = float32_sub(s->MMX_S(0), d->MMX_S(0), &env->mmx_status); d->MMX_S(1) = float32_sub(s->MMX_S(1), d->MMX_S(1), &env->mmx_status); } -void helper_pswapd(MMXReg *d, MMXReg *s) +void helper_pswapd(CPUX86State *env, MMXReg *d, MMXReg *s) { MMXReg r; @@ -1380,7 +1386,7 @@ void helper_pswapd(MMXReg *d, MMXReg *s) #endif /* SSSE3 op helpers */ -void glue(helper_pshufb, SUFFIX)(Reg *d, Reg *s) +void glue(helper_pshufb, SUFFIX)(CPUX86State *env, Reg *d, Reg *s) { int i; Reg r; @@ -1392,7 +1398,7 @@ void glue(helper_pshufb, SUFFIX)(Reg *d, Reg *s) *d = r; } -void glue(helper_phaddw, SUFFIX)(Reg *d, Reg *s) +void glue(helper_phaddw, SUFFIX)(CPUX86State *env, Reg *d, Reg *s) { d->W(0) = (int16_t)d->W(0) + (int16_t)d->W(1); d->W(1) = (int16_t)d->W(2) + (int16_t)d->W(3); @@ -1404,7 +1410,7 @@ void glue(helper_phaddw, SUFFIX)(Reg *d, Reg *s) XMM_ONLY(d->W(7) = (int16_t)s->W(6) + (int16_t)s->W(7)); } -void glue(helper_phaddd, SUFFIX)(Reg *d, Reg *s) +void glue(helper_phaddd, SUFFIX)(CPUX86State *env, Reg *d, Reg *s) { d->L(0) = (int32_t)d->L(0) + (int32_t)d->L(1); XMM_ONLY(d->L(1) = (int32_t)d->L(2) + (int32_t)d->L(3)); @@ -1412,7 +1418,7 @@ void glue(helper_phaddd, SUFFIX)(Reg *d, Reg *s) XMM_ONLY(d->L(3) = (int32_t)s->L(2) + (int32_t)s->L(3)); } -void glue(helper_phaddsw, SUFFIX)(Reg *d, Reg *s) +void glue(helper_phaddsw, SUFFIX)(CPUX86State *env, Reg *d, Reg *s) { d->W(0) = satsw((int16_t)d->W(0) + (int16_t)d->W(1)); d->W(1) = satsw((int16_t)d->W(2) + (int16_t)d->W(3)); @@ -1424,7 +1430,7 @@ void glue(helper_phaddsw, SUFFIX)(Reg *d, Reg *s) XMM_ONLY(d->W(7) = satsw((int16_t)s->W(6) + (int16_t)s->W(7))); } -void glue(helper_pmaddubsw, SUFFIX)(Reg *d, Reg *s) +void glue(helper_pmaddubsw, SUFFIX)(CPUX86State *env, Reg *d, Reg *s) { d->W(0) = satsw((int8_t)s->B(0) * (uint8_t)d->B(0) + (int8_t)s->B(1) * (uint8_t)d->B(1)); @@ -1446,7 +1452,7 @@ void glue(helper_pmaddubsw, SUFFIX)(Reg *d, Reg *s) #endif } -void glue(helper_phsubw, SUFFIX)(Reg *d, Reg *s) +void glue(helper_phsubw, SUFFIX)(CPUX86State *env, Reg *d, Reg *s) { d->W(0) = (int16_t)d->W(0) - (int16_t)d->W(1); d->W(1) = (int16_t)d->W(2) - (int16_t)d->W(3); @@ -1458,7 +1464,7 @@ void glue(helper_phsubw, SUFFIX)(Reg *d, Reg *s) XMM_ONLY(d->W(7) = (int16_t)s->W(6) - (int16_t)s->W(7)); } -void glue(helper_phsubd, SUFFIX)(Reg *d, Reg *s) +void glue(helper_phsubd, SUFFIX)(CPUX86State *env, Reg *d, Reg *s) { d->L(0) = (int32_t)d->L(0) - (int32_t)d->L(1); XMM_ONLY(d->L(1) = (int32_t)d->L(2) - (int32_t)d->L(3)); @@ -1466,7 +1472,7 @@ void glue(helper_phsubd, SUFFIX)(Reg *d, Reg *s) XMM_ONLY(d->L(3) = (int32_t)s->L(2) - (int32_t)s->L(3)); } -void glue(helper_phsubsw, SUFFIX)(Reg *d, Reg *s) +void glue(helper_phsubsw, SUFFIX)(CPUX86State *env, Reg *d, Reg *s) { d->W(0) = satsw((int16_t)d->W(0) - (int16_t)d->W(1)); d->W(1) = satsw((int16_t)d->W(2) - (int16_t)d->W(3)); @@ -1495,7 +1501,8 @@ SSE_HELPER_B(helper_psignb, FSIGNB) SSE_HELPER_W(helper_psignw, FSIGNW) SSE_HELPER_L(helper_psignd, FSIGNL) -void glue(helper_palignr, SUFFIX)(Reg *d, Reg *s, int32_t shift) +void glue(helper_palignr, SUFFIX)(CPUX86State *env, Reg *d, Reg *s, + int32_t shift) { Reg r; @@ -1529,7 +1536,7 @@ void glue(helper_palignr, SUFFIX)(Reg *d, Reg *s, int32_t shift) #if SHIFT == 1 #define SSE_HELPER_V(name, elem, num, F) \ - void glue(name, SUFFIX)(Reg *d, Reg *s) \ + void glue(name, SUFFIX)(CPUX86State *env, Reg *d, Reg *s) \ { \ d->elem(0) = F(d->elem(0), s->elem(0), XMM0.elem(0)); \ d->elem(1) = F(d->elem(1), s->elem(1), XMM0.elem(1)); \ @@ -1556,7 +1563,7 @@ void glue(helper_palignr, SUFFIX)(Reg *d, Reg *s, int32_t shift) } #define SSE_HELPER_I(name, elem, num, F) \ - void glue(name, SUFFIX)(Reg *d, Reg *s, uint32_t imm) \ + void glue(name, SUFFIX)(CPUX86State *env, Reg *d, Reg *s, uint32_t imm) \ { \ d->elem(0) = F(d->elem(0), s->elem(0), ((imm >> 0) & 1)); \ d->elem(1) = F(d->elem(1), s->elem(1), ((imm >> 1) & 1)); \ @@ -1596,7 +1603,7 @@ SSE_HELPER_V(helper_pblendvb, B, 16, FBLENDVB) SSE_HELPER_V(helper_blendvps, L, 4, FBLENDVPS) SSE_HELPER_V(helper_blendvpd, Q, 2, FBLENDVPD) -void glue(helper_ptest, SUFFIX)(Reg *d, Reg *s) +void glue(helper_ptest, SUFFIX)(CPUX86State *env, Reg *d, Reg *s) { uint64_t zf = (s->Q(0) & d->Q(0)) | (s->Q(1) & d->Q(1)); uint64_t cf = (s->Q(0) & ~d->Q(0)) | (s->Q(1) & ~d->Q(1)); @@ -1605,7 +1612,7 @@ void glue(helper_ptest, SUFFIX)(Reg *d, Reg *s) } #define SSE_HELPER_F(name, elem, num, F) \ - void glue(name, SUFFIX)(Reg *d, Reg *s) \ + void glue(name, SUFFIX)(CPUX86State *env, Reg *d, Reg *s) \ { \ d->elem(0) = F(0); \ d->elem(1) = F(1); \ @@ -1634,7 +1641,7 @@ SSE_HELPER_F(helper_pmovzxwd, L, 4, s->W) SSE_HELPER_F(helper_pmovzxwq, Q, 2, s->W) SSE_HELPER_F(helper_pmovzxdq, Q, 2, s->L) -void glue(helper_pmuldq, SUFFIX)(Reg *d, Reg *s) +void glue(helper_pmuldq, SUFFIX)(CPUX86State *env, Reg *d, Reg *s) { d->Q(0) = (int64_t)(int32_t) d->L(0) * (int32_t) s->L(0); d->Q(1) = (int64_t)(int32_t) d->L(2) * (int32_t) s->L(2); @@ -1643,7 +1650,7 @@ void glue(helper_pmuldq, SUFFIX)(Reg *d, Reg *s) #define FCMPEQQ(d, s) (d == s ? -1 : 0) SSE_HELPER_Q(helper_pcmpeqq, FCMPEQQ) -void glue(helper_packusdw, SUFFIX)(Reg *d, Reg *s) +void glue(helper_packusdw, SUFFIX)(CPUX86State *env, Reg *d, Reg *s) { d->W(0) = satuw((int32_t) d->L(0)); d->W(1) = satuw((int32_t) d->L(1)); @@ -1671,7 +1678,7 @@ SSE_HELPER_L(helper_pmaxud, MAX) #define FMULLD(d, s) ((int32_t)d * (int32_t)s) SSE_HELPER_L(helper_pmulld, FMULLD) -void glue(helper_phminposuw, SUFFIX)(Reg *d, Reg *s) +void glue(helper_phminposuw, SUFFIX)(CPUX86State *env, Reg *d, Reg *s) { int idx = 0; @@ -1703,7 +1710,8 @@ void glue(helper_phminposuw, SUFFIX)(Reg *d, Reg *s) d->W(0) = s->W(idx); } -void glue(helper_roundps, SUFFIX)(Reg *d, Reg *s, uint32_t mode) +void glue(helper_roundps, SUFFIX)(CPUX86State *env, Reg *d, Reg *s, + uint32_t mode) { signed char prev_rounding_mode; @@ -1740,7 +1748,8 @@ void glue(helper_roundps, SUFFIX)(Reg *d, Reg *s, uint32_t mode) env->sse_status.float_rounding_mode = prev_rounding_mode; } -void glue(helper_roundpd, SUFFIX)(Reg *d, Reg *s, uint32_t mode) +void glue(helper_roundpd, SUFFIX)(CPUX86State *env, Reg *d, Reg *s, + uint32_t mode) { signed char prev_rounding_mode; @@ -1775,7 +1784,8 @@ void glue(helper_roundpd, SUFFIX)(Reg *d, Reg *s, uint32_t mode) env->sse_status.float_rounding_mode = prev_rounding_mode; } -void glue(helper_roundss, SUFFIX)(Reg *d, Reg *s, uint32_t mode) +void glue(helper_roundss, SUFFIX)(CPUX86State *env, Reg *d, Reg *s, + uint32_t mode) { signed char prev_rounding_mode; @@ -1809,7 +1819,8 @@ void glue(helper_roundss, SUFFIX)(Reg *d, Reg *s, uint32_t mode) env->sse_status.float_rounding_mode = prev_rounding_mode; } -void glue(helper_roundsd, SUFFIX)(Reg *d, Reg *s, uint32_t mode) +void glue(helper_roundsd, SUFFIX)(CPUX86State *env, Reg *d, Reg *s, + uint32_t mode) { signed char prev_rounding_mode; @@ -1848,7 +1859,7 @@ SSE_HELPER_I(helper_blendps, L, 4, FBLENDP) SSE_HELPER_I(helper_blendpd, Q, 2, FBLENDP) SSE_HELPER_I(helper_pblendw, W, 8, FBLENDP) -void glue(helper_dpps, SUFFIX)(Reg *d, Reg *s, uint32_t mask) +void glue(helper_dpps, SUFFIX)(CPUX86State *env, Reg *d, Reg *s, uint32_t mask) { float32 iresult = float32_zero; @@ -1882,7 +1893,7 @@ void glue(helper_dpps, SUFFIX)(Reg *d, Reg *s, uint32_t mask) d->XMM_S(3) = (mask & (1 << 3)) ? iresult : float32_zero; } -void glue(helper_dppd, SUFFIX)(Reg *d, Reg *s, uint32_t mask) +void glue(helper_dppd, SUFFIX)(CPUX86State *env, Reg *d, Reg *s, uint32_t mask) { float64 iresult = float64_zero; @@ -1902,7 +1913,8 @@ void glue(helper_dppd, SUFFIX)(Reg *d, Reg *s, uint32_t mask) d->XMM_D(1) = (mask & (1 << 1)) ? iresult : float64_zero; } -void glue(helper_mpsadbw, SUFFIX)(Reg *d, Reg *s, uint32_t offset) +void glue(helper_mpsadbw, SUFFIX)(CPUX86State *env, Reg *d, Reg *s, + uint32_t offset) { int s0 = (offset & 3) << 2; int d0 = (offset & 4) << 0; @@ -1925,7 +1937,7 @@ void glue(helper_mpsadbw, SUFFIX)(Reg *d, Reg *s, uint32_t offset) #define FCMPGTQ(d, s) (d > s ? -1 : 0) SSE_HELPER_Q(helper_pcmpgtq, FCMPGTQ) -static inline int pcmp_elen(int reg, uint32_t ctrl) +static inline int pcmp_elen(CPUX86State *env, int reg, uint32_t ctrl) { int val; @@ -1980,7 +1992,7 @@ static inline int pcmp_val(Reg *r, uint8_t ctrl, int i) } } -static inline unsigned pcmpxstrx(Reg *d, Reg *s, +static inline unsigned pcmpxstrx(CPUX86State *env, Reg *d, Reg *s, int8_t ctrl, int valids, int validd) { unsigned int res = 0; @@ -2080,11 +2092,12 @@ static inline int ffs1(unsigned int val) return ret; } -void glue(helper_pcmpestri, SUFFIX)(Reg *d, Reg *s, uint32_t ctrl) +void glue(helper_pcmpestri, SUFFIX)(CPUX86State *env, Reg *d, Reg *s, + uint32_t ctrl) { - unsigned int res = pcmpxstrx(d, s, ctrl, - pcmp_elen(R_EDX, ctrl), - pcmp_elen(R_EAX, ctrl)); + unsigned int res = pcmpxstrx(env, d, s, ctrl, + pcmp_elen(env, R_EDX, ctrl), + pcmp_elen(env, R_EAX, ctrl)); if (res) { env->regs[R_ECX] = ((ctrl & (1 << 6)) ? rffs1 : ffs1)(res) - 1; @@ -2093,12 +2106,13 @@ void glue(helper_pcmpestri, SUFFIX)(Reg *d, Reg *s, uint32_t ctrl) } } -void glue(helper_pcmpestrm, SUFFIX)(Reg *d, Reg *s, uint32_t ctrl) +void glue(helper_pcmpestrm, SUFFIX)(CPUX86State *env, Reg *d, Reg *s, + uint32_t ctrl) { int i; - unsigned int res = pcmpxstrx(d, s, ctrl, - pcmp_elen(R_EDX, ctrl), - pcmp_elen(R_EAX, ctrl)); + unsigned int res = pcmpxstrx(env, d, s, ctrl, + pcmp_elen(env, R_EDX, ctrl), + pcmp_elen(env, R_EAX, ctrl)); if ((ctrl >> 6) & 1) { if (ctrl & 1) { @@ -2116,9 +2130,10 @@ void glue(helper_pcmpestrm, SUFFIX)(Reg *d, Reg *s, uint32_t ctrl) } } -void glue(helper_pcmpistri, SUFFIX)(Reg *d, Reg *s, uint32_t ctrl) +void glue(helper_pcmpistri, SUFFIX)(CPUX86State *env, Reg *d, Reg *s, + uint32_t ctrl) { - unsigned int res = pcmpxstrx(d, s, ctrl, + unsigned int res = pcmpxstrx(env, d, s, ctrl, pcmp_ilen(s, ctrl), pcmp_ilen(d, ctrl)); @@ -2129,10 +2144,11 @@ void glue(helper_pcmpistri, SUFFIX)(Reg *d, Reg *s, uint32_t ctrl) } } -void glue(helper_pcmpistrm, SUFFIX)(Reg *d, Reg *s, uint32_t ctrl) +void glue(helper_pcmpistrm, SUFFIX)(CPUX86State *env, Reg *d, Reg *s, + uint32_t ctrl) { int i; - unsigned int res = pcmpxstrx(d, s, ctrl, + unsigned int res = pcmpxstrx(env, d, s, ctrl, pcmp_ilen(s, ctrl), pcmp_ilen(d, ctrl)); @@ -2168,7 +2184,7 @@ target_ulong helper_crc32(uint32_t crc1, target_ulong msg, uint32_t len) #define POPMASK(i) ((target_ulong) -1 / ((1LL << (1 << i)) + 1)) #define POPCOUNT(n, i) ((n & POPMASK(i)) + ((n >> (1 << i)) & POPMASK(i))) -target_ulong helper_popcnt(target_ulong n, uint32_t type) +target_ulong helper_popcnt(CPUX86State *env, target_ulong n, uint32_t type) { CC_SRC = n ? 0 : CC_Z; diff --git a/target-i386/ops_sse_header.h b/target-i386/ops_sse_header.h index 8d4b2b7..401eac6 100644 --- a/target-i386/ops_sse_header.h +++ b/target-i386/ops_sse_header.h @@ -34,31 +34,31 @@ #define dh_is_signed_XMMReg dh_is_signed_ptr #define dh_is_signed_MMXReg dh_is_signed_ptr -DEF_HELPER_2(glue(psrlw, SUFFIX), void, Reg, Reg) -DEF_HELPER_2(glue(psraw, SUFFIX), void, Reg, Reg) -DEF_HELPER_2(glue(psllw, SUFFIX), void, Reg, Reg) -DEF_HELPER_2(glue(psrld, SUFFIX), void, Reg, Reg) -DEF_HELPER_2(glue(psrad, SUFFIX), void, Reg, Reg) -DEF_HELPER_2(glue(pslld, SUFFIX), void, Reg, Reg) -DEF_HELPER_2(glue(psrlq, SUFFIX), void, Reg, Reg) -DEF_HELPER_2(glue(psllq, SUFFIX), void, Reg, Reg) +DEF_HELPER_3(glue(psrlw, SUFFIX), void, env, Reg, Reg) +DEF_HELPER_3(glue(psraw, SUFFIX), void, env, Reg, Reg) +DEF_HELPER_3(glue(psllw, SUFFIX), void, env, Reg, Reg) +DEF_HELPER_3(glue(psrld, SUFFIX), void, env, Reg, Reg) +DEF_HELPER_3(glue(psrad, SUFFIX), void, env, Reg, Reg) +DEF_HELPER_3(glue(pslld, SUFFIX), void, env, Reg, Reg) +DEF_HELPER_3(glue(psrlq, SUFFIX), void, env, Reg, Reg) +DEF_HELPER_3(glue(psllq, SUFFIX), void, env, Reg, Reg) #if SHIFT == 1 -DEF_HELPER_2(glue(psrldq, SUFFIX), void, Reg, Reg) -DEF_HELPER_2(glue(pslldq, SUFFIX), void, Reg, Reg) +DEF_HELPER_3(glue(psrldq, SUFFIX), void, env, Reg, Reg) +DEF_HELPER_3(glue(pslldq, SUFFIX), void, env, Reg, Reg) #endif #define SSE_HELPER_B(name, F)\ - DEF_HELPER_2(glue(name, SUFFIX), void, Reg, Reg) + DEF_HELPER_3(glue(name, SUFFIX), void, env, Reg, Reg) #define SSE_HELPER_W(name, F)\ - DEF_HELPER_2(glue(name, SUFFIX), void, Reg, Reg) + DEF_HELPER_3(glue(name, SUFFIX), void, env, Reg, Reg) #define SSE_HELPER_L(name, F)\ - DEF_HELPER_2(glue(name, SUFFIX), void, Reg, Reg) + DEF_HELPER_3(glue(name, SUFFIX), void, env, Reg, Reg) #define SSE_HELPER_Q(name, F)\ - DEF_HELPER_2(glue(name, SUFFIX), void, Reg, Reg) + DEF_HELPER_3(glue(name, SUFFIX), void, env, Reg, Reg) SSE_HELPER_B(paddb, FADD) SSE_HELPER_W(paddw, FADD) @@ -109,11 +109,11 @@ SSE_HELPER_W(pmulhw, FMULHW) SSE_HELPER_B(pavgb, FAVG) SSE_HELPER_W(pavgw, FAVG) -DEF_HELPER_2(glue(pmuludq, SUFFIX), void, Reg, Reg) -DEF_HELPER_2(glue(pmaddwd, SUFFIX), void, Reg, Reg) +DEF_HELPER_3(glue(pmuludq, SUFFIX), void, env, Reg, Reg) +DEF_HELPER_3(glue(pmaddwd, SUFFIX), void, env, Reg, Reg) -DEF_HELPER_2(glue(psadbw, SUFFIX), void, Reg, Reg) -DEF_HELPER_3(glue(maskmov, SUFFIX), void, Reg, Reg, tl) +DEF_HELPER_3(glue(psadbw, SUFFIX), void, env, Reg, Reg) +DEF_HELPER_4(glue(maskmov, SUFFIX), void, env, Reg, Reg, tl) DEF_HELPER_2(glue(movl_mm_T0, SUFFIX), void, Reg, i32) #ifdef TARGET_X86_64 DEF_HELPER_2(glue(movq_mm_T0, SUFFIX), void, Reg, i64) @@ -133,11 +133,11 @@ DEF_HELPER_3(glue(pshufhw, SUFFIX), void, Reg, Reg, int) /* FPU ops */ /* XXX: not accurate */ -#define SSE_HELPER_S(name, F)\ - DEF_HELPER_2(name ## ps , void, Reg, Reg) \ - DEF_HELPER_2(name ## ss , void, Reg, Reg) \ - DEF_HELPER_2(name ## pd , void, Reg, Reg) \ - DEF_HELPER_2(name ## sd , void, Reg, Reg) +#define SSE_HELPER_S(name, F) \ + DEF_HELPER_3(name ## ps, void, env, Reg, Reg) \ + DEF_HELPER_3(name ## ss, void, env, Reg, Reg) \ + DEF_HELPER_3(name ## pd, void, env, Reg, Reg) \ + DEF_HELPER_3(name ## sd, void, env, Reg, Reg) SSE_HELPER_S(add, FPU_ADD) SSE_HELPER_S(sub, FPU_SUB) @@ -148,64 +148,64 @@ SSE_HELPER_S(max, FPU_MAX) SSE_HELPER_S(sqrt, FPU_SQRT) -DEF_HELPER_2(cvtps2pd, void, Reg, Reg) -DEF_HELPER_2(cvtpd2ps, void, Reg, Reg) -DEF_HELPER_2(cvtss2sd, void, Reg, Reg) -DEF_HELPER_2(cvtsd2ss, void, Reg, Reg) -DEF_HELPER_2(cvtdq2ps, void, Reg, Reg) -DEF_HELPER_2(cvtdq2pd, void, Reg, Reg) -DEF_HELPER_2(cvtpi2ps, void, XMMReg, MMXReg) -DEF_HELPER_2(cvtpi2pd, void, XMMReg, MMXReg) -DEF_HELPER_2(cvtsi2ss, void, XMMReg, i32) -DEF_HELPER_2(cvtsi2sd, void, XMMReg, i32) +DEF_HELPER_3(cvtps2pd, void, env, Reg, Reg) +DEF_HELPER_3(cvtpd2ps, void, env, Reg, Reg) +DEF_HELPER_3(cvtss2sd, void, env, Reg, Reg) +DEF_HELPER_3(cvtsd2ss, void, env, Reg, Reg) +DEF_HELPER_3(cvtdq2ps, void, env, Reg, Reg) +DEF_HELPER_3(cvtdq2pd, void, env, Reg, Reg) +DEF_HELPER_3(cvtpi2ps, void, env, XMMReg, MMXReg) +DEF_HELPER_3(cvtpi2pd, void, env, XMMReg, MMXReg) +DEF_HELPER_3(cvtsi2ss, void, env, XMMReg, i32) +DEF_HELPER_3(cvtsi2sd, void, env, XMMReg, i32) #ifdef TARGET_X86_64 -DEF_HELPER_2(cvtsq2ss, void, XMMReg, i64) -DEF_HELPER_2(cvtsq2sd, void, XMMReg, i64) +DEF_HELPER_3(cvtsq2ss, void, env, XMMReg, i64) +DEF_HELPER_3(cvtsq2sd, void, env, XMMReg, i64) #endif -DEF_HELPER_2(cvtps2dq, void, XMMReg, XMMReg) -DEF_HELPER_2(cvtpd2dq, void, XMMReg, XMMReg) -DEF_HELPER_2(cvtps2pi, void, MMXReg, XMMReg) -DEF_HELPER_2(cvtpd2pi, void, MMXReg, XMMReg) -DEF_HELPER_1(cvtss2si, s32, XMMReg) -DEF_HELPER_1(cvtsd2si, s32, XMMReg) +DEF_HELPER_3(cvtps2dq, void, env, XMMReg, XMMReg) +DEF_HELPER_3(cvtpd2dq, void, env, XMMReg, XMMReg) +DEF_HELPER_3(cvtps2pi, void, env, MMXReg, XMMReg) +DEF_HELPER_3(cvtpd2pi, void, env, MMXReg, XMMReg) +DEF_HELPER_2(cvtss2si, s32, env, XMMReg) +DEF_HELPER_2(cvtsd2si, s32, env, XMMReg) #ifdef TARGET_X86_64 -DEF_HELPER_1(cvtss2sq, s64, XMMReg) -DEF_HELPER_1(cvtsd2sq, s64, XMMReg) +DEF_HELPER_2(cvtss2sq, s64, env, XMMReg) +DEF_HELPER_2(cvtsd2sq, s64, env, XMMReg) #endif -DEF_HELPER_2(cvttps2dq, void, XMMReg, XMMReg) -DEF_HELPER_2(cvttpd2dq, void, XMMReg, XMMReg) -DEF_HELPER_2(cvttps2pi, void, MMXReg, XMMReg) -DEF_HELPER_2(cvttpd2pi, void, MMXReg, XMMReg) -DEF_HELPER_1(cvttss2si, s32, XMMReg) -DEF_HELPER_1(cvttsd2si, s32, XMMReg) +DEF_HELPER_3(cvttps2dq, void, env, XMMReg, XMMReg) +DEF_HELPER_3(cvttpd2dq, void, env, XMMReg, XMMReg) +DEF_HELPER_3(cvttps2pi, void, env, MMXReg, XMMReg) +DEF_HELPER_3(cvttpd2pi, void, env, MMXReg, XMMReg) +DEF_HELPER_2(cvttss2si, s32, env, XMMReg) +DEF_HELPER_2(cvttsd2si, s32, env, XMMReg) #ifdef TARGET_X86_64 -DEF_HELPER_1(cvttss2sq, s64, XMMReg) -DEF_HELPER_1(cvttsd2sq, s64, XMMReg) +DEF_HELPER_2(cvttss2sq, s64, env, XMMReg) +DEF_HELPER_2(cvttsd2sq, s64, env, XMMReg) #endif -DEF_HELPER_2(rsqrtps, void, XMMReg, XMMReg) -DEF_HELPER_2(rsqrtss, void, XMMReg, XMMReg) -DEF_HELPER_2(rcpps, void, XMMReg, XMMReg) -DEF_HELPER_2(rcpss, void, XMMReg, XMMReg) -DEF_HELPER_2(extrq_r, void, XMMReg, XMMReg) -DEF_HELPER_3(extrq_i, void, XMMReg, int, int) -DEF_HELPER_2(insertq_r, void, XMMReg, XMMReg) -DEF_HELPER_3(insertq_i, void, XMMReg, int, int) -DEF_HELPER_2(haddps, void, XMMReg, XMMReg) -DEF_HELPER_2(haddpd, void, XMMReg, XMMReg) -DEF_HELPER_2(hsubps, void, XMMReg, XMMReg) -DEF_HELPER_2(hsubpd, void, XMMReg, XMMReg) -DEF_HELPER_2(addsubps, void, XMMReg, XMMReg) -DEF_HELPER_2(addsubpd, void, XMMReg, XMMReg) - -#define SSE_HELPER_CMP(name, F)\ - DEF_HELPER_2( name ## ps , void, Reg, Reg) \ - DEF_HELPER_2( name ## ss , void, Reg, Reg) \ - DEF_HELPER_2( name ## pd , void, Reg, Reg) \ - DEF_HELPER_2( name ## sd , void, Reg, Reg) +DEF_HELPER_3(rsqrtps, void, env, XMMReg, XMMReg) +DEF_HELPER_3(rsqrtss, void, env, XMMReg, XMMReg) +DEF_HELPER_3(rcpps, void, env, XMMReg, XMMReg) +DEF_HELPER_3(rcpss, void, env, XMMReg, XMMReg) +DEF_HELPER_3(extrq_r, void, env, XMMReg, XMMReg) +DEF_HELPER_4(extrq_i, void, env, XMMReg, int, int) +DEF_HELPER_3(insertq_r, void, env, XMMReg, XMMReg) +DEF_HELPER_4(insertq_i, void, env, XMMReg, int, int) +DEF_HELPER_3(haddps, void, env, XMMReg, XMMReg) +DEF_HELPER_3(haddpd, void, env, XMMReg, XMMReg) +DEF_HELPER_3(hsubps, void, env, XMMReg, XMMReg) +DEF_HELPER_3(hsubpd, void, env, XMMReg, XMMReg) +DEF_HELPER_3(addsubps, void, env, XMMReg, XMMReg) +DEF_HELPER_3(addsubpd, void, env, XMMReg, XMMReg) + +#define SSE_HELPER_CMP(name, F) \ + DEF_HELPER_3(name ## ps, void, env, Reg, Reg) \ + DEF_HELPER_3(name ## ss, void, env, Reg, Reg) \ + DEF_HELPER_3(name ## pd, void, env, Reg, Reg) \ + DEF_HELPER_3(name ## sd, void, env, Reg, Reg) SSE_HELPER_CMP(cmpeq, FPU_CMPEQ) SSE_HELPER_CMP(cmplt, FPU_CMPLT) @@ -216,124 +216,124 @@ SSE_HELPER_CMP(cmpnlt, FPU_CMPNLT) SSE_HELPER_CMP(cmpnle, FPU_CMPNLE) SSE_HELPER_CMP(cmpord, FPU_CMPORD) -DEF_HELPER_2(ucomiss, void, Reg, Reg) -DEF_HELPER_2(comiss, void, Reg, Reg) -DEF_HELPER_2(ucomisd, void, Reg, Reg) -DEF_HELPER_2(comisd, void, Reg, Reg) -DEF_HELPER_1(movmskps, i32, Reg) -DEF_HELPER_1(movmskpd, i32, Reg) +DEF_HELPER_3(ucomiss, void, env, Reg, Reg) +DEF_HELPER_3(comiss, void, env, Reg, Reg) +DEF_HELPER_3(ucomisd, void, env, Reg, Reg) +DEF_HELPER_3(comisd, void, env, Reg, Reg) +DEF_HELPER_2(movmskps, i32, env, Reg) +DEF_HELPER_2(movmskpd, i32, env, Reg) #endif -DEF_HELPER_1(glue(pmovmskb, SUFFIX), i32, Reg) -DEF_HELPER_2(glue(packsswb, SUFFIX), void, Reg, Reg) -DEF_HELPER_2(glue(packuswb, SUFFIX), void, Reg, Reg) -DEF_HELPER_2(glue(packssdw, SUFFIX), void, Reg, Reg) -#define UNPCK_OP(base_name, base) \ - DEF_HELPER_2(glue(punpck ## base_name ## bw, SUFFIX) , void, Reg, Reg) \ - DEF_HELPER_2(glue(punpck ## base_name ## wd, SUFFIX) , void, Reg, Reg) \ - DEF_HELPER_2(glue(punpck ## base_name ## dq, SUFFIX) , void, Reg, Reg) +DEF_HELPER_2(glue(pmovmskb, SUFFIX), i32, env, Reg) +DEF_HELPER_3(glue(packsswb, SUFFIX), void, env, Reg, Reg) +DEF_HELPER_3(glue(packuswb, SUFFIX), void, env, Reg, Reg) +DEF_HELPER_3(glue(packssdw, SUFFIX), void, env, Reg, Reg) +#define UNPCK_OP(base_name, base) \ + DEF_HELPER_3(glue(punpck ## base_name ## bw, SUFFIX), void, env, Reg, Reg) \ + DEF_HELPER_3(glue(punpck ## base_name ## wd, SUFFIX), void, env, Reg, Reg) \ + DEF_HELPER_3(glue(punpck ## base_name ## dq, SUFFIX), void, env, Reg, Reg) UNPCK_OP(l, 0) UNPCK_OP(h, 1) #if SHIFT == 1 -DEF_HELPER_2(glue(punpcklqdq, SUFFIX), void, Reg, Reg) -DEF_HELPER_2(glue(punpckhqdq, SUFFIX), void, Reg, Reg) +DEF_HELPER_3(glue(punpcklqdq, SUFFIX), void, env, Reg, Reg) +DEF_HELPER_3(glue(punpckhqdq, SUFFIX), void, env, Reg, Reg) #endif /* 3DNow! float ops */ #if SHIFT == 0 -DEF_HELPER_2(pi2fd, void, MMXReg, MMXReg) -DEF_HELPER_2(pi2fw, void, MMXReg, MMXReg) -DEF_HELPER_2(pf2id, void, MMXReg, MMXReg) -DEF_HELPER_2(pf2iw, void, MMXReg, MMXReg) -DEF_HELPER_2(pfacc, void, MMXReg, MMXReg) -DEF_HELPER_2(pfadd, void, MMXReg, MMXReg) -DEF_HELPER_2(pfcmpeq, void, MMXReg, MMXReg) -DEF_HELPER_2(pfcmpge, void, MMXReg, MMXReg) -DEF_HELPER_2(pfcmpgt, void, MMXReg, MMXReg) -DEF_HELPER_2(pfmax, void, MMXReg, MMXReg) -DEF_HELPER_2(pfmin, void, MMXReg, MMXReg) -DEF_HELPER_2(pfmul, void, MMXReg, MMXReg) -DEF_HELPER_2(pfnacc, void, MMXReg, MMXReg) -DEF_HELPER_2(pfpnacc, void, MMXReg, MMXReg) -DEF_HELPER_2(pfrcp, void, MMXReg, MMXReg) -DEF_HELPER_2(pfrsqrt, void, MMXReg, MMXReg) -DEF_HELPER_2(pfsub, void, MMXReg, MMXReg) -DEF_HELPER_2(pfsubr, void, MMXReg, MMXReg) -DEF_HELPER_2(pswapd, void, MMXReg, MMXReg) +DEF_HELPER_3(pi2fd, void, env, MMXReg, MMXReg) +DEF_HELPER_3(pi2fw, void, env, MMXReg, MMXReg) +DEF_HELPER_3(pf2id, void, env, MMXReg, MMXReg) +DEF_HELPER_3(pf2iw, void, env, MMXReg, MMXReg) +DEF_HELPER_3(pfacc, void, env, MMXReg, MMXReg) +DEF_HELPER_3(pfadd, void, env, MMXReg, MMXReg) +DEF_HELPER_3(pfcmpeq, void, env, MMXReg, MMXReg) +DEF_HELPER_3(pfcmpge, void, env, MMXReg, MMXReg) +DEF_HELPER_3(pfcmpgt, void, env, MMXReg, MMXReg) +DEF_HELPER_3(pfmax, void, env, MMXReg, MMXReg) +DEF_HELPER_3(pfmin, void, env, MMXReg, MMXReg) +DEF_HELPER_3(pfmul, void, env, MMXReg, MMXReg) +DEF_HELPER_3(pfnacc, void, env, MMXReg, MMXReg) +DEF_HELPER_3(pfpnacc, void, env, MMXReg, MMXReg) +DEF_HELPER_3(pfrcp, void, env, MMXReg, MMXReg) +DEF_HELPER_3(pfrsqrt, void, env, MMXReg, MMXReg) +DEF_HELPER_3(pfsub, void, env, MMXReg, MMXReg) +DEF_HELPER_3(pfsubr, void, env, MMXReg, MMXReg) +DEF_HELPER_3(pswapd, void, env, MMXReg, MMXReg) #endif /* SSSE3 op helpers */ -DEF_HELPER_2(glue(phaddw, SUFFIX), void, Reg, Reg) -DEF_HELPER_2(glue(phaddd, SUFFIX), void, Reg, Reg) -DEF_HELPER_2(glue(phaddsw, SUFFIX), void, Reg, Reg) -DEF_HELPER_2(glue(phsubw, SUFFIX), void, Reg, Reg) -DEF_HELPER_2(glue(phsubd, SUFFIX), void, Reg, Reg) -DEF_HELPER_2(glue(phsubsw, SUFFIX), void, Reg, Reg) -DEF_HELPER_2(glue(pabsb, SUFFIX), void, Reg, Reg) -DEF_HELPER_2(glue(pabsw, SUFFIX), void, Reg, Reg) -DEF_HELPER_2(glue(pabsd, SUFFIX), void, Reg, Reg) -DEF_HELPER_2(glue(pmaddubsw, SUFFIX), void, Reg, Reg) -DEF_HELPER_2(glue(pmulhrsw, SUFFIX), void, Reg, Reg) -DEF_HELPER_2(glue(pshufb, SUFFIX), void, Reg, Reg) -DEF_HELPER_2(glue(psignb, SUFFIX), void, Reg, Reg) -DEF_HELPER_2(glue(psignw, SUFFIX), void, Reg, Reg) -DEF_HELPER_2(glue(psignd, SUFFIX), void, Reg, Reg) -DEF_HELPER_3(glue(palignr, SUFFIX), void, Reg, Reg, s32) +DEF_HELPER_3(glue(phaddw, SUFFIX), void, env, Reg, Reg) +DEF_HELPER_3(glue(phaddd, SUFFIX), void, env, Reg, Reg) +DEF_HELPER_3(glue(phaddsw, SUFFIX), void, env, Reg, Reg) +DEF_HELPER_3(glue(phsubw, SUFFIX), void, env, Reg, Reg) +DEF_HELPER_3(glue(phsubd, SUFFIX), void, env, Reg, Reg) +DEF_HELPER_3(glue(phsubsw, SUFFIX), void, env, Reg, Reg) +DEF_HELPER_3(glue(pabsb, SUFFIX), void, env, Reg, Reg) +DEF_HELPER_3(glue(pabsw, SUFFIX), void, env, Reg, Reg) +DEF_HELPER_3(glue(pabsd, SUFFIX), void, env, Reg, Reg) +DEF_HELPER_3(glue(pmaddubsw, SUFFIX), void, env, Reg, Reg) +DEF_HELPER_3(glue(pmulhrsw, SUFFIX), void, env, Reg, Reg) +DEF_HELPER_3(glue(pshufb, SUFFIX), void, env, Reg, Reg) +DEF_HELPER_3(glue(psignb, SUFFIX), void, env, Reg, Reg) +DEF_HELPER_3(glue(psignw, SUFFIX), void, env, Reg, Reg) +DEF_HELPER_3(glue(psignd, SUFFIX), void, env, Reg, Reg) +DEF_HELPER_4(glue(palignr, SUFFIX), void, env, Reg, Reg, s32) /* SSE4.1 op helpers */ #if SHIFT == 1 -DEF_HELPER_2(glue(pblendvb, SUFFIX), void, Reg, Reg) -DEF_HELPER_2(glue(blendvps, SUFFIX), void, Reg, Reg) -DEF_HELPER_2(glue(blendvpd, SUFFIX), void, Reg, Reg) -DEF_HELPER_2(glue(ptest, SUFFIX), void, Reg, Reg) -DEF_HELPER_2(glue(pmovsxbw, SUFFIX), void, Reg, Reg) -DEF_HELPER_2(glue(pmovsxbd, SUFFIX), void, Reg, Reg) -DEF_HELPER_2(glue(pmovsxbq, SUFFIX), void, Reg, Reg) -DEF_HELPER_2(glue(pmovsxwd, SUFFIX), void, Reg, Reg) -DEF_HELPER_2(glue(pmovsxwq, SUFFIX), void, Reg, Reg) -DEF_HELPER_2(glue(pmovsxdq, SUFFIX), void, Reg, Reg) -DEF_HELPER_2(glue(pmovzxbw, SUFFIX), void, Reg, Reg) -DEF_HELPER_2(glue(pmovzxbd, SUFFIX), void, Reg, Reg) -DEF_HELPER_2(glue(pmovzxbq, SUFFIX), void, Reg, Reg) -DEF_HELPER_2(glue(pmovzxwd, SUFFIX), void, Reg, Reg) -DEF_HELPER_2(glue(pmovzxwq, SUFFIX), void, Reg, Reg) -DEF_HELPER_2(glue(pmovzxdq, SUFFIX), void, Reg, Reg) -DEF_HELPER_2(glue(pmuldq, SUFFIX), void, Reg, Reg) -DEF_HELPER_2(glue(pcmpeqq, SUFFIX), void, Reg, Reg) -DEF_HELPER_2(glue(packusdw, SUFFIX), void, Reg, Reg) -DEF_HELPER_2(glue(pminsb, SUFFIX), void, Reg, Reg) -DEF_HELPER_2(glue(pminsd, SUFFIX), void, Reg, Reg) -DEF_HELPER_2(glue(pminuw, SUFFIX), void, Reg, Reg) -DEF_HELPER_2(glue(pminud, SUFFIX), void, Reg, Reg) -DEF_HELPER_2(glue(pmaxsb, SUFFIX), void, Reg, Reg) -DEF_HELPER_2(glue(pmaxsd, SUFFIX), void, Reg, Reg) -DEF_HELPER_2(glue(pmaxuw, SUFFIX), void, Reg, Reg) -DEF_HELPER_2(glue(pmaxud, SUFFIX), void, Reg, Reg) -DEF_HELPER_2(glue(pmulld, SUFFIX), void, Reg, Reg) -DEF_HELPER_2(glue(phminposuw, SUFFIX), void, Reg, Reg) -DEF_HELPER_3(glue(roundps, SUFFIX), void, Reg, Reg, i32) -DEF_HELPER_3(glue(roundpd, SUFFIX), void, Reg, Reg, i32) -DEF_HELPER_3(glue(roundss, SUFFIX), void, Reg, Reg, i32) -DEF_HELPER_3(glue(roundsd, SUFFIX), void, Reg, Reg, i32) -DEF_HELPER_3(glue(blendps, SUFFIX), void, Reg, Reg, i32) -DEF_HELPER_3(glue(blendpd, SUFFIX), void, Reg, Reg, i32) -DEF_HELPER_3(glue(pblendw, SUFFIX), void, Reg, Reg, i32) -DEF_HELPER_3(glue(dpps, SUFFIX), void, Reg, Reg, i32) -DEF_HELPER_3(glue(dppd, SUFFIX), void, Reg, Reg, i32) -DEF_HELPER_3(glue(mpsadbw, SUFFIX), void, Reg, Reg, i32) +DEF_HELPER_3(glue(pblendvb, SUFFIX), void, env, Reg, Reg) +DEF_HELPER_3(glue(blendvps, SUFFIX), void, env, Reg, Reg) +DEF_HELPER_3(glue(blendvpd, SUFFIX), void, env, Reg, Reg) +DEF_HELPER_3(glue(ptest, SUFFIX), void, env, Reg, Reg) +DEF_HELPER_3(glue(pmovsxbw, SUFFIX), void, env, Reg, Reg) +DEF_HELPER_3(glue(pmovsxbd, SUFFIX), void, env, Reg, Reg) +DEF_HELPER_3(glue(pmovsxbq, SUFFIX), void, env, Reg, Reg) +DEF_HELPER_3(glue(pmovsxwd, SUFFIX), void, env, Reg, Reg) +DEF_HELPER_3(glue(pmovsxwq, SUFFIX), void, env, Reg, Reg) +DEF_HELPER_3(glue(pmovsxdq, SUFFIX), void, env, Reg, Reg) +DEF_HELPER_3(glue(pmovzxbw, SUFFIX), void, env, Reg, Reg) +DEF_HELPER_3(glue(pmovzxbd, SUFFIX), void, env, Reg, Reg) +DEF_HELPER_3(glue(pmovzxbq, SUFFIX), void, env, Reg, Reg) +DEF_HELPER_3(glue(pmovzxwd, SUFFIX), void, env, Reg, Reg) +DEF_HELPER_3(glue(pmovzxwq, SUFFIX), void, env, Reg, Reg) +DEF_HELPER_3(glue(pmovzxdq, SUFFIX), void, env, Reg, Reg) +DEF_HELPER_3(glue(pmuldq, SUFFIX), void, env, Reg, Reg) +DEF_HELPER_3(glue(pcmpeqq, SUFFIX), void, env, Reg, Reg) +DEF_HELPER_3(glue(packusdw, SUFFIX), void, env, Reg, Reg) +DEF_HELPER_3(glue(pminsb, SUFFIX), void, env, Reg, Reg) +DEF_HELPER_3(glue(pminsd, SUFFIX), void, env, Reg, Reg) +DEF_HELPER_3(glue(pminuw, SUFFIX), void, env, Reg, Reg) +DEF_HELPER_3(glue(pminud, SUFFIX), void, env, Reg, Reg) +DEF_HELPER_3(glue(pmaxsb, SUFFIX), void, env, Reg, Reg) +DEF_HELPER_3(glue(pmaxsd, SUFFIX), void, env, Reg, Reg) +DEF_HELPER_3(glue(pmaxuw, SUFFIX), void, env, Reg, Reg) +DEF_HELPER_3(glue(pmaxud, SUFFIX), void, env, Reg, Reg) +DEF_HELPER_3(glue(pmulld, SUFFIX), void, env, Reg, Reg) +DEF_HELPER_3(glue(phminposuw, SUFFIX), void, env, Reg, Reg) +DEF_HELPER_4(glue(roundps, SUFFIX), void, env, Reg, Reg, i32) +DEF_HELPER_4(glue(roundpd, SUFFIX), void, env, Reg, Reg, i32) +DEF_HELPER_4(glue(roundss, SUFFIX), void, env, Reg, Reg, i32) +DEF_HELPER_4(glue(roundsd, SUFFIX), void, env, Reg, Reg, i32) +DEF_HELPER_4(glue(blendps, SUFFIX), void, env, Reg, Reg, i32) +DEF_HELPER_4(glue(blendpd, SUFFIX), void, env, Reg, Reg, i32) +DEF_HELPER_4(glue(pblendw, SUFFIX), void, env, Reg, Reg, i32) +DEF_HELPER_4(glue(dpps, SUFFIX), void, env, Reg, Reg, i32) +DEF_HELPER_4(glue(dppd, SUFFIX), void, env, Reg, Reg, i32) +DEF_HELPER_4(glue(mpsadbw, SUFFIX), void, env, Reg, Reg, i32) #endif /* SSE4.2 op helpers */ #if SHIFT == 1 -DEF_HELPER_2(glue(pcmpgtq, SUFFIX), void, Reg, Reg) -DEF_HELPER_3(glue(pcmpestri, SUFFIX), void, Reg, Reg, i32) -DEF_HELPER_3(glue(pcmpestrm, SUFFIX), void, Reg, Reg, i32) -DEF_HELPER_3(glue(pcmpistri, SUFFIX), void, Reg, Reg, i32) -DEF_HELPER_3(glue(pcmpistrm, SUFFIX), void, Reg, Reg, i32) +DEF_HELPER_3(glue(pcmpgtq, SUFFIX), void, env, Reg, Reg) +DEF_HELPER_4(glue(pcmpestri, SUFFIX), void, env, Reg, Reg, i32) +DEF_HELPER_4(glue(pcmpestrm, SUFFIX), void, env, Reg, Reg, i32) +DEF_HELPER_4(glue(pcmpistri, SUFFIX), void, env, Reg, Reg, i32) +DEF_HELPER_4(glue(pcmpistrm, SUFFIX), void, env, Reg, Reg, i32) DEF_HELPER_3(crc32, tl, i32, tl, i32) -DEF_HELPER_2(popcnt, tl, tl, i32) +DEF_HELPER_3(popcnt, tl, env, tl, i32) #endif #undef SHIFT diff --git a/target-i386/translate.c b/target-i386/translate.c index 2b11333..5e9da9d 100644 --- a/target-i386/translate.c +++ b/target-i386/translate.c @@ -1266,14 +1266,30 @@ GEN_REPZ2(cmps) static void gen_helper_fp_arith_ST0_FT0(int op) { switch (op) { - case 0: gen_helper_fadd_ST0_FT0(); break; - case 1: gen_helper_fmul_ST0_FT0(); break; - case 2: gen_helper_fcom_ST0_FT0(); break; - case 3: gen_helper_fcom_ST0_FT0(); break; - case 4: gen_helper_fsub_ST0_FT0(); break; - case 5: gen_helper_fsubr_ST0_FT0(); break; - case 6: gen_helper_fdiv_ST0_FT0(); break; - case 7: gen_helper_fdivr_ST0_FT0(); break; + case 0: + gen_helper_fadd_ST0_FT0(cpu_env); + break; + case 1: + gen_helper_fmul_ST0_FT0(cpu_env); + break; + case 2: + gen_helper_fcom_ST0_FT0(cpu_env); + break; + case 3: + gen_helper_fcom_ST0_FT0(cpu_env); + break; + case 4: + gen_helper_fsub_ST0_FT0(cpu_env); + break; + case 5: + gen_helper_fsubr_ST0_FT0(cpu_env); + break; + case 6: + gen_helper_fdiv_ST0_FT0(cpu_env); + break; + case 7: + gen_helper_fdivr_ST0_FT0(cpu_env); + break; } } @@ -1282,12 +1298,24 @@ static void gen_helper_fp_arith_STN_ST0(int op, int opreg) { TCGv_i32 tmp = tcg_const_i32(opreg); switch (op) { - case 0: gen_helper_fadd_STN_ST0(tmp); break; - case 1: gen_helper_fmul_STN_ST0(tmp); break; - case 4: gen_helper_fsubr_STN_ST0(tmp); break; - case 5: gen_helper_fsub_STN_ST0(tmp); break; - case 6: gen_helper_fdivr_STN_ST0(tmp); break; - case 7: gen_helper_fdiv_STN_ST0(tmp); break; + case 0: + gen_helper_fadd_STN_ST0(cpu_env, tmp); + break; + case 1: + gen_helper_fmul_STN_ST0(cpu_env, tmp); + break; + case 4: + gen_helper_fsubr_STN_ST0(cpu_env, tmp); + break; + case 5: + gen_helper_fsub_STN_ST0(cpu_env, tmp); + break; + case 6: + gen_helper_fdivr_STN_ST0(cpu_env, tmp); + break; + case 7: + gen_helper_fdiv_STN_ST0(cpu_env, tmp); + break; } } @@ -2796,13 +2824,16 @@ static inline void gen_op_movq_env_0(int d_offset) tcg_gen_st_i64(cpu_tmp1_i64, cpu_env, d_offset); } -typedef void (*SSEFunc_i_p)(TCGv_i32 val, TCGv_ptr reg); -typedef void (*SSEFunc_l_p)(TCGv_i64 val, TCGv_ptr reg); -typedef void (*SSEFunc_0_pi)(TCGv_ptr reg, TCGv_i32 val); -typedef void (*SSEFunc_0_pl)(TCGv_ptr reg, TCGv_i64 val); -typedef void (*SSEFunc_0_pp)(TCGv_ptr reg_a, TCGv_ptr reg_b); +typedef void (*SSEFunc_i_ep)(TCGv_i32 val, TCGv_ptr env, TCGv_ptr reg); +typedef void (*SSEFunc_l_ep)(TCGv_i64 val, TCGv_ptr env, TCGv_ptr reg); +typedef void (*SSEFunc_0_epi)(TCGv_ptr env, TCGv_ptr reg, TCGv_i32 val); +typedef void (*SSEFunc_0_epl)(TCGv_ptr env, TCGv_ptr reg, TCGv_i64 val); +typedef void (*SSEFunc_0_epp)(TCGv_ptr env, TCGv_ptr reg_a, TCGv_ptr reg_b); +typedef void (*SSEFunc_0_eppi)(TCGv_ptr env, TCGv_ptr reg_a, TCGv_ptr reg_b, + TCGv_i32 val); typedef void (*SSEFunc_0_ppi)(TCGv_ptr reg_a, TCGv_ptr reg_b, TCGv_i32 val); -typedef void (*SSEFunc_0_ppt)(TCGv_ptr reg_a, TCGv_ptr reg_b, TCGv val); +typedef void (*SSEFunc_0_eppt)(TCGv_ptr env, TCGv_ptr reg_a, TCGv_ptr reg_b, + TCGv val); #define SSE_SPECIAL ((void *)1) #define SSE_DUMMY ((void *)2) @@ -2811,7 +2842,7 @@ typedef void (*SSEFunc_0_ppt)(TCGv_ptr reg_a, TCGv_ptr reg_b, TCGv val); #define SSE_FOP(x) { gen_helper_ ## x ## ps, gen_helper_ ## x ## pd, \ gen_helper_ ## x ## ss, gen_helper_ ## x ## sd, } -static const SSEFunc_0_pp sse_op_table1[256][4] = { +static const SSEFunc_0_epp sse_op_table1[256][4] = { /* 3DNow! extensions */ [0x0e] = { SSE_DUMMY }, /* femms */ [0x0f] = { SSE_DUMMY }, /* pf... */ @@ -2852,8 +2883,8 @@ static const SSEFunc_0_pp sse_op_table1[256][4] = { [0x5f] = SSE_FOP(max), [0xc2] = SSE_FOP(cmpeq), - [0xc6] = { (SSEFunc_0_pp)gen_helper_shufps, - (SSEFunc_0_pp)gen_helper_shufpd }, /* XXX: casts */ + [0xc6] = { (SSEFunc_0_epp)gen_helper_shufps, + (SSEFunc_0_epp)gen_helper_shufpd }, /* XXX: casts */ [0x38] = { SSE_SPECIAL, SSE_SPECIAL, NULL, SSE_SPECIAL }, /* SSSE3/SSE4 */ [0x3a] = { SSE_SPECIAL, SSE_SPECIAL }, /* SSSE3/SSE4 */ @@ -2875,10 +2906,10 @@ static const SSEFunc_0_pp sse_op_table1[256][4] = { [0x6d] = { NULL, gen_helper_punpckhqdq_xmm }, [0x6e] = { SSE_SPECIAL, SSE_SPECIAL }, /* movd mm, ea */ [0x6f] = { SSE_SPECIAL, SSE_SPECIAL, SSE_SPECIAL }, /* movq, movdqa, , movqdu */ - [0x70] = { (SSEFunc_0_pp)gen_helper_pshufw_mmx, - (SSEFunc_0_pp)gen_helper_pshufd_xmm, - (SSEFunc_0_pp)gen_helper_pshufhw_xmm, - (SSEFunc_0_pp)gen_helper_pshuflw_xmm }, /* XXX: casts */ + [0x70] = { (SSEFunc_0_epp)gen_helper_pshufw_mmx, + (SSEFunc_0_epp)gen_helper_pshufd_xmm, + (SSEFunc_0_epp)gen_helper_pshufhw_xmm, + (SSEFunc_0_epp)gen_helper_pshuflw_xmm }, /* XXX: casts */ [0x71] = { SSE_SPECIAL, SSE_SPECIAL }, /* shiftw */ [0x72] = { SSE_SPECIAL, SSE_SPECIAL }, /* shiftd */ [0x73] = { SSE_SPECIAL, SSE_SPECIAL }, /* shiftq */ @@ -2933,8 +2964,8 @@ static const SSEFunc_0_pp sse_op_table1[256][4] = { [0xf4] = MMX_OP2(pmuludq), [0xf5] = MMX_OP2(pmaddwd), [0xf6] = MMX_OP2(psadbw), - [0xf7] = { (SSEFunc_0_pp)gen_helper_maskmov_mmx, - (SSEFunc_0_pp)gen_helper_maskmov_xmm }, /* XXX: casts */ + [0xf7] = { (SSEFunc_0_epp)gen_helper_maskmov_mmx, + (SSEFunc_0_epp)gen_helper_maskmov_xmm }, /* XXX: casts */ [0xf8] = MMX_OP2(psubb), [0xf9] = MMX_OP2(psubw), [0xfa] = MMX_OP2(psubl), @@ -2944,7 +2975,7 @@ static const SSEFunc_0_pp sse_op_table1[256][4] = { [0xfe] = MMX_OP2(paddl), }; -static const SSEFunc_0_pp sse_op_table2[3 * 8][2] = { +static const SSEFunc_0_epp sse_op_table2[3 * 8][2] = { [0 + 2] = MMX_OP2(psrlw), [0 + 4] = MMX_OP2(psraw), [0 + 6] = MMX_OP2(psllw), @@ -2957,19 +2988,19 @@ static const SSEFunc_0_pp sse_op_table2[3 * 8][2] = { [16 + 7] = { NULL, gen_helper_pslldq_xmm }, }; -static const SSEFunc_0_pi sse_op_table3ai[] = { +static const SSEFunc_0_epi sse_op_table3ai[] = { gen_helper_cvtsi2ss, gen_helper_cvtsi2sd }; #ifdef TARGET_X86_64 -static const SSEFunc_0_pl sse_op_table3aq[] = { +static const SSEFunc_0_epl sse_op_table3aq[] = { gen_helper_cvtsq2ss, gen_helper_cvtsq2sd }; #endif -static const SSEFunc_i_p sse_op_table3bi[] = { +static const SSEFunc_i_ep sse_op_table3bi[] = { gen_helper_cvttss2si, gen_helper_cvtss2si, gen_helper_cvttsd2si, @@ -2977,7 +3008,7 @@ static const SSEFunc_i_p sse_op_table3bi[] = { }; #ifdef TARGET_X86_64 -static const SSEFunc_l_p sse_op_table3bq[] = { +static const SSEFunc_l_ep sse_op_table3bq[] = { gen_helper_cvttss2sq, gen_helper_cvtss2sq, gen_helper_cvttsd2sq, @@ -2985,7 +3016,7 @@ static const SSEFunc_l_p sse_op_table3bq[] = { }; #endif -static const SSEFunc_0_pp sse_op_table4[8][4] = { +static const SSEFunc_0_epp sse_op_table4[8][4] = { SSE_FOP(cmpeq), SSE_FOP(cmplt), SSE_FOP(cmple), @@ -2996,7 +3027,7 @@ static const SSEFunc_0_pp sse_op_table4[8][4] = { SSE_FOP(cmpord), }; -static const SSEFunc_0_pp sse_op_table5[256] = { +static const SSEFunc_0_epp sse_op_table5[256] = { [0x0c] = gen_helper_pi2fw, [0x0d] = gen_helper_pi2fd, [0x1c] = gen_helper_pf2iw, @@ -3023,13 +3054,13 @@ static const SSEFunc_0_pp sse_op_table5[256] = { [0xbf] = gen_helper_pavgb_mmx /* pavgusb */ }; -struct SSEOpHelper_pp { - SSEFunc_0_pp op[2]; +struct SSEOpHelper_epp { + SSEFunc_0_epp op[2]; uint32_t ext_mask; }; -struct SSEOpHelper_ppi { - SSEFunc_0_ppi op[2]; +struct SSEOpHelper_eppi { + SSEFunc_0_eppi op[2]; uint32_t ext_mask; }; @@ -3038,7 +3069,7 @@ struct SSEOpHelper_ppi { #define SSE42_OP(x) { { NULL, gen_helper_ ## x ## _xmm }, CPUID_EXT_SSE42 } #define SSE41_SPECIAL { { NULL, SSE_SPECIAL }, CPUID_EXT_SSE41 } -static const struct SSEOpHelper_pp sse_op_table6[256] = { +static const struct SSEOpHelper_epp sse_op_table6[256] = { [0x00] = SSSE3_OP(pshufb), [0x01] = SSSE3_OP(phaddw), [0x02] = SSSE3_OP(phaddd), @@ -3087,7 +3118,7 @@ static const struct SSEOpHelper_pp sse_op_table6[256] = { [0x41] = SSE41_OP(phminposuw), }; -static const struct SSEOpHelper_ppi sse_op_table7[256] = { +static const struct SSEOpHelper_eppi sse_op_table7[256] = { [0x08] = SSE41_OP(roundps), [0x09] = SSE41_OP(roundpd), [0x0a] = SSE41_OP(roundss), @@ -3116,9 +3147,10 @@ static void gen_sse(DisasContext *s, int b, target_ulong pc_start, int rex_r) { int b1, op1_offset, op2_offset, is_xmm, val, ot; int modrm, mod, rm, reg, reg_addr, offset_addr; - SSEFunc_0_pp sse_fn_pp; + SSEFunc_0_epp sse_fn_epp; + SSEFunc_0_eppi sse_fn_eppi; SSEFunc_0_ppi sse_fn_ppi; - SSEFunc_0_ppt sse_fn_ppt; + SSEFunc_0_eppt sse_fn_eppt; b &= 0xff; if (s->prefix & PREFIX_DATA) @@ -3129,8 +3161,8 @@ static void gen_sse(DisasContext *s, int b, target_ulong pc_start, int rex_r) b1 = 3; else b1 = 0; - sse_fn_pp = sse_op_table1[b][b1]; - if (!sse_fn_pp) { + sse_fn_epp = sse_op_table1[b][b1]; + if (!sse_fn_epp) { goto illegal_op; } if ((b <= 0x5f && b >= 0x10) || b == 0xc6 || b == 0xc2) { @@ -3160,18 +3192,18 @@ static void gen_sse(DisasContext *s, int b, target_ulong pc_start, int rex_r) if (!(s->cpuid_ext2_features & CPUID_EXT2_3DNOW)) goto illegal_op; /* femms */ - gen_helper_emms(); + gen_helper_emms(cpu_env); return; } if (b == 0x77) { /* emms */ - gen_helper_emms(); + gen_helper_emms(cpu_env); return; } /* prepare MMX state (XXX: optimize by storing fptt and fptags in the static cpu state) */ if (!is_xmm) { - gen_helper_enter_mmx(); + gen_helper_enter_mmx(cpu_env); } modrm = ldub_code(s->pc++); @@ -3179,7 +3211,7 @@ static void gen_sse(DisasContext *s, int b, target_ulong pc_start, int rex_r) if (is_xmm) reg |= rex_r; mod = (modrm >> 6) & 3; - if (sse_fn_pp == SSE_SPECIAL) { + if (sse_fn_epp == SSE_SPECIAL) { b |= (b1 << 8); switch(b) { case 0x0e7: /* movntq */ @@ -3383,11 +3415,13 @@ static void gen_sse(DisasContext *s, int b, target_ulong pc_start, int rex_r) tcg_gen_addi_ptr(cpu_ptr0, cpu_env, offsetof(CPUX86State,xmm_regs[reg])); if (b1 == 1) - gen_helper_extrq_i(cpu_ptr0, tcg_const_i32(bit_index), - tcg_const_i32(field_length)); + gen_helper_extrq_i(cpu_env, cpu_ptr0, + tcg_const_i32(bit_index), + tcg_const_i32(field_length)); else - gen_helper_insertq_i(cpu_ptr0, tcg_const_i32(bit_index), - tcg_const_i32(field_length)); + gen_helper_insertq_i(cpu_env, cpu_ptr0, + tcg_const_i32(bit_index), + tcg_const_i32(field_length)); } break; case 0x7e: /* movd ea, mm */ @@ -3516,8 +3550,9 @@ static void gen_sse(DisasContext *s, int b, target_ulong pc_start, int rex_r) tcg_gen_st32_tl(cpu_T[0], cpu_env, offsetof(CPUX86State,mmx_t0.MMX_L(1))); op1_offset = offsetof(CPUX86State,mmx_t0); } - sse_fn_pp = sse_op_table2[((b - 1) & 3) * 8 + (((modrm >> 3)) & 7)][b1]; - if (!sse_fn_pp) { + sse_fn_epp = sse_op_table2[((b - 1) & 3) * 8 + + (((modrm >> 3)) & 7)][b1]; + if (!sse_fn_epp) { goto illegal_op; } if (is_xmm) { @@ -3529,13 +3564,13 @@ static void gen_sse(DisasContext *s, int b, target_ulong pc_start, int rex_r) } tcg_gen_addi_ptr(cpu_ptr0, cpu_env, op2_offset); tcg_gen_addi_ptr(cpu_ptr1, cpu_env, op1_offset); - sse_fn_pp(cpu_ptr0, cpu_ptr1); + sse_fn_epp(cpu_env, cpu_ptr0, cpu_ptr1); break; case 0x050: /* movmskps */ rm = (modrm & 7) | REX_B(s); tcg_gen_addi_ptr(cpu_ptr0, cpu_env, offsetof(CPUX86State,xmm_regs[rm])); - gen_helper_movmskps(cpu_tmp2_i32, cpu_ptr0); + gen_helper_movmskps(cpu_tmp2_i32, cpu_env, cpu_ptr0); tcg_gen_extu_i32_tl(cpu_T[0], cpu_tmp2_i32); gen_op_mov_reg_T0(OT_LONG, reg); break; @@ -3543,13 +3578,13 @@ static void gen_sse(DisasContext *s, int b, target_ulong pc_start, int rex_r) rm = (modrm & 7) | REX_B(s); tcg_gen_addi_ptr(cpu_ptr0, cpu_env, offsetof(CPUX86State,xmm_regs[rm])); - gen_helper_movmskpd(cpu_tmp2_i32, cpu_ptr0); + gen_helper_movmskpd(cpu_tmp2_i32, cpu_env, cpu_ptr0); tcg_gen_extu_i32_tl(cpu_T[0], cpu_tmp2_i32); gen_op_mov_reg_T0(OT_LONG, reg); break; case 0x02a: /* cvtpi2ps */ case 0x12a: /* cvtpi2pd */ - gen_helper_enter_mmx(); + gen_helper_enter_mmx(cpu_env); if (mod != 3) { gen_lea_modrm(s, modrm, ®_addr, &offset_addr); op2_offset = offsetof(CPUX86State,mmx_t0); @@ -3563,11 +3598,11 @@ static void gen_sse(DisasContext *s, int b, target_ulong pc_start, int rex_r) tcg_gen_addi_ptr(cpu_ptr1, cpu_env, op2_offset); switch(b >> 8) { case 0x0: - gen_helper_cvtpi2ps(cpu_ptr0, cpu_ptr1); + gen_helper_cvtpi2ps(cpu_env, cpu_ptr0, cpu_ptr1); break; default: case 0x1: - gen_helper_cvtpi2pd(cpu_ptr0, cpu_ptr1); + gen_helper_cvtpi2pd(cpu_env, cpu_ptr0, cpu_ptr1); break; } break; @@ -3578,13 +3613,13 @@ static void gen_sse(DisasContext *s, int b, target_ulong pc_start, int rex_r) op1_offset = offsetof(CPUX86State,xmm_regs[reg]); tcg_gen_addi_ptr(cpu_ptr0, cpu_env, op1_offset); if (ot == OT_LONG) { - SSEFunc_0_pi sse_fn_pi = sse_op_table3ai[(b >> 8) & 1]; + SSEFunc_0_epi sse_fn_epi = sse_op_table3ai[(b >> 8) & 1]; tcg_gen_trunc_tl_i32(cpu_tmp2_i32, cpu_T[0]); - sse_fn_pi(cpu_ptr0, cpu_tmp2_i32); + sse_fn_epi(cpu_env, cpu_ptr0, cpu_tmp2_i32); } else { #ifdef TARGET_X86_64 - SSEFunc_0_pl sse_fn_pl = sse_op_table3aq[(b >> 8) & 1]; - sse_fn_pl(cpu_ptr0, cpu_T[0]); + SSEFunc_0_epl sse_fn_epl = sse_op_table3aq[(b >> 8) & 1]; + sse_fn_epl(cpu_env, cpu_ptr0, cpu_T[0]); #else goto illegal_op; #endif @@ -3594,7 +3629,7 @@ static void gen_sse(DisasContext *s, int b, target_ulong pc_start, int rex_r) case 0x12c: /* cvttpd2pi */ case 0x02d: /* cvtps2pi */ case 0x12d: /* cvtpd2pi */ - gen_helper_enter_mmx(); + gen_helper_enter_mmx(cpu_env); if (mod != 3) { gen_lea_modrm(s, modrm, ®_addr, &offset_addr); op2_offset = offsetof(CPUX86State,xmm_t0); @@ -3608,16 +3643,16 @@ static void gen_sse(DisasContext *s, int b, target_ulong pc_start, int rex_r) tcg_gen_addi_ptr(cpu_ptr1, cpu_env, op2_offset); switch(b) { case 0x02c: - gen_helper_cvttps2pi(cpu_ptr0, cpu_ptr1); + gen_helper_cvttps2pi(cpu_env, cpu_ptr0, cpu_ptr1); break; case 0x12c: - gen_helper_cvttpd2pi(cpu_ptr0, cpu_ptr1); + gen_helper_cvttpd2pi(cpu_env, cpu_ptr0, cpu_ptr1); break; case 0x02d: - gen_helper_cvtps2pi(cpu_ptr0, cpu_ptr1); + gen_helper_cvtps2pi(cpu_env, cpu_ptr0, cpu_ptr1); break; case 0x12d: - gen_helper_cvtpd2pi(cpu_ptr0, cpu_ptr1); + gen_helper_cvtpd2pi(cpu_env, cpu_ptr0, cpu_ptr1); break; } break; @@ -3641,15 +3676,15 @@ static void gen_sse(DisasContext *s, int b, target_ulong pc_start, int rex_r) } tcg_gen_addi_ptr(cpu_ptr0, cpu_env, op2_offset); if (ot == OT_LONG) { - SSEFunc_i_p sse_fn_i_p = + SSEFunc_i_ep sse_fn_i_ep = sse_op_table3bi[((b >> 7) & 2) | (b & 1)]; - sse_fn_i_p(cpu_tmp2_i32, cpu_ptr0); + sse_fn_i_ep(cpu_tmp2_i32, cpu_env, cpu_ptr0); tcg_gen_extu_i32_tl(cpu_T[0], cpu_tmp2_i32); } else { #ifdef TARGET_X86_64 - SSEFunc_l_p sse_fn_l_p = + SSEFunc_l_ep sse_fn_l_ep = sse_op_table3bq[((b >> 7) & 2) | (b & 1)]; - sse_fn_l_p(cpu_T[0], cpu_ptr0); + sse_fn_l_ep(cpu_T[0], cpu_env, cpu_ptr0); #else goto illegal_op; #endif @@ -3703,14 +3738,14 @@ static void gen_sse(DisasContext *s, int b, target_ulong pc_start, int rex_r) } break; case 0x2d6: /* movq2dq */ - gen_helper_enter_mmx(); + gen_helper_enter_mmx(cpu_env); rm = (modrm & 7); gen_op_movq(offsetof(CPUX86State,xmm_regs[reg].XMM_Q(0)), offsetof(CPUX86State,fpregs[rm].mmx)); gen_op_movq_env_0(offsetof(CPUX86State,xmm_regs[reg].XMM_Q(1))); break; case 0x3d6: /* movdq2q */ - gen_helper_enter_mmx(); + gen_helper_enter_mmx(cpu_env); rm = (modrm & 7) | REX_B(s); gen_op_movq(offsetof(CPUX86State,fpregs[reg & 7].mmx), offsetof(CPUX86State,xmm_regs[rm].XMM_Q(0))); @@ -3722,11 +3757,11 @@ static void gen_sse(DisasContext *s, int b, target_ulong pc_start, int rex_r) if (b1) { rm = (modrm & 7) | REX_B(s); tcg_gen_addi_ptr(cpu_ptr0, cpu_env, offsetof(CPUX86State,xmm_regs[rm])); - gen_helper_pmovmskb_xmm(cpu_tmp2_i32, cpu_ptr0); + gen_helper_pmovmskb_xmm(cpu_tmp2_i32, cpu_env, cpu_ptr0); } else { rm = (modrm & 7); tcg_gen_addi_ptr(cpu_ptr0, cpu_env, offsetof(CPUX86State,fpregs[rm].mmx)); - gen_helper_pmovmskb_mmx(cpu_tmp2_i32, cpu_ptr0); + gen_helper_pmovmskb_mmx(cpu_tmp2_i32, cpu_env, cpu_ptr0); } tcg_gen_extu_i32_tl(cpu_T[0], cpu_tmp2_i32); reg = ((modrm >> 3) & 7) | rex_r; @@ -3745,8 +3780,8 @@ static void gen_sse(DisasContext *s, int b, target_ulong pc_start, int rex_r) goto illegal_op; } - sse_fn_pp = sse_op_table6[b].op[b1]; - if (!sse_fn_pp) { + sse_fn_epp = sse_op_table6[b].op[b1]; + if (!sse_fn_epp) { goto illegal_op; } if (!(s->cpuid_ext_features & sse_op_table6[b].ext_mask)) @@ -3797,13 +3832,13 @@ static void gen_sse(DisasContext *s, int b, target_ulong pc_start, int rex_r) gen_ldq_env_A0(s->mem_index, op2_offset); } } - if (sse_fn_pp == SSE_SPECIAL) { + if (sse_fn_epp == SSE_SPECIAL) { goto illegal_op; } tcg_gen_addi_ptr(cpu_ptr0, cpu_env, op1_offset); tcg_gen_addi_ptr(cpu_ptr1, cpu_env, op2_offset); - sse_fn_pp(cpu_ptr0, cpu_ptr1); + sse_fn_epp(cpu_env, cpu_ptr0, cpu_ptr1); if (b == 0x17) s->cc_op = CC_OP_EFLAGS; @@ -3849,14 +3884,14 @@ static void gen_sse(DisasContext *s, int b, target_ulong pc_start, int rex_r) goto illegal_op; } - sse_fn_ppi = sse_op_table7[b].op[b1]; - if (!sse_fn_ppi) { + sse_fn_eppi = sse_op_table7[b].op[b1]; + if (!sse_fn_eppi) { goto illegal_op; } if (!(s->cpuid_ext_features & sse_op_table7[b].ext_mask)) goto illegal_op; - if (sse_fn_ppi == SSE_SPECIAL) { + if (sse_fn_eppi == SSE_SPECIAL) { ot = (s->dflag == 2) ? OT_QUAD : OT_LONG; rm = (modrm & 7) | REX_B(s); if (mod != 3) @@ -4017,7 +4052,7 @@ static void gen_sse(DisasContext *s, int b, target_ulong pc_start, int rex_r) tcg_gen_addi_ptr(cpu_ptr0, cpu_env, op1_offset); tcg_gen_addi_ptr(cpu_ptr1, cpu_env, op2_offset); - sse_fn_ppi(cpu_ptr0, cpu_ptr1, tcg_const_i32(val)); + sse_fn_eppi(cpu_env, cpu_ptr0, cpu_ptr1, tcg_const_i32(val)); break; default: goto illegal_op; @@ -4072,13 +4107,13 @@ static void gen_sse(DisasContext *s, int b, target_ulong pc_start, int rex_r) if (!(s->cpuid_ext2_features & CPUID_EXT2_3DNOW)) goto illegal_op; val = ldub_code(s->pc++); - sse_fn_pp = sse_op_table5[val]; - if (!sse_fn_pp) { + sse_fn_epp = sse_op_table5[val]; + if (!sse_fn_epp) { goto illegal_op; } tcg_gen_addi_ptr(cpu_ptr0, cpu_env, op1_offset); tcg_gen_addi_ptr(cpu_ptr1, cpu_env, op2_offset); - sse_fn_pp(cpu_ptr0, cpu_ptr1); + sse_fn_epp(cpu_env, cpu_ptr0, cpu_ptr1); break; case 0x70: /* pshufx insn */ case 0xc6: /* pshufx insn */ @@ -4086,7 +4121,7 @@ static void gen_sse(DisasContext *s, int b, target_ulong pc_start, int rex_r) tcg_gen_addi_ptr(cpu_ptr0, cpu_env, op1_offset); tcg_gen_addi_ptr(cpu_ptr1, cpu_env, op2_offset); /* XXX: introduce a new table? */ - sse_fn_ppi = (SSEFunc_0_ppi)sse_fn_pp; + sse_fn_ppi = (SSEFunc_0_ppi)sse_fn_epp; sse_fn_ppi(cpu_ptr0, cpu_ptr1, tcg_const_i32(val)); break; case 0xc2: @@ -4094,11 +4129,11 @@ static void gen_sse(DisasContext *s, int b, target_ulong pc_start, int rex_r) val = ldub_code(s->pc++); if (val >= 8) goto illegal_op; - sse_fn_pp = sse_op_table4[val][b1]; + sse_fn_epp = sse_op_table4[val][b1]; tcg_gen_addi_ptr(cpu_ptr0, cpu_env, op1_offset); tcg_gen_addi_ptr(cpu_ptr1, cpu_env, op2_offset); - sse_fn_pp(cpu_ptr0, cpu_ptr1); + sse_fn_epp(cpu_env, cpu_ptr0, cpu_ptr1); break; case 0xf7: /* maskmov : we must prepare A0 */ @@ -4119,13 +4154,13 @@ static void gen_sse(DisasContext *s, int b, target_ulong pc_start, int rex_r) tcg_gen_addi_ptr(cpu_ptr0, cpu_env, op1_offset); tcg_gen_addi_ptr(cpu_ptr1, cpu_env, op2_offset); /* XXX: introduce a new table? */ - sse_fn_ppt = (SSEFunc_0_ppt)sse_fn_pp; - sse_fn_ppt(cpu_ptr0, cpu_ptr1, cpu_A0); + sse_fn_eppt = (SSEFunc_0_eppt)sse_fn_epp; + sse_fn_eppt(cpu_env, cpu_ptr0, cpu_ptr1, cpu_A0); break; default: tcg_gen_addi_ptr(cpu_ptr0, cpu_env, op1_offset); tcg_gen_addi_ptr(cpu_ptr1, cpu_env, op2_offset); - sse_fn_pp(cpu_ptr0, cpu_ptr1); + sse_fn_epp(cpu_env, cpu_ptr0, cpu_ptr1); break; } if (b == 0x2e || b == 0x2f) { @@ -5542,30 +5577,30 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) case 0: gen_op_ld_T0_A0(OT_LONG + s->mem_index); tcg_gen_trunc_tl_i32(cpu_tmp2_i32, cpu_T[0]); - gen_helper_flds_FT0(cpu_tmp2_i32); + gen_helper_flds_FT0(cpu_env, cpu_tmp2_i32); break; case 1: gen_op_ld_T0_A0(OT_LONG + s->mem_index); tcg_gen_trunc_tl_i32(cpu_tmp2_i32, cpu_T[0]); - gen_helper_fildl_FT0(cpu_tmp2_i32); + gen_helper_fildl_FT0(cpu_env, cpu_tmp2_i32); break; case 2: tcg_gen_qemu_ld64(cpu_tmp1_i64, cpu_A0, (s->mem_index >> 2) - 1); - gen_helper_fldl_FT0(cpu_tmp1_i64); + gen_helper_fldl_FT0(cpu_env, cpu_tmp1_i64); break; case 3: default: gen_op_lds_T0_A0(OT_WORD + s->mem_index); tcg_gen_trunc_tl_i32(cpu_tmp2_i32, cpu_T[0]); - gen_helper_fildl_FT0(cpu_tmp2_i32); + gen_helper_fildl_FT0(cpu_env, cpu_tmp2_i32); break; } gen_helper_fp_arith_ST0_FT0(op1); if (op1 == 3) { /* fcomp needs pop */ - gen_helper_fpop(); + gen_helper_fpop(cpu_env); } } break; @@ -5581,23 +5616,23 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) case 0: gen_op_ld_T0_A0(OT_LONG + s->mem_index); tcg_gen_trunc_tl_i32(cpu_tmp2_i32, cpu_T[0]); - gen_helper_flds_ST0(cpu_tmp2_i32); + gen_helper_flds_ST0(cpu_env, cpu_tmp2_i32); break; case 1: gen_op_ld_T0_A0(OT_LONG + s->mem_index); tcg_gen_trunc_tl_i32(cpu_tmp2_i32, cpu_T[0]); - gen_helper_fildl_ST0(cpu_tmp2_i32); + gen_helper_fildl_ST0(cpu_env, cpu_tmp2_i32); break; case 2: tcg_gen_qemu_ld64(cpu_tmp1_i64, cpu_A0, (s->mem_index >> 2) - 1); - gen_helper_fldl_ST0(cpu_tmp1_i64); + gen_helper_fldl_ST0(cpu_env, cpu_tmp1_i64); break; case 3: default: gen_op_lds_T0_A0(OT_WORD + s->mem_index); tcg_gen_trunc_tl_i32(cpu_tmp2_i32, cpu_T[0]); - gen_helper_fildl_ST0(cpu_tmp2_i32); + gen_helper_fildl_ST0(cpu_env, cpu_tmp2_i32); break; } break; @@ -5605,50 +5640,50 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) /* XXX: the corresponding CPUID bit must be tested ! */ switch(op >> 4) { case 1: - gen_helper_fisttl_ST0(cpu_tmp2_i32); + gen_helper_fisttl_ST0(cpu_tmp2_i32, cpu_env); tcg_gen_extu_i32_tl(cpu_T[0], cpu_tmp2_i32); gen_op_st_T0_A0(OT_LONG + s->mem_index); break; case 2: - gen_helper_fisttll_ST0(cpu_tmp1_i64); + gen_helper_fisttll_ST0(cpu_tmp1_i64, cpu_env); tcg_gen_qemu_st64(cpu_tmp1_i64, cpu_A0, (s->mem_index >> 2) - 1); break; case 3: default: - gen_helper_fistt_ST0(cpu_tmp2_i32); + gen_helper_fistt_ST0(cpu_tmp2_i32, cpu_env); tcg_gen_extu_i32_tl(cpu_T[0], cpu_tmp2_i32); gen_op_st_T0_A0(OT_WORD + s->mem_index); break; } - gen_helper_fpop(); + gen_helper_fpop(cpu_env); break; default: switch(op >> 4) { case 0: - gen_helper_fsts_ST0(cpu_tmp2_i32); + gen_helper_fsts_ST0(cpu_tmp2_i32, cpu_env); tcg_gen_extu_i32_tl(cpu_T[0], cpu_tmp2_i32); gen_op_st_T0_A0(OT_LONG + s->mem_index); break; case 1: - gen_helper_fistl_ST0(cpu_tmp2_i32); + gen_helper_fistl_ST0(cpu_tmp2_i32, cpu_env); tcg_gen_extu_i32_tl(cpu_T[0], cpu_tmp2_i32); gen_op_st_T0_A0(OT_LONG + s->mem_index); break; case 2: - gen_helper_fstl_ST0(cpu_tmp1_i64); + gen_helper_fstl_ST0(cpu_tmp1_i64, cpu_env); tcg_gen_qemu_st64(cpu_tmp1_i64, cpu_A0, (s->mem_index >> 2) - 1); break; case 3: default: - gen_helper_fist_ST0(cpu_tmp2_i32); + gen_helper_fist_ST0(cpu_tmp2_i32, cpu_env); tcg_gen_extu_i32_tl(cpu_T[0], cpu_tmp2_i32); gen_op_st_T0_A0(OT_WORD + s->mem_index); break; } if ((op & 7) == 3) - gen_helper_fpop(); + gen_helper_fpop(cpu_env); break; } break; @@ -5656,22 +5691,21 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) if (s->cc_op != CC_OP_DYNAMIC) gen_op_set_cc_op(s->cc_op); gen_jmp_im(pc_start - s->cs_base); - gen_helper_fldenv( - cpu_A0, tcg_const_i32(s->dflag)); + gen_helper_fldenv(cpu_env, cpu_A0, tcg_const_i32(s->dflag)); break; case 0x0d: /* fldcw mem */ gen_op_ld_T0_A0(OT_WORD + s->mem_index); tcg_gen_trunc_tl_i32(cpu_tmp2_i32, cpu_T[0]); - gen_helper_fldcw(cpu_tmp2_i32); + gen_helper_fldcw(cpu_env, cpu_tmp2_i32); break; case 0x0e: /* fnstenv mem */ if (s->cc_op != CC_OP_DYNAMIC) gen_op_set_cc_op(s->cc_op); gen_jmp_im(pc_start - s->cs_base); - gen_helper_fstenv(cpu_A0, tcg_const_i32(s->dflag)); + gen_helper_fstenv(cpu_env, cpu_A0, tcg_const_i32(s->dflag)); break; case 0x0f: /* fnstcw mem */ - gen_helper_fnstcw(cpu_tmp2_i32); + gen_helper_fnstcw(cpu_tmp2_i32, cpu_env); tcg_gen_extu_i32_tl(cpu_T[0], cpu_tmp2_i32); gen_op_st_T0_A0(OT_WORD + s->mem_index); break; @@ -5679,29 +5713,29 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) if (s->cc_op != CC_OP_DYNAMIC) gen_op_set_cc_op(s->cc_op); gen_jmp_im(pc_start - s->cs_base); - gen_helper_fldt_ST0(cpu_A0); + gen_helper_fldt_ST0(cpu_env, cpu_A0); break; case 0x1f: /* fstpt mem */ if (s->cc_op != CC_OP_DYNAMIC) gen_op_set_cc_op(s->cc_op); gen_jmp_im(pc_start - s->cs_base); - gen_helper_fstt_ST0(cpu_A0); - gen_helper_fpop(); + gen_helper_fstt_ST0(cpu_env, cpu_A0); + gen_helper_fpop(cpu_env); break; case 0x2c: /* frstor mem */ if (s->cc_op != CC_OP_DYNAMIC) gen_op_set_cc_op(s->cc_op); gen_jmp_im(pc_start - s->cs_base); - gen_helper_frstor(cpu_A0, tcg_const_i32(s->dflag)); + gen_helper_frstor(cpu_env, cpu_A0, tcg_const_i32(s->dflag)); break; case 0x2e: /* fnsave mem */ if (s->cc_op != CC_OP_DYNAMIC) gen_op_set_cc_op(s->cc_op); gen_jmp_im(pc_start - s->cs_base); - gen_helper_fsave(cpu_A0, tcg_const_i32(s->dflag)); + gen_helper_fsave(cpu_env, cpu_A0, tcg_const_i32(s->dflag)); break; case 0x2f: /* fnstsw mem */ - gen_helper_fnstsw(cpu_tmp2_i32); + gen_helper_fnstsw(cpu_tmp2_i32, cpu_env); tcg_gen_extu_i32_tl(cpu_T[0], cpu_tmp2_i32); gen_op_st_T0_A0(OT_WORD + s->mem_index); break; @@ -5709,25 +5743,25 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) if (s->cc_op != CC_OP_DYNAMIC) gen_op_set_cc_op(s->cc_op); gen_jmp_im(pc_start - s->cs_base); - gen_helper_fbld_ST0(cpu_A0); + gen_helper_fbld_ST0(cpu_env, cpu_A0); break; case 0x3e: /* fbstp */ if (s->cc_op != CC_OP_DYNAMIC) gen_op_set_cc_op(s->cc_op); gen_jmp_im(pc_start - s->cs_base); - gen_helper_fbst_ST0(cpu_A0); - gen_helper_fpop(); + gen_helper_fbst_ST0(cpu_env, cpu_A0); + gen_helper_fpop(cpu_env); break; case 0x3d: /* fildll */ tcg_gen_qemu_ld64(cpu_tmp1_i64, cpu_A0, (s->mem_index >> 2) - 1); - gen_helper_fildll_ST0(cpu_tmp1_i64); + gen_helper_fildll_ST0(cpu_env, cpu_tmp1_i64); break; case 0x3f: /* fistpll */ - gen_helper_fistll_ST0(cpu_tmp1_i64); + gen_helper_fistll_ST0(cpu_tmp1_i64, cpu_env); tcg_gen_qemu_st64(cpu_tmp1_i64, cpu_A0, (s->mem_index >> 2) - 1); - gen_helper_fpop(); + gen_helper_fpop(cpu_env); break; default: goto illegal_op; @@ -5738,13 +5772,14 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) switch(op) { case 0x08: /* fld sti */ - gen_helper_fpush(); - gen_helper_fmov_ST0_STN(tcg_const_i32((opreg + 1) & 7)); + gen_helper_fpush(cpu_env); + gen_helper_fmov_ST0_STN(cpu_env, + tcg_const_i32((opreg + 1) & 7)); break; case 0x09: /* fxchg sti */ case 0x29: /* fxchg4 sti, undocumented op */ case 0x39: /* fxchg7 sti, undocumented op */ - gen_helper_fxchg_ST0_STN(tcg_const_i32(opreg)); + gen_helper_fxchg_ST0_STN(cpu_env, tcg_const_i32(opreg)); break; case 0x0a: /* grp d9/2 */ switch(rm) { @@ -5753,7 +5788,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) if (s->cc_op != CC_OP_DYNAMIC) gen_op_set_cc_op(s->cc_op); gen_jmp_im(pc_start - s->cs_base); - gen_helper_fwait(); + gen_helper_fwait(cpu_env); break; default: goto illegal_op; @@ -5762,17 +5797,17 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) case 0x0c: /* grp d9/4 */ switch(rm) { case 0: /* fchs */ - gen_helper_fchs_ST0(); + gen_helper_fchs_ST0(cpu_env); break; case 1: /* fabs */ - gen_helper_fabs_ST0(); + gen_helper_fabs_ST0(cpu_env); break; case 4: /* ftst */ - gen_helper_fldz_FT0(); - gen_helper_fcom_ST0_FT0(); + gen_helper_fldz_FT0(cpu_env); + gen_helper_fcom_ST0_FT0(cpu_env); break; case 5: /* fxam */ - gen_helper_fxam_ST0(); + gen_helper_fxam_ST0(cpu_env); break; default: goto illegal_op; @@ -5782,32 +5817,32 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) { switch(rm) { case 0: - gen_helper_fpush(); - gen_helper_fld1_ST0(); + gen_helper_fpush(cpu_env); + gen_helper_fld1_ST0(cpu_env); break; case 1: - gen_helper_fpush(); - gen_helper_fldl2t_ST0(); + gen_helper_fpush(cpu_env); + gen_helper_fldl2t_ST0(cpu_env); break; case 2: - gen_helper_fpush(); - gen_helper_fldl2e_ST0(); + gen_helper_fpush(cpu_env); + gen_helper_fldl2e_ST0(cpu_env); break; case 3: - gen_helper_fpush(); - gen_helper_fldpi_ST0(); + gen_helper_fpush(cpu_env); + gen_helper_fldpi_ST0(cpu_env); break; case 4: - gen_helper_fpush(); - gen_helper_fldlg2_ST0(); + gen_helper_fpush(cpu_env); + gen_helper_fldlg2_ST0(cpu_env); break; case 5: - gen_helper_fpush(); - gen_helper_fldln2_ST0(); + gen_helper_fpush(cpu_env); + gen_helper_fldln2_ST0(cpu_env); break; case 6: - gen_helper_fpush(); - gen_helper_fldz_ST0(); + gen_helper_fpush(cpu_env); + gen_helper_fldz_ST0(cpu_env); break; default: goto illegal_op; @@ -5817,58 +5852,58 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) case 0x0e: /* grp d9/6 */ switch(rm) { case 0: /* f2xm1 */ - gen_helper_f2xm1(); + gen_helper_f2xm1(cpu_env); break; case 1: /* fyl2x */ - gen_helper_fyl2x(); + gen_helper_fyl2x(cpu_env); break; case 2: /* fptan */ - gen_helper_fptan(); + gen_helper_fptan(cpu_env); break; case 3: /* fpatan */ - gen_helper_fpatan(); + gen_helper_fpatan(cpu_env); break; case 4: /* fxtract */ - gen_helper_fxtract(); + gen_helper_fxtract(cpu_env); break; case 5: /* fprem1 */ - gen_helper_fprem1(); + gen_helper_fprem1(cpu_env); break; case 6: /* fdecstp */ - gen_helper_fdecstp(); + gen_helper_fdecstp(cpu_env); break; default: case 7: /* fincstp */ - gen_helper_fincstp(); + gen_helper_fincstp(cpu_env); break; } break; case 0x0f: /* grp d9/7 */ switch(rm) { case 0: /* fprem */ - gen_helper_fprem(); + gen_helper_fprem(cpu_env); break; case 1: /* fyl2xp1 */ - gen_helper_fyl2xp1(); + gen_helper_fyl2xp1(cpu_env); break; case 2: /* fsqrt */ - gen_helper_fsqrt(); + gen_helper_fsqrt(cpu_env); break; case 3: /* fsincos */ - gen_helper_fsincos(); + gen_helper_fsincos(cpu_env); break; case 5: /* fscale */ - gen_helper_fscale(); + gen_helper_fscale(cpu_env); break; case 4: /* frndint */ - gen_helper_frndint(); + gen_helper_frndint(cpu_env); break; case 6: /* fsin */ - gen_helper_fsin(); + gen_helper_fsin(cpu_env); break; default: case 7: /* fcos */ - gen_helper_fcos(); + gen_helper_fcos(cpu_env); break; } break; @@ -5882,32 +5917,32 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) if (op >= 0x20) { gen_helper_fp_arith_STN_ST0(op1, opreg); if (op >= 0x30) - gen_helper_fpop(); + gen_helper_fpop(cpu_env); } else { - gen_helper_fmov_FT0_STN(tcg_const_i32(opreg)); + gen_helper_fmov_FT0_STN(cpu_env, tcg_const_i32(opreg)); gen_helper_fp_arith_ST0_FT0(op1); } } break; case 0x02: /* fcom */ case 0x22: /* fcom2, undocumented op */ - gen_helper_fmov_FT0_STN(tcg_const_i32(opreg)); - gen_helper_fcom_ST0_FT0(); + gen_helper_fmov_FT0_STN(cpu_env, tcg_const_i32(opreg)); + gen_helper_fcom_ST0_FT0(cpu_env); break; case 0x03: /* fcomp */ case 0x23: /* fcomp3, undocumented op */ case 0x32: /* fcomp5, undocumented op */ - gen_helper_fmov_FT0_STN(tcg_const_i32(opreg)); - gen_helper_fcom_ST0_FT0(); - gen_helper_fpop(); + gen_helper_fmov_FT0_STN(cpu_env, tcg_const_i32(opreg)); + gen_helper_fcom_ST0_FT0(cpu_env); + gen_helper_fpop(cpu_env); break; case 0x15: /* da/5 */ switch(rm) { case 1: /* fucompp */ - gen_helper_fmov_FT0_STN(tcg_const_i32(1)); - gen_helper_fucom_ST0_FT0(); - gen_helper_fpop(); - gen_helper_fpop(); + gen_helper_fmov_FT0_STN(cpu_env, tcg_const_i32(1)); + gen_helper_fucom_ST0_FT0(cpu_env); + gen_helper_fpop(cpu_env); + gen_helper_fpop(cpu_env); break; default: goto illegal_op; @@ -5920,10 +5955,10 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) case 1: /* fdisi (287 only, just do nop here) */ break; case 2: /* fclex */ - gen_helper_fclex(); + gen_helper_fclex(cpu_env); break; case 3: /* fninit */ - gen_helper_fninit(); + gen_helper_fninit(cpu_env); break; case 4: /* fsetpm (287 only, just do nop here) */ break; @@ -5934,59 +5969,59 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) case 0x1d: /* fucomi */ if (s->cc_op != CC_OP_DYNAMIC) gen_op_set_cc_op(s->cc_op); - gen_helper_fmov_FT0_STN(tcg_const_i32(opreg)); - gen_helper_fucomi_ST0_FT0(); + gen_helper_fmov_FT0_STN(cpu_env, tcg_const_i32(opreg)); + gen_helper_fucomi_ST0_FT0(cpu_env); s->cc_op = CC_OP_EFLAGS; break; case 0x1e: /* fcomi */ if (s->cc_op != CC_OP_DYNAMIC) gen_op_set_cc_op(s->cc_op); - gen_helper_fmov_FT0_STN(tcg_const_i32(opreg)); - gen_helper_fcomi_ST0_FT0(); + gen_helper_fmov_FT0_STN(cpu_env, tcg_const_i32(opreg)); + gen_helper_fcomi_ST0_FT0(cpu_env); s->cc_op = CC_OP_EFLAGS; break; case 0x28: /* ffree sti */ - gen_helper_ffree_STN(tcg_const_i32(opreg)); + gen_helper_ffree_STN(cpu_env, tcg_const_i32(opreg)); break; case 0x2a: /* fst sti */ - gen_helper_fmov_STN_ST0(tcg_const_i32(opreg)); + gen_helper_fmov_STN_ST0(cpu_env, tcg_const_i32(opreg)); break; case 0x2b: /* fstp sti */ case 0x0b: /* fstp1 sti, undocumented op */ case 0x3a: /* fstp8 sti, undocumented op */ case 0x3b: /* fstp9 sti, undocumented op */ - gen_helper_fmov_STN_ST0(tcg_const_i32(opreg)); - gen_helper_fpop(); + gen_helper_fmov_STN_ST0(cpu_env, tcg_const_i32(opreg)); + gen_helper_fpop(cpu_env); break; case 0x2c: /* fucom st(i) */ - gen_helper_fmov_FT0_STN(tcg_const_i32(opreg)); - gen_helper_fucom_ST0_FT0(); + gen_helper_fmov_FT0_STN(cpu_env, tcg_const_i32(opreg)); + gen_helper_fucom_ST0_FT0(cpu_env); break; case 0x2d: /* fucomp st(i) */ - gen_helper_fmov_FT0_STN(tcg_const_i32(opreg)); - gen_helper_fucom_ST0_FT0(); - gen_helper_fpop(); + gen_helper_fmov_FT0_STN(cpu_env, tcg_const_i32(opreg)); + gen_helper_fucom_ST0_FT0(cpu_env); + gen_helper_fpop(cpu_env); break; case 0x33: /* de/3 */ switch(rm) { case 1: /* fcompp */ - gen_helper_fmov_FT0_STN(tcg_const_i32(1)); - gen_helper_fcom_ST0_FT0(); - gen_helper_fpop(); - gen_helper_fpop(); + gen_helper_fmov_FT0_STN(cpu_env, tcg_const_i32(1)); + gen_helper_fcom_ST0_FT0(cpu_env); + gen_helper_fpop(cpu_env); + gen_helper_fpop(cpu_env); break; default: goto illegal_op; } break; case 0x38: /* ffreep sti, undocumented op */ - gen_helper_ffree_STN(tcg_const_i32(opreg)); - gen_helper_fpop(); + gen_helper_ffree_STN(cpu_env, tcg_const_i32(opreg)); + gen_helper_fpop(cpu_env); break; case 0x3c: /* df/4 */ switch(rm) { case 0: - gen_helper_fnstsw(cpu_tmp2_i32); + gen_helper_fnstsw(cpu_tmp2_i32, cpu_env); tcg_gen_extu_i32_tl(cpu_T[0], cpu_tmp2_i32); gen_op_mov_reg_T0(OT_WORD, R_EAX); break; @@ -5997,17 +6032,17 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) case 0x3d: /* fucomip */ if (s->cc_op != CC_OP_DYNAMIC) gen_op_set_cc_op(s->cc_op); - gen_helper_fmov_FT0_STN(tcg_const_i32(opreg)); - gen_helper_fucomi_ST0_FT0(); - gen_helper_fpop(); + gen_helper_fmov_FT0_STN(cpu_env, tcg_const_i32(opreg)); + gen_helper_fucomi_ST0_FT0(cpu_env); + gen_helper_fpop(cpu_env); s->cc_op = CC_OP_EFLAGS; break; case 0x3e: /* fcomip */ if (s->cc_op != CC_OP_DYNAMIC) gen_op_set_cc_op(s->cc_op); - gen_helper_fmov_FT0_STN(tcg_const_i32(opreg)); - gen_helper_fcomi_ST0_FT0(); - gen_helper_fpop(); + gen_helper_fmov_FT0_STN(cpu_env, tcg_const_i32(opreg)); + gen_helper_fcomi_ST0_FT0(cpu_env); + gen_helper_fpop(cpu_env); s->cc_op = CC_OP_EFLAGS; break; case 0x10 ... 0x13: /* fcmovxx */ @@ -6023,7 +6058,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) op1 = fcmov_cc[op & 3] | (((op >> 3) & 1) ^ 1); l1 = gen_new_label(); gen_jcc1(s, s->cc_op, op1, l1); - gen_helper_fmov_ST0_STN(tcg_const_i32(opreg)); + gen_helper_fmov_ST0_STN(cpu_env, tcg_const_i32(opreg)); gen_set_label(l1); } break; @@ -6742,7 +6777,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) if (s->cc_op != CC_OP_DYNAMIC) gen_op_set_cc_op(s->cc_op); gen_jmp_im(pc_start - s->cs_base); - gen_helper_fwait(); + gen_helper_fwait(cpu_env); } break; case 0xcc: /* int3 */ @@ -7579,7 +7614,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) if (s->cc_op != CC_OP_DYNAMIC) gen_op_set_cc_op(s->cc_op); gen_jmp_im(pc_start - s->cs_base); - gen_helper_fxsave(cpu_A0, tcg_const_i32((s->dflag == 2))); + gen_helper_fxsave(cpu_env, cpu_A0, tcg_const_i32((s->dflag == 2))); break; case 1: /* fxrstor */ if (mod == 3 || !(s->cpuid_features & CPUID_FXSR) || @@ -7593,7 +7628,8 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) if (s->cc_op != CC_OP_DYNAMIC) gen_op_set_cc_op(s->cc_op); gen_jmp_im(pc_start - s->cs_base); - gen_helper_fxrstor(cpu_A0, tcg_const_i32((s->dflag == 2))); + gen_helper_fxrstor(cpu_env, cpu_A0, + tcg_const_i32((s->dflag == 2))); break; case 2: /* ldmxcsr */ case 3: /* stmxcsr */ @@ -7608,7 +7644,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) if (op == 2) { gen_op_ld_T0_A0(OT_LONG + s->mem_index); tcg_gen_trunc_tl_i32(cpu_tmp2_i32, cpu_T[0]); - gen_helper_ldmxcsr(cpu_tmp2_i32); + gen_helper_ldmxcsr(cpu_env, cpu_tmp2_i32); } else { tcg_gen_ld32u_tl(cpu_T[0], cpu_env, offsetof(CPUX86State, mxcsr)); gen_op_st_T0_A0(OT_LONG + s->mem_index); @@ -7671,7 +7707,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) ot = OT_QUAD; gen_ldst_modrm(s, modrm, ot, OR_TMP0, 0); - gen_helper_popcnt(cpu_T[0], cpu_T[0], tcg_const_i32(ot)); + gen_helper_popcnt(cpu_T[0], cpu_env, cpu_T[0], tcg_const_i32(ot)); gen_op_mov_reg_T0(ot, reg); s->cc_op = CC_OP_EFLAGS; -- cgit v1.1 From f0967a1add1e01df75607b9de5ef6cf83bfa0f82 Mon Sep 17 00:00:00 2001 From: Blue Swirl Date: Sun, 29 Apr 2012 12:45:34 +0000 Subject: x86: avoid AREG0 for condition code helpers Add an explicit CPUX86State parameter instead of relying on AREG0. Signed-off-by: Blue Swirl --- target-i386/Makefile.objs | 1 - target-i386/cc_helper.c | 199 +++++++++++++++++------------------- target-i386/cc_helper_template.h | 36 +++---- target-i386/helper.h | 20 ++-- target-i386/int_helper.c | 8 +- target-i386/mem_helper.c | 4 +- target-i386/misc_helper.c | 2 +- target-i386/seg_helper.c | 8 +- target-i386/shift_helper_template.h | 4 +- target-i386/translate.c | 66 +++++++----- 10 files changed, 179 insertions(+), 169 deletions(-) diff --git a/target-i386/Makefile.objs b/target-i386/Makefile.objs index 88e7280..54a6556 100644 --- a/target-i386/Makefile.objs +++ b/target-i386/Makefile.objs @@ -7,7 +7,6 @@ obj-$(CONFIG_NO_KVM) += kvm-stub.o obj-$(CONFIG_LINUX_USER) += ioport-user.o obj-$(CONFIG_BSD_USER) += ioport-user.o -$(obj)/cc_helper.o: QEMU_CFLAGS += $(HELPER_CFLAGS) $(obj)/int_helper.o: QEMU_CFLAGS += $(HELPER_CFLAGS) $(obj)/svm_helper.o: QEMU_CFLAGS += $(HELPER_CFLAGS) $(obj)/smm_helper.o: QEMU_CFLAGS += $(HELPER_CFLAGS) diff --git a/target-i386/cc_helper.c b/target-i386/cc_helper.c index ff654bc..07892f9 100644 --- a/target-i386/cc_helper.c +++ b/target-i386/cc_helper.c @@ -18,7 +18,6 @@ */ #include "cpu.h" -#include "dyngen-exec.h" #include "helper.h" const uint8_t parity_table[256] = { @@ -76,184 +75,177 @@ const uint8_t parity_table[256] = { #endif -static int compute_all_eflags(void) +static int compute_all_eflags(CPUX86State *env) { return CC_SRC; } -static int compute_c_eflags(void) +static int compute_c_eflags(CPUX86State *env) { return CC_SRC & CC_C; } -uint32_t helper_cc_compute_all(int op) +uint32_t helper_cc_compute_all(CPUX86State *env, int op) { switch (op) { default: /* should never happen */ return 0; case CC_OP_EFLAGS: - return compute_all_eflags(); + return compute_all_eflags(env); case CC_OP_MULB: - return compute_all_mulb(); + return compute_all_mulb(env); case CC_OP_MULW: - return compute_all_mulw(); + return compute_all_mulw(env); case CC_OP_MULL: - return compute_all_mull(); + return compute_all_mull(env); case CC_OP_ADDB: - return compute_all_addb(); + return compute_all_addb(env); case CC_OP_ADDW: - return compute_all_addw(); + return compute_all_addw(env); case CC_OP_ADDL: - return compute_all_addl(); + return compute_all_addl(env); case CC_OP_ADCB: - return compute_all_adcb(); + return compute_all_adcb(env); case CC_OP_ADCW: - return compute_all_adcw(); + return compute_all_adcw(env); case CC_OP_ADCL: - return compute_all_adcl(); + return compute_all_adcl(env); case CC_OP_SUBB: - return compute_all_subb(); + return compute_all_subb(env); case CC_OP_SUBW: - return compute_all_subw(); + return compute_all_subw(env); case CC_OP_SUBL: - return compute_all_subl(); + return compute_all_subl(env); case CC_OP_SBBB: - return compute_all_sbbb(); + return compute_all_sbbb(env); case CC_OP_SBBW: - return compute_all_sbbw(); + return compute_all_sbbw(env); case CC_OP_SBBL: - return compute_all_sbbl(); + return compute_all_sbbl(env); case CC_OP_LOGICB: - return compute_all_logicb(); + return compute_all_logicb(env); case CC_OP_LOGICW: - return compute_all_logicw(); + return compute_all_logicw(env); case CC_OP_LOGICL: - return compute_all_logicl(); + return compute_all_logicl(env); case CC_OP_INCB: - return compute_all_incb(); + return compute_all_incb(env); case CC_OP_INCW: - return compute_all_incw(); + return compute_all_incw(env); case CC_OP_INCL: - return compute_all_incl(); + return compute_all_incl(env); case CC_OP_DECB: - return compute_all_decb(); + return compute_all_decb(env); case CC_OP_DECW: - return compute_all_decw(); + return compute_all_decw(env); case CC_OP_DECL: - return compute_all_decl(); + return compute_all_decl(env); case CC_OP_SHLB: - return compute_all_shlb(); + return compute_all_shlb(env); case CC_OP_SHLW: - return compute_all_shlw(); + return compute_all_shlw(env); case CC_OP_SHLL: - return compute_all_shll(); + return compute_all_shll(env); case CC_OP_SARB: - return compute_all_sarb(); + return compute_all_sarb(env); case CC_OP_SARW: - return compute_all_sarw(); + return compute_all_sarw(env); case CC_OP_SARL: - return compute_all_sarl(); + return compute_all_sarl(env); #ifdef TARGET_X86_64 case CC_OP_MULQ: - return compute_all_mulq(); + return compute_all_mulq(env); case CC_OP_ADDQ: - return compute_all_addq(); + return compute_all_addq(env); case CC_OP_ADCQ: - return compute_all_adcq(); + return compute_all_adcq(env); case CC_OP_SUBQ: - return compute_all_subq(); + return compute_all_subq(env); case CC_OP_SBBQ: - return compute_all_sbbq(); + return compute_all_sbbq(env); case CC_OP_LOGICQ: - return compute_all_logicq(); + return compute_all_logicq(env); case CC_OP_INCQ: - return compute_all_incq(); + return compute_all_incq(env); case CC_OP_DECQ: - return compute_all_decq(); + return compute_all_decq(env); case CC_OP_SHLQ: - return compute_all_shlq(); + return compute_all_shlq(env); case CC_OP_SARQ: - return compute_all_sarq(); + return compute_all_sarq(env); #endif } } -uint32_t cpu_cc_compute_all(CPUX86State *env1, int op) +uint32_t cpu_cc_compute_all(CPUX86State *env, int op) { - CPUX86State *saved_env; - uint32_t ret; - - saved_env = env; - env = env1; - ret = helper_cc_compute_all(op); - env = saved_env; - return ret; + return helper_cc_compute_all(env, op); } -uint32_t helper_cc_compute_c(int op) +uint32_t helper_cc_compute_c(CPUX86State *env, int op) { switch (op) { default: /* should never happen */ return 0; case CC_OP_EFLAGS: - return compute_c_eflags(); + return compute_c_eflags(env); case CC_OP_MULB: - return compute_c_mull(); + return compute_c_mull(env); case CC_OP_MULW: - return compute_c_mull(); + return compute_c_mull(env); case CC_OP_MULL: - return compute_c_mull(); + return compute_c_mull(env); case CC_OP_ADDB: - return compute_c_addb(); + return compute_c_addb(env); case CC_OP_ADDW: - return compute_c_addw(); + return compute_c_addw(env); case CC_OP_ADDL: - return compute_c_addl(); + return compute_c_addl(env); case CC_OP_ADCB: - return compute_c_adcb(); + return compute_c_adcb(env); case CC_OP_ADCW: - return compute_c_adcw(); + return compute_c_adcw(env); case CC_OP_ADCL: - return compute_c_adcl(); + return compute_c_adcl(env); case CC_OP_SUBB: - return compute_c_subb(); + return compute_c_subb(env); case CC_OP_SUBW: - return compute_c_subw(); + return compute_c_subw(env); case CC_OP_SUBL: - return compute_c_subl(); + return compute_c_subl(env); case CC_OP_SBBB: - return compute_c_sbbb(); + return compute_c_sbbb(env); case CC_OP_SBBW: - return compute_c_sbbw(); + return compute_c_sbbw(env); case CC_OP_SBBL: - return compute_c_sbbl(); + return compute_c_sbbl(env); case CC_OP_LOGICB: return compute_c_logicb(); @@ -263,111 +255,112 @@ uint32_t helper_cc_compute_c(int op) return compute_c_logicl(); case CC_OP_INCB: - return compute_c_incl(); + return compute_c_incl(env); case CC_OP_INCW: - return compute_c_incl(); + return compute_c_incl(env); case CC_OP_INCL: - return compute_c_incl(); + return compute_c_incl(env); case CC_OP_DECB: - return compute_c_incl(); + return compute_c_incl(env); case CC_OP_DECW: - return compute_c_incl(); + return compute_c_incl(env); case CC_OP_DECL: - return compute_c_incl(); + return compute_c_incl(env); case CC_OP_SHLB: - return compute_c_shlb(); + return compute_c_shlb(env); case CC_OP_SHLW: - return compute_c_shlw(); + return compute_c_shlw(env); case CC_OP_SHLL: - return compute_c_shll(); + return compute_c_shll(env); case CC_OP_SARB: - return compute_c_sarl(); + return compute_c_sarl(env); case CC_OP_SARW: - return compute_c_sarl(); + return compute_c_sarl(env); case CC_OP_SARL: - return compute_c_sarl(); + return compute_c_sarl(env); #ifdef TARGET_X86_64 case CC_OP_MULQ: - return compute_c_mull(); + return compute_c_mull(env); case CC_OP_ADDQ: - return compute_c_addq(); + return compute_c_addq(env); case CC_OP_ADCQ: - return compute_c_adcq(); + return compute_c_adcq(env); case CC_OP_SUBQ: - return compute_c_subq(); + return compute_c_subq(env); case CC_OP_SBBQ: - return compute_c_sbbq(); + return compute_c_sbbq(env); case CC_OP_LOGICQ: return compute_c_logicq(); case CC_OP_INCQ: - return compute_c_incl(); + return compute_c_incl(env); case CC_OP_DECQ: - return compute_c_incl(); + return compute_c_incl(env); case CC_OP_SHLQ: - return compute_c_shlq(); + return compute_c_shlq(env); case CC_OP_SARQ: - return compute_c_sarl(); + return compute_c_sarl(env); #endif } } -void helper_write_eflags(target_ulong t0, uint32_t update_mask) +void helper_write_eflags(CPUX86State *env, target_ulong t0, + uint32_t update_mask) { cpu_load_eflags(env, t0, update_mask); } -target_ulong helper_read_eflags(void) +target_ulong helper_read_eflags(CPUX86State *env) { uint32_t eflags; - eflags = helper_cc_compute_all(CC_OP); + eflags = helper_cc_compute_all(env, CC_OP); eflags |= (DF & DF_MASK); eflags |= env->eflags & ~(VM_MASK | RF_MASK); return eflags; } -void helper_clts(void) +void helper_clts(CPUX86State *env) { env->cr[0] &= ~CR0_TS_MASK; env->hflags &= ~HF_TS_MASK; } -void helper_reset_rf(void) +void helper_reset_rf(CPUX86State *env) { env->eflags &= ~RF_MASK; } -void helper_cli(void) +void helper_cli(CPUX86State *env) { env->eflags &= ~IF_MASK; } -void helper_sti(void) +void helper_sti(CPUX86State *env) { env->eflags |= IF_MASK; } #if 0 /* vm86plus instructions */ -void helper_cli_vm(void) +void helper_cli_vm(CPUX86State *env) { env->eflags &= ~VIF_MASK; } -void helper_sti_vm(void) +void helper_sti_vm(CPUX86State *env) { env->eflags |= VIF_MASK; if (env->eflags & VIP_MASK) { @@ -376,12 +369,12 @@ void helper_sti_vm(void) } #endif -void helper_set_inhibit_irq(void) +void helper_set_inhibit_irq(CPUX86State *env) { env->hflags |= HF_INHIBIT_IRQ_MASK; } -void helper_reset_inhibit_irq(void) +void helper_reset_inhibit_irq(CPUX86State *env) { env->hflags &= ~HF_INHIBIT_IRQ_MASK; } diff --git a/target-i386/cc_helper_template.h b/target-i386/cc_helper_template.h index ff22830..1f94e11 100644 --- a/target-i386/cc_helper_template.h +++ b/target-i386/cc_helper_template.h @@ -42,7 +42,7 @@ /* dynamic flags computation */ -static int glue(compute_all_add, SUFFIX)(void) +static int glue(compute_all_add, SUFFIX)(CPUX86State *env) { int cf, pf, af, zf, sf, of; target_long src1, src2; @@ -58,7 +58,7 @@ static int glue(compute_all_add, SUFFIX)(void) return cf | pf | af | zf | sf | of; } -static int glue(compute_c_add, SUFFIX)(void) +static int glue(compute_c_add, SUFFIX)(CPUX86State *env) { int cf; target_long src1; @@ -68,7 +68,7 @@ static int glue(compute_c_add, SUFFIX)(void) return cf; } -static int glue(compute_all_adc, SUFFIX)(void) +static int glue(compute_all_adc, SUFFIX)(CPUX86State *env) { int cf, pf, af, zf, sf, of; target_long src1, src2; @@ -84,7 +84,7 @@ static int glue(compute_all_adc, SUFFIX)(void) return cf | pf | af | zf | sf | of; } -static int glue(compute_c_adc, SUFFIX)(void) +static int glue(compute_c_adc, SUFFIX)(CPUX86State *env) { int cf; target_long src1; @@ -94,7 +94,7 @@ static int glue(compute_c_adc, SUFFIX)(void) return cf; } -static int glue(compute_all_sub, SUFFIX)(void) +static int glue(compute_all_sub, SUFFIX)(CPUX86State *env) { int cf, pf, af, zf, sf, of; target_long src1, src2; @@ -110,7 +110,7 @@ static int glue(compute_all_sub, SUFFIX)(void) return cf | pf | af | zf | sf | of; } -static int glue(compute_c_sub, SUFFIX)(void) +static int glue(compute_c_sub, SUFFIX)(CPUX86State *env) { int cf; target_long src1, src2; @@ -121,7 +121,7 @@ static int glue(compute_c_sub, SUFFIX)(void) return cf; } -static int glue(compute_all_sbb, SUFFIX)(void) +static int glue(compute_all_sbb, SUFFIX)(CPUX86State *env) { int cf, pf, af, zf, sf, of; target_long src1, src2; @@ -137,7 +137,7 @@ static int glue(compute_all_sbb, SUFFIX)(void) return cf | pf | af | zf | sf | of; } -static int glue(compute_c_sbb, SUFFIX)(void) +static int glue(compute_c_sbb, SUFFIX)(CPUX86State *env) { int cf; target_long src1, src2; @@ -148,7 +148,7 @@ static int glue(compute_c_sbb, SUFFIX)(void) return cf; } -static int glue(compute_all_logic, SUFFIX)(void) +static int glue(compute_all_logic, SUFFIX)(CPUX86State *env) { int cf, pf, af, zf, sf, of; @@ -166,7 +166,7 @@ static int glue(compute_c_logic, SUFFIX)(void) return 0; } -static int glue(compute_all_inc, SUFFIX)(void) +static int glue(compute_all_inc, SUFFIX)(CPUX86State *env) { int cf, pf, af, zf, sf, of; target_long src1, src2; @@ -183,13 +183,13 @@ static int glue(compute_all_inc, SUFFIX)(void) } #if DATA_BITS == 32 -static int glue(compute_c_inc, SUFFIX)(void) +static int glue(compute_c_inc, SUFFIX)(CPUX86State *env) { return CC_SRC; } #endif -static int glue(compute_all_dec, SUFFIX)(void) +static int glue(compute_all_dec, SUFFIX)(CPUX86State *env) { int cf, pf, af, zf, sf, of; target_long src1, src2; @@ -205,7 +205,7 @@ static int glue(compute_all_dec, SUFFIX)(void) return cf | pf | af | zf | sf | of; } -static int glue(compute_all_shl, SUFFIX)(void) +static int glue(compute_all_shl, SUFFIX)(CPUX86State *env) { int cf, pf, af, zf, sf, of; @@ -219,19 +219,19 @@ static int glue(compute_all_shl, SUFFIX)(void) return cf | pf | af | zf | sf | of; } -static int glue(compute_c_shl, SUFFIX)(void) +static int glue(compute_c_shl, SUFFIX)(CPUX86State *env) { return (CC_SRC >> (DATA_BITS - 1)) & CC_C; } #if DATA_BITS == 32 -static int glue(compute_c_sar, SUFFIX)(void) +static int glue(compute_c_sar, SUFFIX)(CPUX86State *env) { return CC_SRC & 1; } #endif -static int glue(compute_all_sar, SUFFIX)(void) +static int glue(compute_all_sar, SUFFIX)(CPUX86State *env) { int cf, pf, af, zf, sf, of; @@ -246,7 +246,7 @@ static int glue(compute_all_sar, SUFFIX)(void) } #if DATA_BITS == 32 -static int glue(compute_c_mul, SUFFIX)(void) +static int glue(compute_c_mul, SUFFIX)(CPUX86State *env) { int cf; @@ -257,7 +257,7 @@ static int glue(compute_c_mul, SUFFIX)(void) /* NOTE: we compute the flags like the P4. On olders CPUs, only OF and CF are modified and it is slower to do that. */ -static int glue(compute_all_mul, SUFFIX)(void) +static int glue(compute_all_mul, SUFFIX)(CPUX86State *env) { int cf, pf, af, zf, sf, of; diff --git a/target-i386/helper.h b/target-i386/helper.h index 6fdee8a..d647e54 100644 --- a/target-i386/helper.h +++ b/target-i386/helper.h @@ -1,12 +1,12 @@ #include "def-helper.h" -DEF_HELPER_FLAGS_1(cc_compute_all, TCG_CALL_PURE, i32, int) -DEF_HELPER_FLAGS_1(cc_compute_c, TCG_CALL_PURE, i32, int) +DEF_HELPER_FLAGS_2(cc_compute_all, TCG_CALL_PURE, i32, env, int) +DEF_HELPER_FLAGS_2(cc_compute_c, TCG_CALL_PURE, i32, env, int) DEF_HELPER_0(lock, void) DEF_HELPER_0(unlock, void) -DEF_HELPER_2(write_eflags, void, tl, i32) -DEF_HELPER_0(read_eflags, tl) +DEF_HELPER_3(write_eflags, void, env, tl, i32) +DEF_HELPER_1(read_eflags, tl, env) DEF_HELPER_1(divb_AL, void, tl) DEF_HELPER_1(idivb_AL, void, tl) DEF_HELPER_1(divw_AX, void, tl) @@ -44,7 +44,7 @@ DEF_HELPER_2(lret_protected, void, int, int) DEF_HELPER_1(read_crN, tl, int) DEF_HELPER_2(write_crN, void, int, tl) DEF_HELPER_1(lmsw, void, tl) -DEF_HELPER_0(clts, void) +DEF_HELPER_1(clts, void, env) DEF_HELPER_2(movl_drN_T0, void, int, tl) DEF_HELPER_1(invlpg, void, tl) @@ -62,13 +62,13 @@ DEF_HELPER_1(hlt, void, int) DEF_HELPER_1(monitor, void, tl) DEF_HELPER_1(mwait, void, int) DEF_HELPER_0(debug, void) -DEF_HELPER_0(reset_rf, void) +DEF_HELPER_1(reset_rf, void, env) DEF_HELPER_3(raise_interrupt, void, env, int, int) DEF_HELPER_2(raise_exception, void, env, int) -DEF_HELPER_0(cli, void) -DEF_HELPER_0(sti, void) -DEF_HELPER_0(set_inhibit_irq, void) -DEF_HELPER_0(reset_inhibit_irq, void) +DEF_HELPER_1(cli, void, env) +DEF_HELPER_1(sti, void, env) +DEF_HELPER_1(set_inhibit_irq, void, env) +DEF_HELPER_1(reset_inhibit_irq, void, env) DEF_HELPER_2(boundw, void, tl, int) DEF_HELPER_2(boundl, void, tl, int) DEF_HELPER_0(rsm, void) diff --git a/target-i386/int_helper.c b/target-i386/int_helper.c index e1f66f5..1a13e4e 100644 --- a/target-i386/int_helper.c +++ b/target-i386/int_helper.c @@ -185,7 +185,7 @@ void helper_aaa(void) int al, ah, af; int eflags; - eflags = helper_cc_compute_all(CC_OP); + eflags = cpu_cc_compute_all(env, CC_OP); af = eflags & CC_A; al = EAX & 0xff; ah = (EAX >> 8) & 0xff; @@ -209,7 +209,7 @@ void helper_aas(void) int al, ah, af; int eflags; - eflags = helper_cc_compute_all(CC_OP); + eflags = cpu_cc_compute_all(env, CC_OP); af = eflags & CC_A; al = EAX & 0xff; ah = (EAX >> 8) & 0xff; @@ -232,7 +232,7 @@ void helper_daa(void) int old_al, al, af, cf; int eflags; - eflags = helper_cc_compute_all(CC_OP); + eflags = cpu_cc_compute_all(env, CC_OP); cf = eflags & CC_C; af = eflags & CC_A; old_al = al = EAX & 0xff; @@ -259,7 +259,7 @@ void helper_das(void) int al, al1, af, cf; int eflags; - eflags = helper_cc_compute_all(CC_OP); + eflags = cpu_cc_compute_all(env, CC_OP); cf = eflags & CC_C; af = eflags & CC_A; al = EAX & 0xff; diff --git a/target-i386/mem_helper.c b/target-i386/mem_helper.c index 4e0af4b..30c3bd0 100644 --- a/target-i386/mem_helper.c +++ b/target-i386/mem_helper.c @@ -44,7 +44,7 @@ void helper_cmpxchg8b(target_ulong a0) uint64_t d; int eflags; - eflags = helper_cc_compute_all(CC_OP); + eflags = cpu_cc_compute_all(env, CC_OP); d = ldq(a0); if (d == (((uint64_t)EDX << 32) | (uint32_t)EAX)) { stq(a0, ((uint64_t)ECX << 32) | (uint32_t)EBX); @@ -68,7 +68,7 @@ void helper_cmpxchg16b(target_ulong a0) if ((a0 & 0xf) != 0) { raise_exception(env, EXCP0D_GPF); } - eflags = helper_cc_compute_all(CC_OP); + eflags = cpu_cc_compute_all(env, CC_OP); d0 = ldq(a0); d1 = ldq(a0 + 8); if (d0 == EAX && d1 == EDX) { diff --git a/target-i386/misc_helper.c b/target-i386/misc_helper.c index ce675b7..272a636 100644 --- a/target-i386/misc_helper.c +++ b/target-i386/misc_helper.c @@ -102,7 +102,7 @@ void helper_into(int next_eip_addend) { int eflags; - eflags = helper_cc_compute_all(CC_OP); + eflags = cpu_cc_compute_all(env, CC_OP); if (eflags & CC_O) { raise_interrupt(env, EXCP04_INTO, 1, 0, next_eip_addend); } diff --git a/target-i386/seg_helper.c b/target-i386/seg_helper.c index a4b8b64..41d146c 100644 --- a/target-i386/seg_helper.c +++ b/target-i386/seg_helper.c @@ -2294,7 +2294,7 @@ target_ulong helper_lsl(target_ulong selector1) int rpl, dpl, cpl, type; selector = selector1 & 0xffff; - eflags = helper_cc_compute_all(CC_OP); + eflags = cpu_cc_compute_all(env, CC_OP); if ((selector & 0xfffc) == 0) { goto fail; } @@ -2341,7 +2341,7 @@ target_ulong helper_lar(target_ulong selector1) int rpl, dpl, cpl, type; selector = selector1 & 0xffff; - eflags = helper_cc_compute_all(CC_OP); + eflags = cpu_cc_compute_all(env, CC_OP); if ((selector & 0xfffc) == 0) { goto fail; } @@ -2390,7 +2390,7 @@ void helper_verr(target_ulong selector1) int rpl, dpl, cpl; selector = selector1 & 0xffff; - eflags = helper_cc_compute_all(CC_OP); + eflags = cpu_cc_compute_all(env, CC_OP); if ((selector & 0xfffc) == 0) { goto fail; } @@ -2428,7 +2428,7 @@ void helper_verw(target_ulong selector1) int rpl, dpl, cpl; selector = selector1 & 0xffff; - eflags = helper_cc_compute_all(CC_OP); + eflags = cpu_cc_compute_all(env, CC_OP); if ((selector & 0xfffc) == 0) { goto fail; } diff --git a/target-i386/shift_helper_template.h b/target-i386/shift_helper_template.h index 239ee09..dacfdd2 100644 --- a/target-i386/shift_helper_template.h +++ b/target-i386/shift_helper_template.h @@ -54,7 +54,7 @@ target_ulong glue(helper_rcl, SUFFIX)(target_ulong t0, target_ulong t1) count = rclb_table[count]; #endif if (count) { - eflags = helper_cc_compute_all(CC_OP); + eflags = helper_cc_compute_all(env, CC_OP); t0 &= DATA_MASK; src = t0; res = (t0 << count) | ((target_ulong)(eflags & CC_C) << (count - 1)); @@ -84,7 +84,7 @@ target_ulong glue(helper_rcr, SUFFIX)(target_ulong t0, target_ulong t1) count = rclb_table[count]; #endif if (count) { - eflags = helper_cc_compute_all(CC_OP); + eflags = helper_cc_compute_all(env, CC_OP); t0 &= DATA_MASK; src = t0; res = (t0 >> count) | diff --git a/target-i386/translate.c b/target-i386/translate.c index 5e9da9d..15b5b63 100644 --- a/target-i386/translate.c +++ b/target-i386/translate.c @@ -811,14 +811,14 @@ static void gen_op_update_neg_cc(void) /* compute eflags.C to reg */ static void gen_compute_eflags_c(TCGv reg) { - gen_helper_cc_compute_c(cpu_tmp2_i32, cpu_cc_op); + gen_helper_cc_compute_c(cpu_tmp2_i32, cpu_env, cpu_cc_op); tcg_gen_extu_i32_tl(reg, cpu_tmp2_i32); } /* compute all eflags to cc_src */ static void gen_compute_eflags(TCGv reg) { - gen_helper_cc_compute_all(cpu_tmp2_i32, cpu_cc_op); + gen_helper_cc_compute_all(cpu_tmp2_i32, cpu_env, cpu_cc_op); tcg_gen_extu_i32_tl(reg, cpu_tmp2_i32); } @@ -2730,10 +2730,10 @@ static void gen_eob(DisasContext *s) if (s->cc_op != CC_OP_DYNAMIC) gen_op_set_cc_op(s->cc_op); if (s->tb->flags & HF_INHIBIT_IRQ_MASK) { - gen_helper_reset_inhibit_irq(); + gen_helper_reset_inhibit_irq(cpu_env); } if (s->tb->flags & HF_RF_MASK) { - gen_helper_reset_rf(); + gen_helper_reset_rf(cpu_env); } if (s->singlestep_enabled) { gen_helper_debug(); @@ -5143,7 +5143,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) /* If several instructions disable interrupts, only the _first_ does it */ if (!(s->tb->flags & HF_INHIBIT_IRQ_MASK)) - gen_helper_set_inhibit_irq(); + gen_helper_set_inhibit_irq(cpu_env); s->tf = 0; } if (s->is_jmp) { @@ -5219,7 +5219,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) /* If several instructions disable interrupts, only the _first_ does it */ if (!(s->tb->flags & HF_INHIBIT_IRQ_MASK)) - gen_helper_set_inhibit_irq(); + gen_helper_set_inhibit_irq(cpu_env); s->tf = 0; } if (s->is_jmp) { @@ -6475,7 +6475,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) } else { if (s->cc_op != CC_OP_DYNAMIC) gen_op_set_cc_op(s->cc_op); - gen_helper_read_eflags(cpu_T[0]); + gen_helper_read_eflags(cpu_T[0], cpu_env); gen_push_T0(s); } break; @@ -6487,28 +6487,46 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) gen_pop_T0(s); if (s->cpl == 0) { if (s->dflag) { - gen_helper_write_eflags(cpu_T[0], - tcg_const_i32((TF_MASK | AC_MASK | ID_MASK | NT_MASK | IF_MASK | IOPL_MASK))); + gen_helper_write_eflags(cpu_env, cpu_T[0], + tcg_const_i32((TF_MASK | AC_MASK | + ID_MASK | NT_MASK | + IF_MASK | + IOPL_MASK))); } else { - gen_helper_write_eflags(cpu_T[0], - tcg_const_i32((TF_MASK | AC_MASK | ID_MASK | NT_MASK | IF_MASK | IOPL_MASK) & 0xffff)); + gen_helper_write_eflags(cpu_env, cpu_T[0], + tcg_const_i32((TF_MASK | AC_MASK | + ID_MASK | NT_MASK | + IF_MASK | IOPL_MASK) + & 0xffff)); } } else { if (s->cpl <= s->iopl) { if (s->dflag) { - gen_helper_write_eflags(cpu_T[0], - tcg_const_i32((TF_MASK | AC_MASK | ID_MASK | NT_MASK | IF_MASK))); + gen_helper_write_eflags(cpu_env, cpu_T[0], + tcg_const_i32((TF_MASK | + AC_MASK | + ID_MASK | + NT_MASK | + IF_MASK))); } else { - gen_helper_write_eflags(cpu_T[0], - tcg_const_i32((TF_MASK | AC_MASK | ID_MASK | NT_MASK | IF_MASK) & 0xffff)); + gen_helper_write_eflags(cpu_env, cpu_T[0], + tcg_const_i32((TF_MASK | + AC_MASK | + ID_MASK | + NT_MASK | + IF_MASK) + & 0xffff)); } } else { if (s->dflag) { - gen_helper_write_eflags(cpu_T[0], - tcg_const_i32((TF_MASK | AC_MASK | ID_MASK | NT_MASK))); + gen_helper_write_eflags(cpu_env, cpu_T[0], + tcg_const_i32((TF_MASK | AC_MASK | + ID_MASK | NT_MASK))); } else { - gen_helper_write_eflags(cpu_T[0], - tcg_const_i32((TF_MASK | AC_MASK | ID_MASK | NT_MASK) & 0xffff)); + gen_helper_write_eflags(cpu_env, cpu_T[0], + tcg_const_i32((TF_MASK | AC_MASK | + ID_MASK | NT_MASK) + & 0xffff)); } } } @@ -6814,13 +6832,13 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) case 0xfa: /* cli */ if (!s->vm86) { if (s->cpl <= s->iopl) { - gen_helper_cli(); + gen_helper_cli(cpu_env); } else { gen_exception(s, EXCP0D_GPF, pc_start - s->cs_base); } } else { if (s->iopl == 3) { - gen_helper_cli(); + gen_helper_cli(cpu_env); } else { gen_exception(s, EXCP0D_GPF, pc_start - s->cs_base); } @@ -6830,12 +6848,12 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) if (!s->vm86) { if (s->cpl <= s->iopl) { gen_sti: - gen_helper_sti(); + gen_helper_sti(cpu_env); /* interruptions are enabled only the first insn after sti */ /* If several instructions disable interrupts, only the _first_ does it */ if (!(s->tb->flags & HF_INHIBIT_IRQ_MASK)) - gen_helper_set_inhibit_irq(); + gen_helper_set_inhibit_irq(cpu_env); /* give a chance to handle pending irqs */ gen_jmp_im(s->pc - s->cs_base); gen_eob(s); @@ -7578,7 +7596,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) gen_exception(s, EXCP0D_GPF, pc_start - s->cs_base); } else { gen_svm_check_intercept(s, pc_start, SVM_EXIT_WRITE_CR0); - gen_helper_clts(); + gen_helper_clts(cpu_env); /* abort block because static cpu state changed */ gen_jmp_im(s->pc - s->cs_base); gen_eob(s); -- cgit v1.1 From 7923057bae23e44f75a52ce3735c3bd5d55872c1 Mon Sep 17 00:00:00 2001 From: Blue Swirl Date: Sun, 29 Apr 2012 14:11:56 +0000 Subject: x86: avoid AREG0 for integer helpers Add an explicit CPUX86State parameter instead of relying on AREG0. Signed-off-by: Blue Swirl --- target-i386/Makefile.objs | 1 - target-i386/helper.h | 50 ++++++++++++++-------------- target-i386/int_helper.c | 36 ++++++++++---------- target-i386/shift_helper_template.h | 6 ++-- target-i386/translate.c | 66 +++++++++++++++++++++++-------------- 5 files changed, 88 insertions(+), 71 deletions(-) diff --git a/target-i386/Makefile.objs b/target-i386/Makefile.objs index 54a6556..d39ec8e 100644 --- a/target-i386/Makefile.objs +++ b/target-i386/Makefile.objs @@ -7,7 +7,6 @@ obj-$(CONFIG_NO_KVM) += kvm-stub.o obj-$(CONFIG_LINUX_USER) += ioport-user.o obj-$(CONFIG_BSD_USER) += ioport-user.o -$(obj)/int_helper.o: QEMU_CFLAGS += $(HELPER_CFLAGS) $(obj)/svm_helper.o: QEMU_CFLAGS += $(HELPER_CFLAGS) $(obj)/smm_helper.o: QEMU_CFLAGS += $(HELPER_CFLAGS) $(obj)/misc_helper.o: QEMU_CFLAGS += $(HELPER_CFLAGS) diff --git a/target-i386/helper.h b/target-i386/helper.h index d647e54..67c81bf 100644 --- a/target-i386/helper.h +++ b/target-i386/helper.h @@ -7,26 +7,26 @@ DEF_HELPER_0(lock, void) DEF_HELPER_0(unlock, void) DEF_HELPER_3(write_eflags, void, env, tl, i32) DEF_HELPER_1(read_eflags, tl, env) -DEF_HELPER_1(divb_AL, void, tl) -DEF_HELPER_1(idivb_AL, void, tl) -DEF_HELPER_1(divw_AX, void, tl) -DEF_HELPER_1(idivw_AX, void, tl) -DEF_HELPER_1(divl_EAX, void, tl) -DEF_HELPER_1(idivl_EAX, void, tl) +DEF_HELPER_2(divb_AL, void, env, tl) +DEF_HELPER_2(idivb_AL, void, env, tl) +DEF_HELPER_2(divw_AX, void, env, tl) +DEF_HELPER_2(idivw_AX, void, env, tl) +DEF_HELPER_2(divl_EAX, void, env, tl) +DEF_HELPER_2(idivl_EAX, void, env, tl) #ifdef TARGET_X86_64 -DEF_HELPER_1(mulq_EAX_T0, void, tl) -DEF_HELPER_1(imulq_EAX_T0, void, tl) -DEF_HELPER_2(imulq_T0_T1, tl, tl, tl) -DEF_HELPER_1(divq_EAX, void, tl) -DEF_HELPER_1(idivq_EAX, void, tl) +DEF_HELPER_2(mulq_EAX_T0, void, env, tl) +DEF_HELPER_2(imulq_EAX_T0, void, env, tl) +DEF_HELPER_3(imulq_T0_T1, tl, env, tl, tl) +DEF_HELPER_2(divq_EAX, void, env, tl) +DEF_HELPER_2(idivq_EAX, void, env, tl) #endif -DEF_HELPER_1(aam, void, int) -DEF_HELPER_1(aad, void, int) -DEF_HELPER_0(aaa, void) -DEF_HELPER_0(aas, void) -DEF_HELPER_0(daa, void) -DEF_HELPER_0(das, void) +DEF_HELPER_2(aam, void, env, int) +DEF_HELPER_2(aad, void, env, int) +DEF_HELPER_1(aaa, void, env) +DEF_HELPER_1(aas, void, env) +DEF_HELPER_1(daa, void, env) +DEF_HELPER_1(das, void, env) DEF_HELPER_1(lsl, tl, tl) DEF_HELPER_1(lar, tl, tl) @@ -207,15 +207,15 @@ DEF_HELPER_3(movq, void, env, ptr, ptr) #define SHIFT 1 #include "ops_sse_header.h" -DEF_HELPER_2(rclb, tl, tl, tl) -DEF_HELPER_2(rclw, tl, tl, tl) -DEF_HELPER_2(rcll, tl, tl, tl) -DEF_HELPER_2(rcrb, tl, tl, tl) -DEF_HELPER_2(rcrw, tl, tl, tl) -DEF_HELPER_2(rcrl, tl, tl, tl) +DEF_HELPER_3(rclb, tl, env, tl, tl) +DEF_HELPER_3(rclw, tl, env, tl, tl) +DEF_HELPER_3(rcll, tl, env, tl, tl) +DEF_HELPER_3(rcrb, tl, env, tl, tl) +DEF_HELPER_3(rcrw, tl, env, tl, tl) +DEF_HELPER_3(rcrl, tl, env, tl, tl) #ifdef TARGET_X86_64 -DEF_HELPER_2(rclq, tl, tl, tl) -DEF_HELPER_2(rcrq, tl, tl, tl) +DEF_HELPER_3(rclq, tl, env, tl, tl) +DEF_HELPER_3(rcrq, tl, env, tl, tl) #endif #include "def-helper.h" diff --git a/target-i386/int_helper.c b/target-i386/int_helper.c index 1a13e4e..f39747e 100644 --- a/target-i386/int_helper.c +++ b/target-i386/int_helper.c @@ -18,7 +18,6 @@ */ #include "cpu.h" -#include "dyngen-exec.h" #include "host-utils.h" #include "helper.h" @@ -42,7 +41,7 @@ static const uint8_t rclw_table[32] = { /* division, flags are undefined */ -void helper_divb_AL(target_ulong t0) +void helper_divb_AL(CPUX86State *env, target_ulong t0) { unsigned int num, den, q, r; @@ -60,7 +59,7 @@ void helper_divb_AL(target_ulong t0) EAX = (EAX & ~0xffff) | (r << 8) | q; } -void helper_idivb_AL(target_ulong t0) +void helper_idivb_AL(CPUX86State *env, target_ulong t0) { int num, den, q, r; @@ -78,7 +77,7 @@ void helper_idivb_AL(target_ulong t0) EAX = (EAX & ~0xffff) | (r << 8) | q; } -void helper_divw_AX(target_ulong t0) +void helper_divw_AX(CPUX86State *env, target_ulong t0) { unsigned int num, den, q, r; @@ -97,7 +96,7 @@ void helper_divw_AX(target_ulong t0) EDX = (EDX & ~0xffff) | r; } -void helper_idivw_AX(target_ulong t0) +void helper_idivw_AX(CPUX86State *env, target_ulong t0) { int num, den, q, r; @@ -116,7 +115,7 @@ void helper_idivw_AX(target_ulong t0) EDX = (EDX & ~0xffff) | r; } -void helper_divl_EAX(target_ulong t0) +void helper_divl_EAX(CPUX86State *env, target_ulong t0) { unsigned int den, r; uint64_t num, q; @@ -135,7 +134,7 @@ void helper_divl_EAX(target_ulong t0) EDX = (uint32_t)r; } -void helper_idivl_EAX(target_ulong t0) +void helper_idivl_EAX(CPUX86State *env, target_ulong t0) { int den, r; int64_t num, q; @@ -157,7 +156,7 @@ void helper_idivl_EAX(target_ulong t0) /* bcd */ /* XXX: exception */ -void helper_aam(int base) +void helper_aam(CPUX86State *env, int base) { int al, ah; @@ -168,7 +167,7 @@ void helper_aam(int base) CC_DST = al; } -void helper_aad(int base) +void helper_aad(CPUX86State *env, int base) { int al, ah; @@ -179,7 +178,7 @@ void helper_aad(int base) CC_DST = al; } -void helper_aaa(void) +void helper_aaa(CPUX86State *env) { int icarry; int al, ah, af; @@ -203,7 +202,7 @@ void helper_aaa(void) CC_SRC = eflags; } -void helper_aas(void) +void helper_aas(CPUX86State *env) { int icarry; int al, ah, af; @@ -227,7 +226,7 @@ void helper_aas(void) CC_SRC = eflags; } -void helper_daa(void) +void helper_daa(CPUX86State *env) { int old_al, al, af, cf; int eflags; @@ -254,7 +253,7 @@ void helper_daa(void) CC_SRC = eflags; } -void helper_das(void) +void helper_das(CPUX86State *env) { int al, al1, af, cf; int eflags; @@ -375,7 +374,7 @@ static int idiv64(uint64_t *plow, uint64_t *phigh, int64_t b) return 0; } -void helper_mulq_EAX_T0(target_ulong t0) +void helper_mulq_EAX_T0(CPUX86State *env, target_ulong t0) { uint64_t r0, r1; @@ -386,7 +385,7 @@ void helper_mulq_EAX_T0(target_ulong t0) CC_SRC = r1; } -void helper_imulq_EAX_T0(target_ulong t0) +void helper_imulq_EAX_T0(CPUX86State *env, target_ulong t0) { uint64_t r0, r1; @@ -397,7 +396,8 @@ void helper_imulq_EAX_T0(target_ulong t0) CC_SRC = ((int64_t)r1 != ((int64_t)r0 >> 63)); } -target_ulong helper_imulq_T0_T1(target_ulong t0, target_ulong t1) +target_ulong helper_imulq_T0_T1(CPUX86State *env, target_ulong t0, + target_ulong t1) { uint64_t r0, r1; @@ -407,7 +407,7 @@ target_ulong helper_imulq_T0_T1(target_ulong t0, target_ulong t1) return r0; } -void helper_divq_EAX(target_ulong t0) +void helper_divq_EAX(CPUX86State *env, target_ulong t0) { uint64_t r0, r1; @@ -423,7 +423,7 @@ void helper_divq_EAX(target_ulong t0) EDX = r1; } -void helper_idivq_EAX(target_ulong t0) +void helper_idivq_EAX(CPUX86State *env, target_ulong t0) { uint64_t r0, r1; diff --git a/target-i386/shift_helper_template.h b/target-i386/shift_helper_template.h index dacfdd2..dda0da3 100644 --- a/target-i386/shift_helper_template.h +++ b/target-i386/shift_helper_template.h @@ -41,7 +41,8 @@ #error unhandled operand size #endif -target_ulong glue(helper_rcl, SUFFIX)(target_ulong t0, target_ulong t1) +target_ulong glue(helper_rcl, SUFFIX)(CPUX86State *env, target_ulong t0, + target_ulong t1) { int count, eflags; target_ulong src; @@ -71,7 +72,8 @@ target_ulong glue(helper_rcl, SUFFIX)(target_ulong t0, target_ulong t1) return t0; } -target_ulong glue(helper_rcr, SUFFIX)(target_ulong t0, target_ulong t1) +target_ulong glue(helper_rcr, SUFFIX)(CPUX86State *env, target_ulong t0, + target_ulong t1) { int count, eflags; target_ulong src; diff --git a/target-i386/translate.c b/target-i386/translate.c index 15b5b63..37732e0 100644 --- a/target-i386/translate.c +++ b/target-i386/translate.c @@ -1773,20 +1773,36 @@ static void gen_rotc_rm_T1(DisasContext *s, int ot, int op1, if (is_right) { switch (ot) { - case 0: gen_helper_rcrb(cpu_T[0], cpu_T[0], cpu_T[1]); break; - case 1: gen_helper_rcrw(cpu_T[0], cpu_T[0], cpu_T[1]); break; - case 2: gen_helper_rcrl(cpu_T[0], cpu_T[0], cpu_T[1]); break; + case 0: + gen_helper_rcrb(cpu_T[0], cpu_env, cpu_T[0], cpu_T[1]); + break; + case 1: + gen_helper_rcrw(cpu_T[0], cpu_env, cpu_T[0], cpu_T[1]); + break; + case 2: + gen_helper_rcrl(cpu_T[0], cpu_env, cpu_T[0], cpu_T[1]); + break; #ifdef TARGET_X86_64 - case 3: gen_helper_rcrq(cpu_T[0], cpu_T[0], cpu_T[1]); break; + case 3: + gen_helper_rcrq(cpu_T[0], cpu_env, cpu_T[0], cpu_T[1]); + break; #endif } } else { switch (ot) { - case 0: gen_helper_rclb(cpu_T[0], cpu_T[0], cpu_T[1]); break; - case 1: gen_helper_rclw(cpu_T[0], cpu_T[0], cpu_T[1]); break; - case 2: gen_helper_rcll(cpu_T[0], cpu_T[0], cpu_T[1]); break; + case 0: + gen_helper_rclb(cpu_T[0], cpu_env, cpu_T[0], cpu_T[1]); + break; + case 1: + gen_helper_rclw(cpu_T[0], cpu_env, cpu_T[0], cpu_T[1]); + break; + case 2: + gen_helper_rcll(cpu_T[0], cpu_env, cpu_T[0], cpu_T[1]); + break; #ifdef TARGET_X86_64 - case 3: gen_helper_rclq(cpu_T[0], cpu_T[0], cpu_T[1]); break; + case 3: + gen_helper_rclq(cpu_T[0], cpu_env, cpu_T[0], cpu_T[1]); + break; #endif } } @@ -4541,7 +4557,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) break; #ifdef TARGET_X86_64 case OT_QUAD: - gen_helper_mulq_EAX_T0(cpu_T[0]); + gen_helper_mulq_EAX_T0(cpu_env, cpu_T[0]); s->cc_op = CC_OP_MULQ; break; #endif @@ -4611,7 +4627,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) break; #ifdef TARGET_X86_64 case OT_QUAD: - gen_helper_imulq_EAX_T0(cpu_T[0]); + gen_helper_imulq_EAX_T0(cpu_env, cpu_T[0]); s->cc_op = CC_OP_MULQ; break; #endif @@ -4621,21 +4637,21 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) switch(ot) { case OT_BYTE: gen_jmp_im(pc_start - s->cs_base); - gen_helper_divb_AL(cpu_T[0]); + gen_helper_divb_AL(cpu_env, cpu_T[0]); break; case OT_WORD: gen_jmp_im(pc_start - s->cs_base); - gen_helper_divw_AX(cpu_T[0]); + gen_helper_divw_AX(cpu_env, cpu_T[0]); break; default: case OT_LONG: gen_jmp_im(pc_start - s->cs_base); - gen_helper_divl_EAX(cpu_T[0]); + gen_helper_divl_EAX(cpu_env, cpu_T[0]); break; #ifdef TARGET_X86_64 case OT_QUAD: gen_jmp_im(pc_start - s->cs_base); - gen_helper_divq_EAX(cpu_T[0]); + gen_helper_divq_EAX(cpu_env, cpu_T[0]); break; #endif } @@ -4644,21 +4660,21 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) switch(ot) { case OT_BYTE: gen_jmp_im(pc_start - s->cs_base); - gen_helper_idivb_AL(cpu_T[0]); + gen_helper_idivb_AL(cpu_env, cpu_T[0]); break; case OT_WORD: gen_jmp_im(pc_start - s->cs_base); - gen_helper_idivw_AX(cpu_T[0]); + gen_helper_idivw_AX(cpu_env, cpu_T[0]); break; default: case OT_LONG: gen_jmp_im(pc_start - s->cs_base); - gen_helper_idivl_EAX(cpu_T[0]); + gen_helper_idivl_EAX(cpu_env, cpu_T[0]); break; #ifdef TARGET_X86_64 case OT_QUAD: gen_jmp_im(pc_start - s->cs_base); - gen_helper_idivq_EAX(cpu_T[0]); + gen_helper_idivq_EAX(cpu_env, cpu_T[0]); break; #endif } @@ -4871,7 +4887,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) #ifdef TARGET_X86_64 if (ot == OT_QUAD) { - gen_helper_imulq_T0_T1(cpu_T[0], cpu_T[0], cpu_T[1]); + gen_helper_imulq_T0_T1(cpu_T[0], cpu_env, cpu_T[0], cpu_T[1]); } else #endif if (ot == OT_LONG) { @@ -6727,7 +6743,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) goto illegal_op; if (s->cc_op != CC_OP_DYNAMIC) gen_op_set_cc_op(s->cc_op); - gen_helper_daa(); + gen_helper_daa(cpu_env); s->cc_op = CC_OP_EFLAGS; break; case 0x2f: /* das */ @@ -6735,7 +6751,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) goto illegal_op; if (s->cc_op != CC_OP_DYNAMIC) gen_op_set_cc_op(s->cc_op); - gen_helper_das(); + gen_helper_das(cpu_env); s->cc_op = CC_OP_EFLAGS; break; case 0x37: /* aaa */ @@ -6743,7 +6759,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) goto illegal_op; if (s->cc_op != CC_OP_DYNAMIC) gen_op_set_cc_op(s->cc_op); - gen_helper_aaa(); + gen_helper_aaa(cpu_env); s->cc_op = CC_OP_EFLAGS; break; case 0x3f: /* aas */ @@ -6751,7 +6767,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) goto illegal_op; if (s->cc_op != CC_OP_DYNAMIC) gen_op_set_cc_op(s->cc_op); - gen_helper_aas(); + gen_helper_aas(cpu_env); s->cc_op = CC_OP_EFLAGS; break; case 0xd4: /* aam */ @@ -6761,7 +6777,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) if (val == 0) { gen_exception(s, EXCP00_DIVZ, pc_start - s->cs_base); } else { - gen_helper_aam(tcg_const_i32(val)); + gen_helper_aam(cpu_env, tcg_const_i32(val)); s->cc_op = CC_OP_LOGICB; } break; @@ -6769,7 +6785,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) if (CODE64(s)) goto illegal_op; val = ldub_code(s->pc++); - gen_helper_aad(tcg_const_i32(val)); + gen_helper_aad(cpu_env, tcg_const_i32(val)); s->cc_op = CC_OP_LOGICB; break; /************************/ -- cgit v1.1 From 052e80d5e026a5414a02d5d979c37521eb33e07d Mon Sep 17 00:00:00 2001 From: Blue Swirl Date: Sun, 29 Apr 2012 15:51:49 +0000 Subject: x86: avoid AREG0 for SVM helpers Add an explicit CPUX86State parameter instead of relying on AREG0. Signed-off-by: Blue Swirl --- target-i386/Makefile.objs | 1 - target-i386/helper.h | 22 +++--- target-i386/svm_helper.c | 181 ++++++++++++++++++++++------------------------ target-i386/translate.c | 21 +++--- 4 files changed, 110 insertions(+), 115 deletions(-) diff --git a/target-i386/Makefile.objs b/target-i386/Makefile.objs index d39ec8e..a3450f6 100644 --- a/target-i386/Makefile.objs +++ b/target-i386/Makefile.objs @@ -7,7 +7,6 @@ obj-$(CONFIG_NO_KVM) += kvm-stub.o obj-$(CONFIG_LINUX_USER) += ioport-user.o obj-$(CONFIG_BSD_USER) += ioport-user.o -$(obj)/svm_helper.o: QEMU_CFLAGS += $(HELPER_CFLAGS) $(obj)/smm_helper.o: QEMU_CFLAGS += $(HELPER_CFLAGS) $(obj)/misc_helper.o: QEMU_CFLAGS += $(HELPER_CFLAGS) $(obj)/mem_helper.o: QEMU_CFLAGS += $(HELPER_CFLAGS) diff --git a/target-i386/helper.h b/target-i386/helper.h index 67c81bf..601b8dd 100644 --- a/target-i386/helper.h +++ b/target-i386/helper.h @@ -95,17 +95,17 @@ DEF_HELPER_1(inw, tl, i32) DEF_HELPER_2(outl, void, i32, i32) DEF_HELPER_1(inl, tl, i32) -DEF_HELPER_2(svm_check_intercept_param, void, i32, i64) -DEF_HELPER_2(vmexit, void, i32, i64) -DEF_HELPER_3(svm_check_io, void, i32, i32, i32) -DEF_HELPER_2(vmrun, void, int, int) -DEF_HELPER_0(vmmcall, void) -DEF_HELPER_1(vmload, void, int) -DEF_HELPER_1(vmsave, void, int) -DEF_HELPER_0(stgi, void) -DEF_HELPER_0(clgi, void) -DEF_HELPER_0(skinit, void) -DEF_HELPER_1(invlpga, void, int) +DEF_HELPER_3(svm_check_intercept_param, void, env, i32, i64) +DEF_HELPER_3(vmexit, void, env, i32, i64) +DEF_HELPER_4(svm_check_io, void, env, i32, i32, i32) +DEF_HELPER_3(vmrun, void, env, int, int) +DEF_HELPER_1(vmmcall, void, env) +DEF_HELPER_2(vmload, void, env, int) +DEF_HELPER_2(vmsave, void, env, int) +DEF_HELPER_1(stgi, void, env) +DEF_HELPER_1(clgi, void, env) +DEF_HELPER_1(skinit, void, env) +DEF_HELPER_2(invlpga, void, env, int) /* x86 FPU */ diff --git a/target-i386/svm_helper.c b/target-i386/svm_helper.c index 64d842c..f370ac5 100644 --- a/target-i386/svm_helper.c +++ b/target-i386/svm_helper.c @@ -18,46 +18,46 @@ */ #include "cpu.h" -#include "dyngen-exec.h" +#include "cpu-all.h" #include "helper.h" /* Secure Virtual Machine helpers */ #if defined(CONFIG_USER_ONLY) -void helper_vmrun(int aflag, int next_eip_addend) +void helper_vmrun(CPUX86State *env, int aflag, int next_eip_addend) { } -void helper_vmmcall(void) +void helper_vmmcall(CPUX86State *env) { } -void helper_vmload(int aflag) +void helper_vmload(CPUX86State *env, int aflag) { } -void helper_vmsave(int aflag) +void helper_vmsave(CPUX86State *env, int aflag) { } -void helper_stgi(void) +void helper_stgi(CPUX86State *env) { } -void helper_clgi(void) +void helper_clgi(CPUX86State *env) { } -void helper_skinit(void) +void helper_skinit(CPUX86State *env) { } -void helper_invlpga(int aflag) +void helper_invlpga(CPUX86State *env, int aflag) { } -void helper_vmexit(uint32_t exit_code, uint64_t exit_info_1) +void helper_vmexit(CPUX86State *env, uint32_t exit_code, uint64_t exit_info_1) { } @@ -65,7 +65,8 @@ void cpu_vmexit(CPUX86State *nenv, uint32_t exit_code, uint64_t exit_info_1) { } -void helper_svm_check_intercept_param(uint32_t type, uint64_t param) +void helper_svm_check_intercept_param(CPUX86State *env, uint32_t type, + uint64_t param) { } @@ -74,13 +75,13 @@ void cpu_svm_check_intercept_param(CPUX86State *env, uint32_t type, { } -void helper_svm_check_io(uint32_t port, uint32_t param, +void helper_svm_check_io(CPUX86State *env, uint32_t port, uint32_t param, uint32_t next_eip_addend) { } #else -static inline void svm_save_seg(target_phys_addr_t addr, +static inline void svm_save_seg(CPUX86State *env, target_phys_addr_t addr, const SegmentCache *sc) { stw_phys(addr + offsetof(struct vmcb_seg, selector), @@ -93,7 +94,8 @@ static inline void svm_save_seg(target_phys_addr_t addr, ((sc->flags >> 8) & 0xff) | ((sc->flags >> 12) & 0x0f00)); } -static inline void svm_load_seg(target_phys_addr_t addr, SegmentCache *sc) +static inline void svm_load_seg(CPUX86State *env, target_phys_addr_t addr, + SegmentCache *sc) { unsigned int flags; @@ -104,23 +106,23 @@ static inline void svm_load_seg(target_phys_addr_t addr, SegmentCache *sc) sc->flags = ((flags & 0xff) << 8) | ((flags & 0x0f00) << 12); } -static inline void svm_load_seg_cache(target_phys_addr_t addr, - CPUX86State *env, int seg_reg) +static inline void svm_load_seg_cache(CPUX86State *env, target_phys_addr_t addr, + int seg_reg) { SegmentCache sc1, *sc = &sc1; - svm_load_seg(addr, sc); + svm_load_seg(env, addr, sc); cpu_x86_load_seg_cache(env, seg_reg, sc->selector, sc->base, sc->limit, sc->flags); } -void helper_vmrun(int aflag, int next_eip_addend) +void helper_vmrun(CPUX86State *env, int aflag, int next_eip_addend) { target_ulong addr; uint32_t event_inj; uint32_t int_ctl; - helper_svm_check_intercept_param(SVM_EXIT_VMRUN, 0); + cpu_svm_check_intercept_param(env, SVM_EXIT_VMRUN, 0); if (aflag == 2) { addr = EAX; @@ -154,13 +156,13 @@ void helper_vmrun(int aflag, int next_eip_addend) stq_phys(env->vm_hsave + offsetof(struct vmcb, save.rflags), cpu_compute_eflags(env)); - svm_save_seg(env->vm_hsave + offsetof(struct vmcb, save.es), + svm_save_seg(env, env->vm_hsave + offsetof(struct vmcb, save.es), &env->segs[R_ES]); - svm_save_seg(env->vm_hsave + offsetof(struct vmcb, save.cs), + svm_save_seg(env, env->vm_hsave + offsetof(struct vmcb, save.cs), &env->segs[R_CS]); - svm_save_seg(env->vm_hsave + offsetof(struct vmcb, save.ss), + svm_save_seg(env, env->vm_hsave + offsetof(struct vmcb, save.ss), &env->segs[R_SS]); - svm_save_seg(env->vm_hsave + offsetof(struct vmcb, save.ds), + svm_save_seg(env, env->vm_hsave + offsetof(struct vmcb, save.ds), &env->segs[R_DS]); stq_phys(env->vm_hsave + offsetof(struct vmcb, save.rip), @@ -233,14 +235,14 @@ void helper_vmrun(int aflag, int next_eip_addend) ~(CC_O | CC_S | CC_Z | CC_A | CC_P | CC_C | DF_MASK)); CC_OP = CC_OP_EFLAGS; - svm_load_seg_cache(env->vm_vmcb + offsetof(struct vmcb, save.es), - env, R_ES); - svm_load_seg_cache(env->vm_vmcb + offsetof(struct vmcb, save.cs), - env, R_CS); - svm_load_seg_cache(env->vm_vmcb + offsetof(struct vmcb, save.ss), - env, R_SS); - svm_load_seg_cache(env->vm_vmcb + offsetof(struct vmcb, save.ds), - env, R_DS); + svm_load_seg_cache(env, env->vm_vmcb + offsetof(struct vmcb, save.es), + R_ES); + svm_load_seg_cache(env, env->vm_vmcb + offsetof(struct vmcb, save.cs), + R_CS); + svm_load_seg_cache(env, env->vm_vmcb + offsetof(struct vmcb, save.ss), + R_SS); + svm_load_seg_cache(env, env->vm_vmcb + offsetof(struct vmcb, save.ds), + R_DS); EIP = ldq_phys(env->vm_vmcb + offsetof(struct vmcb, save.rip)); env->eip = EIP; @@ -320,17 +322,17 @@ void helper_vmrun(int aflag, int next_eip_addend) } } -void helper_vmmcall(void) +void helper_vmmcall(CPUX86State *env) { - helper_svm_check_intercept_param(SVM_EXIT_VMMCALL, 0); + cpu_svm_check_intercept_param(env, SVM_EXIT_VMMCALL, 0); raise_exception(env, EXCP06_ILLOP); } -void helper_vmload(int aflag) +void helper_vmload(CPUX86State *env, int aflag) { target_ulong addr; - helper_svm_check_intercept_param(SVM_EXIT_VMLOAD, 0); + cpu_svm_check_intercept_param(env, SVM_EXIT_VMLOAD, 0); if (aflag == 2) { addr = EAX; @@ -340,17 +342,14 @@ void helper_vmload(int aflag) qemu_log_mask(CPU_LOG_TB_IN_ASM, "vmload! " TARGET_FMT_lx "\nFS: %016" PRIx64 " | " TARGET_FMT_lx "\n", - addr, ldq_phys(addr + offsetof(struct vmcb, save.fs.base)), + addr, ldq_phys(addr + offsetof(struct vmcb, + save.fs.base)), env->segs[R_FS].base); - svm_load_seg_cache(addr + offsetof(struct vmcb, save.fs), - env, R_FS); - svm_load_seg_cache(addr + offsetof(struct vmcb, save.gs), - env, R_GS); - svm_load_seg(addr + offsetof(struct vmcb, save.tr), - &env->tr); - svm_load_seg(addr + offsetof(struct vmcb, save.ldtr), - &env->ldt); + svm_load_seg_cache(env, addr + offsetof(struct vmcb, save.fs), R_FS); + svm_load_seg_cache(env, addr + offsetof(struct vmcb, save.gs), R_GS); + svm_load_seg(env, addr + offsetof(struct vmcb, save.tr), &env->tr); + svm_load_seg(env, addr + offsetof(struct vmcb, save.ldtr), &env->ldt); #ifdef TARGET_X86_64 env->kernelgsbase = ldq_phys(addr + offsetof(struct vmcb, @@ -367,11 +366,11 @@ void helper_vmload(int aflag) save.sysenter_eip)); } -void helper_vmsave(int aflag) +void helper_vmsave(CPUX86State *env, int aflag) { target_ulong addr; - helper_svm_check_intercept_param(SVM_EXIT_VMSAVE, 0); + cpu_svm_check_intercept_param(env, SVM_EXIT_VMSAVE, 0); if (aflag == 2) { addr = EAX; @@ -384,13 +383,13 @@ void helper_vmsave(int aflag) addr, ldq_phys(addr + offsetof(struct vmcb, save.fs.base)), env->segs[R_FS].base); - svm_save_seg(addr + offsetof(struct vmcb, save.fs), + svm_save_seg(env, addr + offsetof(struct vmcb, save.fs), &env->segs[R_FS]); - svm_save_seg(addr + offsetof(struct vmcb, save.gs), + svm_save_seg(env, addr + offsetof(struct vmcb, save.gs), &env->segs[R_GS]); - svm_save_seg(addr + offsetof(struct vmcb, save.tr), + svm_save_seg(env, addr + offsetof(struct vmcb, save.tr), &env->tr); - svm_save_seg(addr + offsetof(struct vmcb, save.ldtr), + svm_save_seg(env, addr + offsetof(struct vmcb, save.ldtr), &env->ldt); #ifdef TARGET_X86_64 @@ -408,30 +407,30 @@ void helper_vmsave(int aflag) env->sysenter_eip); } -void helper_stgi(void) +void helper_stgi(CPUX86State *env) { - helper_svm_check_intercept_param(SVM_EXIT_STGI, 0); + cpu_svm_check_intercept_param(env, SVM_EXIT_STGI, 0); env->hflags2 |= HF2_GIF_MASK; } -void helper_clgi(void) +void helper_clgi(CPUX86State *env) { - helper_svm_check_intercept_param(SVM_EXIT_CLGI, 0); + cpu_svm_check_intercept_param(env, SVM_EXIT_CLGI, 0); env->hflags2 &= ~HF2_GIF_MASK; } -void helper_skinit(void) +void helper_skinit(CPUX86State *env) { - helper_svm_check_intercept_param(SVM_EXIT_SKINIT, 0); + cpu_svm_check_intercept_param(env, SVM_EXIT_SKINIT, 0); /* XXX: not implemented */ raise_exception(env, EXCP06_ILLOP); } -void helper_invlpga(int aflag) +void helper_invlpga(CPUX86State *env, int aflag) { target_ulong addr; - helper_svm_check_intercept_param(SVM_EXIT_INVLPGA, 0); + cpu_svm_check_intercept_param(env, SVM_EXIT_INVLPGA, 0); if (aflag == 2) { addr = EAX; @@ -444,7 +443,8 @@ void helper_invlpga(int aflag) tlb_flush_page(env, addr); } -void helper_svm_check_intercept_param(uint32_t type, uint64_t param) +void helper_svm_check_intercept_param(CPUX86State *env, uint32_t type, + uint64_t param) { if (likely(!(env->hflags & HF_SVMI_MASK))) { return; @@ -452,27 +452,27 @@ void helper_svm_check_intercept_param(uint32_t type, uint64_t param) switch (type) { case SVM_EXIT_READ_CR0 ... SVM_EXIT_READ_CR0 + 8: if (env->intercept_cr_read & (1 << (type - SVM_EXIT_READ_CR0))) { - helper_vmexit(type, param); + helper_vmexit(env, type, param); } break; case SVM_EXIT_WRITE_CR0 ... SVM_EXIT_WRITE_CR0 + 8: if (env->intercept_cr_write & (1 << (type - SVM_EXIT_WRITE_CR0))) { - helper_vmexit(type, param); + helper_vmexit(env, type, param); } break; case SVM_EXIT_READ_DR0 ... SVM_EXIT_READ_DR0 + 7: if (env->intercept_dr_read & (1 << (type - SVM_EXIT_READ_DR0))) { - helper_vmexit(type, param); + helper_vmexit(env, type, param); } break; case SVM_EXIT_WRITE_DR0 ... SVM_EXIT_WRITE_DR0 + 7: if (env->intercept_dr_write & (1 << (type - SVM_EXIT_WRITE_DR0))) { - helper_vmexit(type, param); + helper_vmexit(env, type, param); } break; case SVM_EXIT_EXCP_BASE ... SVM_EXIT_EXCP_BASE + 31: if (env->intercept_exceptions & (1 << (type - SVM_EXIT_EXCP_BASE))) { - helper_vmexit(type, param); + helper_vmexit(env, type, param); } break; case SVM_EXIT_MSR: @@ -499,36 +499,31 @@ void helper_svm_check_intercept_param(uint32_t type, uint64_t param) t0 %= 8; break; default: - helper_vmexit(type, param); + helper_vmexit(env, type, param); t0 = 0; t1 = 0; break; } if (ldub_phys(addr + t1) & ((1 << param) << t0)) { - helper_vmexit(type, param); + helper_vmexit(env, type, param); } } break; default: if (env->intercept & (1ULL << (type - SVM_EXIT_INTR))) { - helper_vmexit(type, param); + helper_vmexit(env, type, param); } break; } } -void cpu_svm_check_intercept_param(CPUX86State *env1, uint32_t type, +void cpu_svm_check_intercept_param(CPUX86State *env, uint32_t type, uint64_t param) { - CPUX86State *saved_env; - - saved_env = env; - env = env1; - helper_svm_check_intercept_param(type, param); - env = saved_env; + helper_svm_check_intercept_param(env, type, param); } -void helper_svm_check_io(uint32_t port, uint32_t param, +void helper_svm_check_io(CPUX86State *env, uint32_t port, uint32_t param, uint32_t next_eip_addend) { if (env->intercept & (1ULL << (SVM_EXIT_IOIO - SVM_EXIT_INTR))) { @@ -541,13 +536,13 @@ void helper_svm_check_io(uint32_t port, uint32_t param, /* next EIP */ stq_phys(env->vm_vmcb + offsetof(struct vmcb, control.exit_info_2), env->eip + next_eip_addend); - helper_vmexit(SVM_EXIT_IOIO, param | (port << 16)); + helper_vmexit(env, SVM_EXIT_IOIO, param | (port << 16)); } } } /* Note: currently only 32 bits of exit_code are used */ -void helper_vmexit(uint32_t exit_code, uint64_t exit_info_1) +void helper_vmexit(CPUX86State *env, uint32_t exit_code, uint64_t exit_info_1) { uint32_t int_ctl; @@ -567,13 +562,13 @@ void helper_vmexit(uint32_t exit_code, uint64_t exit_info_1) } /* Save the VM state in the vmcb */ - svm_save_seg(env->vm_vmcb + offsetof(struct vmcb, save.es), + svm_save_seg(env, env->vm_vmcb + offsetof(struct vmcb, save.es), &env->segs[R_ES]); - svm_save_seg(env->vm_vmcb + offsetof(struct vmcb, save.cs), + svm_save_seg(env, env->vm_vmcb + offsetof(struct vmcb, save.cs), &env->segs[R_CS]); - svm_save_seg(env->vm_vmcb + offsetof(struct vmcb, save.ss), + svm_save_seg(env, env->vm_vmcb + offsetof(struct vmcb, save.ss), &env->segs[R_SS]); - svm_save_seg(env->vm_vmcb + offsetof(struct vmcb, save.ds), + svm_save_seg(env, env->vm_vmcb + offsetof(struct vmcb, save.ds), &env->segs[R_DS]); stq_phys(env->vm_vmcb + offsetof(struct vmcb, save.gdtr.base), @@ -602,7 +597,8 @@ void helper_vmexit(uint32_t exit_code, uint64_t exit_info_1) stq_phys(env->vm_vmcb + offsetof(struct vmcb, save.rflags), cpu_compute_eflags(env)); - stq_phys(env->vm_vmcb + offsetof(struct vmcb, save.rip), env->eip); + stq_phys(env->vm_vmcb + offsetof(struct vmcb, save.rip), + env->eip); stq_phys(env->vm_vmcb + offsetof(struct vmcb, save.rsp), ESP); stq_phys(env->vm_vmcb + offsetof(struct vmcb, save.rax), EAX); stq_phys(env->vm_vmcb + offsetof(struct vmcb, save.dr7), env->dr[7]); @@ -645,14 +641,14 @@ void helper_vmexit(uint32_t exit_code, uint64_t exit_info_1) ~(CC_O | CC_S | CC_Z | CC_A | CC_P | CC_C | DF_MASK)); CC_OP = CC_OP_EFLAGS; - svm_load_seg_cache(env->vm_hsave + offsetof(struct vmcb, save.es), - env, R_ES); - svm_load_seg_cache(env->vm_hsave + offsetof(struct vmcb, save.cs), - env, R_CS); - svm_load_seg_cache(env->vm_hsave + offsetof(struct vmcb, save.ss), - env, R_SS); - svm_load_seg_cache(env->vm_hsave + offsetof(struct vmcb, save.ds), - env, R_DS); + svm_load_seg_cache(env, env->vm_hsave + offsetof(struct vmcb, save.es), + R_ES); + svm_load_seg_cache(env, env->vm_hsave + offsetof(struct vmcb, save.cs), + R_CS); + svm_load_seg_cache(env, env->vm_hsave + offsetof(struct vmcb, save.ss), + R_SS); + svm_load_seg_cache(env, env->vm_hsave + offsetof(struct vmcb, save.ds), + R_DS); EIP = ldq_phys(env->vm_hsave + offsetof(struct vmcb, save.rip)); ESP = ldq_phys(env->vm_hsave + offsetof(struct vmcb, save.rsp)); @@ -707,10 +703,9 @@ void helper_vmexit(uint32_t exit_code, uint64_t exit_info_1) cpu_loop_exit(env); } -void cpu_vmexit(CPUX86State *nenv, uint32_t exit_code, uint64_t exit_info_1) +void cpu_vmexit(CPUX86State *env, uint32_t exit_code, uint64_t exit_info_1) { - env = nenv; - helper_vmexit(exit_code, exit_info_1); + helper_vmexit(env, exit_code, exit_info_1); } #endif diff --git a/target-i386/translate.c b/target-i386/translate.c index 37732e0..9f4c712 100644 --- a/target-i386/translate.c +++ b/target-i386/translate.c @@ -754,7 +754,8 @@ static void gen_check_io(DisasContext *s, int ot, target_ulong cur_eip, svm_flags |= (1 << (4 + ot)); next_eip = s->pc - s->cs_base; tcg_gen_trunc_tl_i32(cpu_tmp2_i32, cpu_T[0]); - gen_helper_svm_check_io(cpu_tmp2_i32, tcg_const_i32(svm_flags), + gen_helper_svm_check_io(cpu_env, cpu_tmp2_i32, + tcg_const_i32(svm_flags), tcg_const_i32(next_eip - cur_eip)); } } @@ -2465,7 +2466,7 @@ gen_svm_check_intercept_param(DisasContext *s, target_ulong pc_start, if (s->cc_op != CC_OP_DYNAMIC) gen_op_set_cc_op(s->cc_op); gen_jmp_im(pc_start - s->cs_base); - gen_helper_svm_check_intercept_param(tcg_const_i32(type), + gen_helper_svm_check_intercept_param(cpu_env, tcg_const_i32(type), tcg_const_i64(param)); } @@ -7225,7 +7226,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) gen_exception(s, EXCP0D_GPF, pc_start - s->cs_base); break; } else { - gen_helper_vmrun(tcg_const_i32(s->aflag), + gen_helper_vmrun(cpu_env, tcg_const_i32(s->aflag), tcg_const_i32(s->pc - pc_start)); tcg_gen_exit_tb(0); s->is_jmp = DISAS_TB_JUMP; @@ -7234,7 +7235,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) case 1: /* VMMCALL */ if (!(s->flags & HF_SVME_MASK)) goto illegal_op; - gen_helper_vmmcall(); + gen_helper_vmmcall(cpu_env); break; case 2: /* VMLOAD */ if (!(s->flags & HF_SVME_MASK) || !s->pe) @@ -7243,7 +7244,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) gen_exception(s, EXCP0D_GPF, pc_start - s->cs_base); break; } else { - gen_helper_vmload(tcg_const_i32(s->aflag)); + gen_helper_vmload(cpu_env, tcg_const_i32(s->aflag)); } break; case 3: /* VMSAVE */ @@ -7253,7 +7254,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) gen_exception(s, EXCP0D_GPF, pc_start - s->cs_base); break; } else { - gen_helper_vmsave(tcg_const_i32(s->aflag)); + gen_helper_vmsave(cpu_env, tcg_const_i32(s->aflag)); } break; case 4: /* STGI */ @@ -7265,7 +7266,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) gen_exception(s, EXCP0D_GPF, pc_start - s->cs_base); break; } else { - gen_helper_stgi(); + gen_helper_stgi(cpu_env); } break; case 5: /* CLGI */ @@ -7275,7 +7276,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) gen_exception(s, EXCP0D_GPF, pc_start - s->cs_base); break; } else { - gen_helper_clgi(); + gen_helper_clgi(cpu_env); } break; case 6: /* SKINIT */ @@ -7283,7 +7284,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) !(s->cpuid_ext3_features & CPUID_EXT3_SKINIT)) || !s->pe) goto illegal_op; - gen_helper_skinit(); + gen_helper_skinit(cpu_env); break; case 7: /* INVLPGA */ if (!(s->flags & HF_SVME_MASK) || !s->pe) @@ -7292,7 +7293,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) gen_exception(s, EXCP0D_GPF, pc_start - s->cs_base); break; } else { - gen_helper_invlpga(tcg_const_i32(s->aflag)); + gen_helper_invlpga(cpu_env, tcg_const_i32(s->aflag)); } break; default: -- cgit v1.1 From 608badfc660b1c4d20e67a64b639c7bcd2d5ba16 Mon Sep 17 00:00:00 2001 From: Blue Swirl Date: Sun, 29 Apr 2012 17:54:21 +0000 Subject: x86: avoid AREG0 for SMM helpers Add an explicit CPUX86State parameter instead of relying on AREG0. Signed-off-by: Blue Swirl --- target-i386/Makefile.objs | 1 - target-i386/helper.h | 2 +- target-i386/smm_helper.c | 14 ++++---------- target-i386/translate.c | 2 +- 4 files changed, 6 insertions(+), 13 deletions(-) diff --git a/target-i386/Makefile.objs b/target-i386/Makefile.objs index a3450f6..36b97bc 100644 --- a/target-i386/Makefile.objs +++ b/target-i386/Makefile.objs @@ -7,7 +7,6 @@ obj-$(CONFIG_NO_KVM) += kvm-stub.o obj-$(CONFIG_LINUX_USER) += ioport-user.o obj-$(CONFIG_BSD_USER) += ioport-user.o -$(obj)/smm_helper.o: QEMU_CFLAGS += $(HELPER_CFLAGS) $(obj)/misc_helper.o: QEMU_CFLAGS += $(HELPER_CFLAGS) $(obj)/mem_helper.o: QEMU_CFLAGS += $(HELPER_CFLAGS) $(obj)/seg_helper.o: QEMU_CFLAGS += $(HELPER_CFLAGS) diff --git a/target-i386/helper.h b/target-i386/helper.h index 601b8dd..ec7edca 100644 --- a/target-i386/helper.h +++ b/target-i386/helper.h @@ -71,7 +71,7 @@ DEF_HELPER_1(set_inhibit_irq, void, env) DEF_HELPER_1(reset_inhibit_irq, void, env) DEF_HELPER_2(boundw, void, tl, int) DEF_HELPER_2(boundl, void, tl, int) -DEF_HELPER_0(rsm, void) +DEF_HELPER_1(rsm, void, env) DEF_HELPER_1(into, void, int) DEF_HELPER_1(cmpxchg8b, void, tl) #ifdef TARGET_X86_64 diff --git a/target-i386/smm_helper.c b/target-i386/smm_helper.c index bc1bfa2..8b04eb2 100644 --- a/target-i386/smm_helper.c +++ b/target-i386/smm_helper.c @@ -18,18 +18,17 @@ */ #include "cpu.h" -#include "dyngen-exec.h" #include "helper.h" /* SMM support */ #if defined(CONFIG_USER_ONLY) -void do_smm_enter(CPUX86State *env1) +void do_smm_enter(CPUX86State *env) { } -void helper_rsm(void) +void helper_rsm(CPUX86State *env) { } @@ -41,15 +40,11 @@ void helper_rsm(void) #define SMM_REVISION_ID 0x00020000 #endif -void do_smm_enter(CPUX86State *env1) +void do_smm_enter(CPUX86State *env) { target_ulong sm_state; SegmentCache *dt; int i, offset; - CPUX86State *saved_env; - - saved_env = env; - env = env1; qemu_log_mask(CPU_LOG_INT, "SMM: enter\n"); log_cpu_state_mask(CPU_LOG_INT, env, X86_DUMP_CCOP); @@ -180,10 +175,9 @@ void do_smm_enter(CPUX86State *env1) cpu_x86_update_cr4(env, 0); env->dr[7] = 0x00000400; CC_OP = CC_OP_EFLAGS; - env = saved_env; } -void helper_rsm(void) +void helper_rsm(CPUX86State *env) { target_ulong sm_state; int i, offset; diff --git a/target-i386/translate.c b/target-i386/translate.c index 9f4c712..840d281 100644 --- a/target-i386/translate.c +++ b/target-i386/translate.c @@ -7721,7 +7721,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) goto illegal_op; gen_update_cc_op(s); gen_jmp_im(s->pc - s->cs_base); - gen_helper_rsm(); + gen_helper_rsm(cpu_env); gen_eob(s); break; case 0x1b8: /* SSE4.2 popcnt */ -- cgit v1.1 From 329e607d8efc77553b1bbf5059045301e50c32c8 Mon Sep 17 00:00:00 2001 From: Blue Swirl Date: Sun, 29 Apr 2012 19:11:01 +0000 Subject: x86: use wrappers for memory access helpers Switch to wrapped versions of memory access functions. Signed-off-by: Blue Swirl --- target-i386/cpu.h | 10 +++ target-i386/mem_helper.c | 10 +++ target-i386/seg_helper.c | 209 ++++++++++++++++++++++++----------------------- 3 files changed, 126 insertions(+), 103 deletions(-) diff --git a/target-i386/cpu.h b/target-i386/cpu.h index b6d5e83..f33be16 100644 --- a/target-i386/cpu.h +++ b/target-i386/cpu.h @@ -1149,4 +1149,14 @@ void cpu_stw_data(CPUX86State *env, target_ulong ptr, uint32_t data); void cpu_stl_data(CPUX86State *env, target_ulong ptr, uint32_t data); void cpu_stq_data(CPUX86State *env, target_ulong ptr, uint64_t data); +uint32_t cpu_ldub_kernel(CPUX86State *env, target_ulong ptr); +uint32_t cpu_lduw_kernel(CPUX86State *env, target_ulong ptr); +uint32_t cpu_ldl_kernel(CPUX86State *env, target_ulong ptr); +uint64_t cpu_ldq_kernel(CPUX86State *env, target_ulong ptr); + +void cpu_stb_kernel(CPUX86State *env, target_ulong ptr, uint32_t data); +void cpu_stw_kernel(CPUX86State *env, target_ulong ptr, uint32_t data); +void cpu_stl_kernel(CPUX86State *env, target_ulong ptr, uint32_t data); +void cpu_stq_kernel(CPUX86State *env, target_ulong ptr, uint64_t data); + #endif /* CPU_I386_H */ diff --git a/target-i386/mem_helper.c b/target-i386/mem_helper.c index 30c3bd0..3dd4406 100644 --- a/target-i386/mem_helper.c +++ b/target-i386/mem_helper.c @@ -190,6 +190,11 @@ WRAP_LD(uint32_t, ldub_data) WRAP_LD(uint32_t, lduw_data) WRAP_LD(uint32_t, ldl_data) WRAP_LD(uint64_t, ldq_data) + +WRAP_LD(uint32_t, ldub_kernel) +WRAP_LD(uint32_t, lduw_kernel) +WRAP_LD(uint32_t, ldl_kernel) +WRAP_LD(uint64_t, ldq_kernel) #undef WRAP_LD #define WRAP_ST(datatype, fn) \ @@ -207,4 +212,9 @@ WRAP_ST(uint32_t, stb_data) WRAP_ST(uint32_t, stw_data) WRAP_ST(uint32_t, stl_data) WRAP_ST(uint64_t, stq_data) + +WRAP_ST(uint32_t, stb_kernel) +WRAP_ST(uint32_t, stw_kernel) +WRAP_ST(uint32_t, stl_kernel) +WRAP_ST(uint64_t, stq_kernel) #undef WRAP_ST diff --git a/target-i386/seg_helper.c b/target-i386/seg_helper.c index 41d146c..f5dcf01 100644 --- a/target-i386/seg_helper.c +++ b/target-i386/seg_helper.c @@ -23,10 +23,6 @@ #include "qemu-log.h" #include "helper.h" -#if !defined(CONFIG_USER_ONLY) -#include "softmmu_exec.h" -#endif /* !defined(CONFIG_USER_ONLY) */ - //#define DEBUG_PCALL #ifdef DEBUG_PCALL @@ -56,8 +52,8 @@ static inline int load_segment(uint32_t *e1_ptr, uint32_t *e2_ptr, return -1; } ptr = dt->base + index; - *e1_ptr = ldl_kernel(ptr); - *e2_ptr = ldl_kernel(ptr + 4); + *e1_ptr = cpu_ldl_kernel(env, ptr); + *e2_ptr = cpu_ldl_kernel(env, ptr + 4); return 0; } @@ -125,11 +121,11 @@ static inline void get_ss_esp_from_tss(uint32_t *ss_ptr, raise_exception_err(env, EXCP0A_TSS, env->tr.selector & 0xfffc); } if (shift == 0) { - *esp_ptr = lduw_kernel(env->tr.base + index); - *ss_ptr = lduw_kernel(env->tr.base + index + 2); + *esp_ptr = cpu_lduw_kernel(env, env->tr.base + index); + *ss_ptr = cpu_lduw_kernel(env, env->tr.base + index + 2); } else { - *esp_ptr = ldl_kernel(env->tr.base + index); - *ss_ptr = lduw_kernel(env->tr.base + index + 4); + *esp_ptr = cpu_ldl_kernel(env, env->tr.base + index); + *ss_ptr = cpu_lduw_kernel(env, env->tr.base + index + 4); } } @@ -262,29 +258,30 @@ static void switch_tss(int tss_selector, /* read all the registers from the new TSS */ if (type & 8) { /* 32 bit */ - new_cr3 = ldl_kernel(tss_base + 0x1c); - new_eip = ldl_kernel(tss_base + 0x20); - new_eflags = ldl_kernel(tss_base + 0x24); + new_cr3 = cpu_ldl_kernel(env, tss_base + 0x1c); + new_eip = cpu_ldl_kernel(env, tss_base + 0x20); + new_eflags = cpu_ldl_kernel(env, tss_base + 0x24); for (i = 0; i < 8; i++) { - new_regs[i] = ldl_kernel(tss_base + (0x28 + i * 4)); + new_regs[i] = cpu_ldl_kernel(env, tss_base + (0x28 + i * 4)); } for (i = 0; i < 6; i++) { - new_segs[i] = lduw_kernel(tss_base + (0x48 + i * 4)); + new_segs[i] = cpu_lduw_kernel(env, tss_base + (0x48 + i * 4)); } - new_ldt = lduw_kernel(tss_base + 0x60); - new_trap = ldl_kernel(tss_base + 0x64); + new_ldt = cpu_lduw_kernel(env, tss_base + 0x60); + new_trap = cpu_ldl_kernel(env, tss_base + 0x64); } else { /* 16 bit */ new_cr3 = 0; - new_eip = lduw_kernel(tss_base + 0x0e); - new_eflags = lduw_kernel(tss_base + 0x10); + new_eip = cpu_lduw_kernel(env, tss_base + 0x0e); + new_eflags = cpu_lduw_kernel(env, tss_base + 0x10); for (i = 0; i < 8; i++) { - new_regs[i] = lduw_kernel(tss_base + (0x12 + i * 2)) | 0xffff0000; + new_regs[i] = cpu_lduw_kernel(env, tss_base + (0x12 + i * 2)) | + 0xffff0000; } for (i = 0; i < 4; i++) { - new_segs[i] = lduw_kernel(tss_base + (0x22 + i * 4)); + new_segs[i] = cpu_lduw_kernel(env, tss_base + (0x22 + i * 4)); } - new_ldt = lduw_kernel(tss_base + 0x2a); + new_ldt = cpu_lduw_kernel(env, tss_base + 0x2a); new_segs[R_FS] = 0; new_segs[R_GS] = 0; new_trap = 0; @@ -299,10 +296,10 @@ static void switch_tss(int tss_selector, /* XXX: it can still fail in some cases, so a bigger hack is necessary to valid the TLB after having done the accesses */ - v1 = ldub_kernel(env->tr.base); - v2 = ldub_kernel(env->tr.base + old_tss_limit_max); - stb_kernel(env->tr.base, v1); - stb_kernel(env->tr.base + old_tss_limit_max, v2); + v1 = cpu_ldub_kernel(env, env->tr.base); + v2 = cpu_ldub_kernel(env, env->tr.base + old_tss_limit_max); + cpu_stb_kernel(env, env->tr.base, v1); + cpu_stb_kernel(env, env->tr.base + old_tss_limit_max, v2); /* clear busy bit (it is restartable) */ if (source == SWITCH_TSS_JMP || source == SWITCH_TSS_IRET) { @@ -310,9 +307,9 @@ static void switch_tss(int tss_selector, uint32_t e2; ptr = env->gdt.base + (env->tr.selector & ~7); - e2 = ldl_kernel(ptr + 4); + e2 = cpu_ldl_kernel(env, ptr + 4); e2 &= ~DESC_TSS_BUSY_MASK; - stl_kernel(ptr + 4, e2); + cpu_stl_kernel(env, ptr + 4, e2); } old_eflags = cpu_compute_eflags(env); if (source == SWITCH_TSS_IRET) { @@ -322,33 +319,35 @@ static void switch_tss(int tss_selector, /* save the current state in the old TSS */ if (type & 8) { /* 32 bit */ - stl_kernel(env->tr.base + 0x20, next_eip); - stl_kernel(env->tr.base + 0x24, old_eflags); - stl_kernel(env->tr.base + (0x28 + 0 * 4), EAX); - stl_kernel(env->tr.base + (0x28 + 1 * 4), ECX); - stl_kernel(env->tr.base + (0x28 + 2 * 4), EDX); - stl_kernel(env->tr.base + (0x28 + 3 * 4), EBX); - stl_kernel(env->tr.base + (0x28 + 4 * 4), ESP); - stl_kernel(env->tr.base + (0x28 + 5 * 4), EBP); - stl_kernel(env->tr.base + (0x28 + 6 * 4), ESI); - stl_kernel(env->tr.base + (0x28 + 7 * 4), EDI); + cpu_stl_kernel(env, env->tr.base + 0x20, next_eip); + cpu_stl_kernel(env, env->tr.base + 0x24, old_eflags); + cpu_stl_kernel(env, env->tr.base + (0x28 + 0 * 4), EAX); + cpu_stl_kernel(env, env->tr.base + (0x28 + 1 * 4), ECX); + cpu_stl_kernel(env, env->tr.base + (0x28 + 2 * 4), EDX); + cpu_stl_kernel(env, env->tr.base + (0x28 + 3 * 4), EBX); + cpu_stl_kernel(env, env->tr.base + (0x28 + 4 * 4), ESP); + cpu_stl_kernel(env, env->tr.base + (0x28 + 5 * 4), EBP); + cpu_stl_kernel(env, env->tr.base + (0x28 + 6 * 4), ESI); + cpu_stl_kernel(env, env->tr.base + (0x28 + 7 * 4), EDI); for (i = 0; i < 6; i++) { - stw_kernel(env->tr.base + (0x48 + i * 4), env->segs[i].selector); + cpu_stw_kernel(env, env->tr.base + (0x48 + i * 4), + env->segs[i].selector); } } else { /* 16 bit */ - stw_kernel(env->tr.base + 0x0e, next_eip); - stw_kernel(env->tr.base + 0x10, old_eflags); - stw_kernel(env->tr.base + (0x12 + 0 * 2), EAX); - stw_kernel(env->tr.base + (0x12 + 1 * 2), ECX); - stw_kernel(env->tr.base + (0x12 + 2 * 2), EDX); - stw_kernel(env->tr.base + (0x12 + 3 * 2), EBX); - stw_kernel(env->tr.base + (0x12 + 4 * 2), ESP); - stw_kernel(env->tr.base + (0x12 + 5 * 2), EBP); - stw_kernel(env->tr.base + (0x12 + 6 * 2), ESI); - stw_kernel(env->tr.base + (0x12 + 7 * 2), EDI); + cpu_stw_kernel(env, env->tr.base + 0x0e, next_eip); + cpu_stw_kernel(env, env->tr.base + 0x10, old_eflags); + cpu_stw_kernel(env, env->tr.base + (0x12 + 0 * 2), EAX); + cpu_stw_kernel(env, env->tr.base + (0x12 + 1 * 2), ECX); + cpu_stw_kernel(env, env->tr.base + (0x12 + 2 * 2), EDX); + cpu_stw_kernel(env, env->tr.base + (0x12 + 3 * 2), EBX); + cpu_stw_kernel(env, env->tr.base + (0x12 + 4 * 2), ESP); + cpu_stw_kernel(env, env->tr.base + (0x12 + 5 * 2), EBP); + cpu_stw_kernel(env, env->tr.base + (0x12 + 6 * 2), ESI); + cpu_stw_kernel(env, env->tr.base + (0x12 + 7 * 2), EDI); for (i = 0; i < 4; i++) { - stw_kernel(env->tr.base + (0x22 + i * 4), env->segs[i].selector); + cpu_stw_kernel(env, env->tr.base + (0x22 + i * 4), + env->segs[i].selector); } } @@ -356,7 +355,7 @@ static void switch_tss(int tss_selector, context */ if (source == SWITCH_TSS_CALL) { - stw_kernel(tss_base, env->tr.selector); + cpu_stw_kernel(env, tss_base, env->tr.selector); new_eflags |= NT_MASK; } @@ -366,9 +365,9 @@ static void switch_tss(int tss_selector, uint32_t e2; ptr = env->gdt.base + (tss_selector & ~7); - e2 = ldl_kernel(ptr + 4); + e2 = cpu_ldl_kernel(env, ptr + 4); e2 |= DESC_TSS_BUSY_MASK; - stl_kernel(ptr + 4, e2); + cpu_stl_kernel(env, ptr + 4, e2); } /* set the new CPU state */ @@ -434,8 +433,8 @@ static void switch_tss(int tss_selector, raise_exception_err(env, EXCP0A_TSS, new_ldt & 0xfffc); } ptr = dt->base + index; - e1 = ldl_kernel(ptr); - e2 = ldl_kernel(ptr + 4); + e1 = cpu_ldl_kernel(env, ptr); + e2 = cpu_ldl_kernel(env, ptr + 4); if ((e2 & DESC_S_MASK) || ((e2 >> DESC_TYPE_SHIFT) & 0xf) != 2) { raise_exception_err(env, EXCP0A_TSS, new_ldt & 0xfffc); } @@ -521,28 +520,28 @@ static int exception_has_error_code(int intno) #define SEG_ADDL(ssp, sp, sp_mask) ((uint32_t)((ssp) + (sp & (sp_mask)))) /* XXX: add a is_user flag to have proper security support */ -#define PUSHW(ssp, sp, sp_mask, val) \ - { \ - sp -= 2; \ - stw_kernel((ssp) + (sp & (sp_mask)), (val)); \ +#define PUSHW(ssp, sp, sp_mask, val) \ + { \ + sp -= 2; \ + cpu_stw_kernel(env, (ssp) + (sp & (sp_mask)), (val)); \ } #define PUSHL(ssp, sp, sp_mask, val) \ { \ sp -= 4; \ - stl_kernel(SEG_ADDL(ssp, sp, sp_mask), (uint32_t)(val)); \ + cpu_stl_kernel(env, SEG_ADDL(ssp, sp, sp_mask), (uint32_t)(val)); \ } -#define POPW(ssp, sp, sp_mask, val) \ - { \ - val = lduw_kernel((ssp) + (sp & (sp_mask))); \ - sp += 2; \ +#define POPW(ssp, sp, sp_mask, val) \ + { \ + val = cpu_lduw_kernel(env, (ssp) + (sp & (sp_mask))); \ + sp += 2; \ } -#define POPL(ssp, sp, sp_mask, val) \ - { \ - val = (uint32_t)ldl_kernel(SEG_ADDL(ssp, sp, sp_mask)); \ - sp += 4; \ +#define POPL(ssp, sp, sp_mask, val) \ + { \ + val = (uint32_t)cpu_ldl_kernel(env, SEG_ADDL(ssp, sp, sp_mask)); \ + sp += 4; \ } /* protected mode interrupt */ @@ -571,8 +570,8 @@ static void do_interrupt_protected(int intno, int is_int, int error_code, raise_exception_err(env, EXCP0D_GPF, intno * 8 + 2); } ptr = dt->base + intno * 8; - e1 = ldl_kernel(ptr); - e2 = ldl_kernel(ptr + 4); + e1 = cpu_ldl_kernel(env, ptr); + e2 = cpu_ldl_kernel(env, ptr + 4); /* check gate type */ type = (e2 >> DESC_TYPE_SHIFT) & 0x1f; switch (type) { @@ -597,9 +596,9 @@ static void do_interrupt_protected(int intno, int is_int, int error_code, esp = (ESP - (2 << shift)) & mask; ssp = env->segs[R_SS].base + esp; if (shift) { - stl_kernel(ssp, error_code); + cpu_stl_kernel(env, ssp, error_code); } else { - stw_kernel(ssp, error_code); + cpu_stw_kernel(env, ssp, error_code); } SET_ESP(esp, mask); } @@ -765,12 +764,12 @@ static void do_interrupt_protected(int intno, int is_int, int error_code, #define PUSHQ(sp, val) \ { \ sp -= 8; \ - stq_kernel(sp, (val)); \ + cpu_stq_kernel(env, sp, (val)); \ } #define POPQ(sp, val) \ { \ - val = ldq_kernel(sp); \ + val = cpu_ldq_kernel(env, sp); \ sp += 8; \ } @@ -790,7 +789,7 @@ static inline target_ulong get_rsp_from_tss(int level) if ((index + 7) > env->tr.limit) { raise_exception_err(env, EXCP0A_TSS, env->tr.selector & 0xfffc); } - return ldq_kernel(env->tr.base + index); + return cpu_ldq_kernel(env, env->tr.base + index); } /* 64 bit interrupt */ @@ -819,9 +818,9 @@ static void do_interrupt64(int intno, int is_int, int error_code, raise_exception_err(env, EXCP0D_GPF, intno * 16 + 2); } ptr = dt->base + intno * 16; - e1 = ldl_kernel(ptr); - e2 = ldl_kernel(ptr + 4); - e3 = ldl_kernel(ptr + 8); + e1 = cpu_ldl_kernel(env, ptr); + e2 = cpu_ldl_kernel(env, ptr + 4); + e3 = cpu_ldl_kernel(env, ptr + 8); /* check gate type */ type = (e2 >> DESC_TYPE_SHIFT) & 0x1f; switch (type) { @@ -1063,8 +1062,8 @@ static void do_interrupt_real(int intno, int is_int, int error_code, raise_exception_err(env, EXCP0D_GPF, intno * 8 + 2); } ptr = dt->base + intno * 4; - offset = lduw_kernel(ptr); - selector = lduw_kernel(ptr + 2); + offset = cpu_lduw_kernel(env, ptr); + selector = cpu_lduw_kernel(env, ptr + 2); esp = ESP; ssp = env->segs[R_SS].base; if (is_int) { @@ -1103,7 +1102,7 @@ static void do_interrupt_user(int intno, int is_int, int error_code, shift = 3; } ptr = dt->base + (intno << shift); - e2 = ldl_kernel(ptr + 4); + e2 = cpu_ldl_kernel(env, ptr + 4); dpl = (e2 >> DESC_DPL_SHIFT) & 3; cpl = env->hflags & HF_CPL_MASK; @@ -1281,20 +1280,22 @@ void helper_enter_level(int level, int data32, target_ulong t1) while (--level) { esp -= 4; ebp -= 4; - stl(ssp + (esp & esp_mask), ldl(ssp + (ebp & esp_mask))); + cpu_stl_data(env, ssp + (esp & esp_mask), + cpu_ldl_data(env, ssp + (ebp & esp_mask))); } esp -= 4; - stl(ssp + (esp & esp_mask), t1); + cpu_stl_data(env, ssp + (esp & esp_mask), t1); } else { /* 16 bit */ esp -= 2; while (--level) { esp -= 2; ebp -= 2; - stw(ssp + (esp & esp_mask), lduw(ssp + (ebp & esp_mask))); + cpu_stw_data(env, ssp + (esp & esp_mask), + cpu_lduw_data(env, ssp + (ebp & esp_mask))); } esp -= 2; - stw(ssp + (esp & esp_mask), t1); + cpu_stw_data(env, ssp + (esp & esp_mask), t1); } } @@ -1312,20 +1313,20 @@ void helper_enter64_level(int level, int data64, target_ulong t1) while (--level) { esp -= 8; ebp -= 8; - stq(esp, ldq(ebp)); + cpu_stq_data(env, esp, cpu_ldq_data(env, ebp)); } esp -= 8; - stq(esp, t1); + cpu_stq_data(env, esp, t1); } else { /* 16 bit */ esp -= 2; while (--level) { esp -= 2; ebp -= 2; - stw(esp, lduw(ebp)); + cpu_stw_data(env, esp, cpu_lduw_data(env, ebp)); } esp -= 2; - stw(esp, t1); + cpu_stw_data(env, esp, t1); } } #endif @@ -1360,8 +1361,8 @@ void helper_lldt(int selector) raise_exception_err(env, EXCP0D_GPF, selector & 0xfffc); } ptr = dt->base + index; - e1 = ldl_kernel(ptr); - e2 = ldl_kernel(ptr + 4); + e1 = cpu_ldl_kernel(env, ptr); + e2 = cpu_ldl_kernel(env, ptr + 4); if ((e2 & DESC_S_MASK) || ((e2 >> DESC_TYPE_SHIFT) & 0xf) != 2) { raise_exception_err(env, EXCP0D_GPF, selector & 0xfffc); } @@ -1372,7 +1373,7 @@ void helper_lldt(int selector) if (env->hflags & HF_LMA_MASK) { uint32_t e3; - e3 = ldl_kernel(ptr + 8); + e3 = cpu_ldl_kernel(env, ptr + 8); load_seg_cache_raw_dt(&env->ldt, e1, e2); env->ldt.base |= (target_ulong)e3 << 32; } else @@ -1415,8 +1416,8 @@ void helper_ltr(int selector) raise_exception_err(env, EXCP0D_GPF, selector & 0xfffc); } ptr = dt->base + index; - e1 = ldl_kernel(ptr); - e2 = ldl_kernel(ptr + 4); + e1 = cpu_ldl_kernel(env, ptr); + e2 = cpu_ldl_kernel(env, ptr + 4); type = (e2 >> DESC_TYPE_SHIFT) & 0xf; if ((e2 & DESC_S_MASK) || (type != 1 && type != 9)) { @@ -1429,8 +1430,8 @@ void helper_ltr(int selector) if (env->hflags & HF_LMA_MASK) { uint32_t e3, e4; - e3 = ldl_kernel(ptr + 8); - e4 = ldl_kernel(ptr + 12); + e3 = cpu_ldl_kernel(env, ptr + 8); + e4 = cpu_ldl_kernel(env, ptr + 12); if ((e4 >> DESC_TYPE_SHIFT) & 0xf) { raise_exception_err(env, EXCP0D_GPF, selector & 0xfffc); } @@ -1442,7 +1443,7 @@ void helper_ltr(int selector) load_seg_cache_raw_dt(&env->tr, e1, e2); } e2 |= DESC_TSS_BUSY_MASK; - stl_kernel(ptr + 4, e2); + cpu_stl_kernel(env, ptr + 4, e2); } env->tr.selector = selector; } @@ -1480,8 +1481,8 @@ void helper_load_seg(int seg_reg, int selector) raise_exception_err(env, EXCP0D_GPF, selector & 0xfffc); } ptr = dt->base + index; - e1 = ldl_kernel(ptr); - e2 = ldl_kernel(ptr + 4); + e1 = cpu_ldl_kernel(env, ptr); + e2 = cpu_ldl_kernel(env, ptr + 4); if (!(e2 & DESC_S_MASK)) { raise_exception_err(env, EXCP0D_GPF, selector & 0xfffc); @@ -1521,7 +1522,7 @@ void helper_load_seg(int seg_reg, int selector) /* set the access bit if not already set */ if (!(e2 & DESC_A_MASK)) { e2 |= DESC_A_MASK; - stl_kernel(ptr + 4, e2); + cpu_stl_kernel(env, ptr + 4, e2); } cpu_x86_load_seg_cache(env, seg_reg, selector, @@ -1843,14 +1844,16 @@ void helper_lcall_protected(int new_cs, target_ulong new_eip, PUSHL(ssp, sp, sp_mask, env->segs[R_SS].selector); PUSHL(ssp, sp, sp_mask, ESP); for (i = param_count - 1; i >= 0; i--) { - val = ldl_kernel(old_ssp + ((ESP + i * 4) & old_sp_mask)); + val = cpu_ldl_kernel(env, old_ssp + ((ESP + i * 4) & + old_sp_mask)); PUSHL(ssp, sp, sp_mask, val); } } else { PUSHW(ssp, sp, sp_mask, env->segs[R_SS].selector); PUSHW(ssp, sp, sp_mask, ESP); for (i = param_count - 1; i >= 0; i--) { - val = lduw_kernel(old_ssp + ((ESP + i * 2) & old_sp_mask)); + val = cpu_lduw_kernel(env, old_ssp + ((ESP + i * 2) & + old_sp_mask)); PUSHW(ssp, sp, sp_mask, val); } } @@ -2189,7 +2192,7 @@ void helper_iret_protected(int shift, int next_eip) raise_exception_err(env, EXCP0D_GPF, 0); } #endif - tss_selector = lduw_kernel(env->tr.base + 0); + tss_selector = cpu_lduw_kernel(env, env->tr.base + 0); if (tss_selector & 4) { raise_exception_err(env, EXCP0A_TSS, tss_selector & 0xfffc); } -- cgit v1.1 From 4a7443be520f5737009ea47f93e4aa0328eecbca Mon Sep 17 00:00:00 2001 From: Blue Swirl Date: Sun, 29 Apr 2012 18:42:47 +0000 Subject: x86: avoid AREG0 for misc helpers Add an explicit CPUX86State parameter instead of relying on AREG0. Signed-off-by: Blue Swirl --- target-i386/Makefile.objs | 1 - target-i386/helper.h | 40 ++++++++++++------------ target-i386/misc_helper.c | 77 ++++++++++++++++++++++------------------------- target-i386/translate.c | 49 +++++++++++++++++------------- 4 files changed, 84 insertions(+), 83 deletions(-) diff --git a/target-i386/Makefile.objs b/target-i386/Makefile.objs index 36b97bc..13a7f6a 100644 --- a/target-i386/Makefile.objs +++ b/target-i386/Makefile.objs @@ -7,6 +7,5 @@ obj-$(CONFIG_NO_KVM) += kvm-stub.o obj-$(CONFIG_LINUX_USER) += ioport-user.o obj-$(CONFIG_BSD_USER) += ioport-user.o -$(obj)/misc_helper.o: QEMU_CFLAGS += $(HELPER_CFLAGS) $(obj)/mem_helper.o: QEMU_CFLAGS += $(HELPER_CFLAGS) $(obj)/seg_helper.o: QEMU_CFLAGS += $(HELPER_CFLAGS) diff --git a/target-i386/helper.h b/target-i386/helper.h index ec7edca..9a9c064 100644 --- a/target-i386/helper.h +++ b/target-i386/helper.h @@ -41,12 +41,12 @@ DEF_HELPER_4(lcall_protected, void, int, tl, int, int) DEF_HELPER_1(iret_real, void, int) DEF_HELPER_2(iret_protected, void, int, int) DEF_HELPER_2(lret_protected, void, int, int) -DEF_HELPER_1(read_crN, tl, int) -DEF_HELPER_2(write_crN, void, int, tl) -DEF_HELPER_1(lmsw, void, tl) +DEF_HELPER_2(read_crN, tl, env, int) +DEF_HELPER_3(write_crN, void, env, int, tl) +DEF_HELPER_2(lmsw, void, env, tl) DEF_HELPER_1(clts, void, env) -DEF_HELPER_2(movl_drN_T0, void, int, tl) -DEF_HELPER_1(invlpg, void, tl) +DEF_HELPER_3(movl_drN_T0, void, env, int, tl) +DEF_HELPER_2(invlpg, void, env, tl) DEF_HELPER_3(enter_level, void, int, int, tl) #ifdef TARGET_X86_64 @@ -58,10 +58,10 @@ DEF_HELPER_1(sysexit, void, int) DEF_HELPER_1(syscall, void, int) DEF_HELPER_1(sysret, void, int) #endif -DEF_HELPER_1(hlt, void, int) -DEF_HELPER_1(monitor, void, tl) -DEF_HELPER_1(mwait, void, int) -DEF_HELPER_0(debug, void) +DEF_HELPER_2(hlt, void, env, int) +DEF_HELPER_2(monitor, void, env, tl) +DEF_HELPER_2(mwait, void, env, int) +DEF_HELPER_1(debug, void, env) DEF_HELPER_1(reset_rf, void, env) DEF_HELPER_3(raise_interrupt, void, env, int, int) DEF_HELPER_2(raise_exception, void, env, int) @@ -72,22 +72,22 @@ DEF_HELPER_1(reset_inhibit_irq, void, env) DEF_HELPER_2(boundw, void, tl, int) DEF_HELPER_2(boundl, void, tl, int) DEF_HELPER_1(rsm, void, env) -DEF_HELPER_1(into, void, int) +DEF_HELPER_2(into, void, env, int) DEF_HELPER_1(cmpxchg8b, void, tl) #ifdef TARGET_X86_64 DEF_HELPER_1(cmpxchg16b, void, tl) #endif -DEF_HELPER_0(single_step, void) -DEF_HELPER_0(cpuid, void) -DEF_HELPER_0(rdtsc, void) -DEF_HELPER_0(rdtscp, void) -DEF_HELPER_0(rdpmc, void) -DEF_HELPER_0(rdmsr, void) -DEF_HELPER_0(wrmsr, void) +DEF_HELPER_1(single_step, void, env) +DEF_HELPER_1(cpuid, void, env) +DEF_HELPER_1(rdtsc, void, env) +DEF_HELPER_1(rdtscp, void, env) +DEF_HELPER_1(rdpmc, void, env) +DEF_HELPER_1(rdmsr, void, env) +DEF_HELPER_1(wrmsr, void, env) -DEF_HELPER_1(check_iob, void, i32) -DEF_HELPER_1(check_iow, void, i32) -DEF_HELPER_1(check_iol, void, i32) +DEF_HELPER_2(check_iob, void, env, i32) +DEF_HELPER_2(check_iow, void, env, i32) +DEF_HELPER_2(check_iol, void, env, i32) DEF_HELPER_2(outb, void, i32, i32) DEF_HELPER_1(inb, tl, i32) DEF_HELPER_2(outw, void, i32, i32) diff --git a/target-i386/misc_helper.c b/target-i386/misc_helper.c index 272a636..154601b 100644 --- a/target-i386/misc_helper.c +++ b/target-i386/misc_helper.c @@ -18,16 +18,11 @@ */ #include "cpu.h" -#include "dyngen-exec.h" #include "ioport.h" #include "helper.h" -#if !defined(CONFIG_USER_ONLY) -#include "softmmu_exec.h" -#endif /* !defined(CONFIG_USER_ONLY) */ - /* check if Port I/O is allowed in TSS */ -static inline void check_io(int addr, int size) +static inline void check_io(CPUX86State *env, int addr, int size) { int io_offset, val, mask; @@ -37,13 +32,13 @@ static inline void check_io(int addr, int size) env->tr.limit < 103) { goto fail; } - io_offset = lduw_kernel(env->tr.base + 0x66); + io_offset = cpu_lduw_kernel(env, env->tr.base + 0x66); io_offset += (addr >> 3); /* Note: the check needs two bytes */ if ((io_offset + 1) > env->tr.limit) { goto fail; } - val = lduw_kernel(env->tr.base + io_offset); + val = cpu_lduw_kernel(env, env->tr.base + io_offset); val >>= (addr & 7); mask = (1 << size) - 1; /* all bits must be zero to allow the I/O */ @@ -53,19 +48,19 @@ static inline void check_io(int addr, int size) } } -void helper_check_iob(uint32_t t0) +void helper_check_iob(CPUX86State *env, uint32_t t0) { - check_io(t0, 1); + check_io(env, t0, 1); } -void helper_check_iow(uint32_t t0) +void helper_check_iow(CPUX86State *env, uint32_t t0) { - check_io(t0, 2); + check_io(env, t0, 2); } -void helper_check_iol(uint32_t t0) +void helper_check_iol(CPUX86State *env, uint32_t t0) { - check_io(t0, 4); + check_io(env, t0, 4); } void helper_outb(uint32_t port, uint32_t data) @@ -98,7 +93,7 @@ target_ulong helper_inl(uint32_t port) return cpu_inl(port); } -void helper_into(int next_eip_addend) +void helper_into(CPUX86State *env, int next_eip_addend) { int eflags; @@ -108,7 +103,7 @@ void helper_into(int next_eip_addend) } } -void helper_single_step(void) +void helper_single_step(CPUX86State *env) { #ifndef CONFIG_USER_ONLY check_hw_breakpoints(env, 1); @@ -117,7 +112,7 @@ void helper_single_step(void) raise_exception(env, EXCP01_DB); } -void helper_cpuid(void) +void helper_cpuid(CPUX86State *env) { uint32_t eax, ebx, ecx, edx; @@ -131,20 +126,20 @@ void helper_cpuid(void) } #if defined(CONFIG_USER_ONLY) -target_ulong helper_read_crN(int reg) +target_ulong helper_read_crN(CPUX86State *env, int reg) { return 0; } -void helper_write_crN(int reg, target_ulong t0) +void helper_write_crN(CPUX86State *env, int reg, target_ulong t0) { } -void helper_movl_drN_T0(int reg, target_ulong t0) +void helper_movl_drN_T0(CPUX86State *env, int reg, target_ulong t0) { } #else -target_ulong helper_read_crN(int reg) +target_ulong helper_read_crN(CPUX86State *env, int reg) { target_ulong val; @@ -164,7 +159,7 @@ target_ulong helper_read_crN(int reg) return val; } -void helper_write_crN(int reg, target_ulong t0) +void helper_write_crN(CPUX86State *env, int reg, target_ulong t0) { cpu_svm_check_intercept_param(env, SVM_EXIT_WRITE_CR0 + reg, 0); switch (reg) { @@ -189,7 +184,7 @@ void helper_write_crN(int reg, target_ulong t0) } } -void helper_movl_drN_T0(int reg, target_ulong t0) +void helper_movl_drN_T0(CPUX86State *env, int reg, target_ulong t0) { int i; @@ -211,21 +206,21 @@ void helper_movl_drN_T0(int reg, target_ulong t0) } #endif -void helper_lmsw(target_ulong t0) +void helper_lmsw(CPUX86State *env, target_ulong t0) { /* only 4 lower bits of CR0 are modified. PE cannot be set to zero if already set to one. */ t0 = (env->cr[0] & ~0xe) | (t0 & 0xf); - helper_write_crN(0, t0); + helper_write_crN(env, 0, t0); } -void helper_invlpg(target_ulong addr) +void helper_invlpg(CPUX86State *env, target_ulong addr) { cpu_svm_check_intercept_param(env, SVM_EXIT_INVLPG, 0); tlb_flush_page(env, addr); } -void helper_rdtsc(void) +void helper_rdtsc(CPUX86State *env) { uint64_t val; @@ -239,13 +234,13 @@ void helper_rdtsc(void) EDX = (uint32_t)(val >> 32); } -void helper_rdtscp(void) +void helper_rdtscp(CPUX86State *env) { - helper_rdtsc(); + helper_rdtsc(env); ECX = (uint32_t)(env->tsc_aux); } -void helper_rdpmc(void) +void helper_rdpmc(CPUX86State *env) { if ((env->cr[4] & CR4_PCE_MASK) && ((env->hflags & HF_CPL_MASK) != 0)) { raise_exception(env, EXCP0D_GPF); @@ -258,15 +253,15 @@ void helper_rdpmc(void) } #if defined(CONFIG_USER_ONLY) -void helper_wrmsr(void) +void helper_wrmsr(CPUX86State *env) { } -void helper_rdmsr(void) +void helper_rdmsr(CPUX86State *env) { } #else -void helper_wrmsr(void) +void helper_wrmsr(CPUX86State *env) { uint64_t val; @@ -413,7 +408,7 @@ void helper_wrmsr(void) } } -void helper_rdmsr(void) +void helper_rdmsr(CPUX86State *env) { uint64_t val; @@ -554,7 +549,7 @@ void helper_rdmsr(void) } #endif -static void do_hlt(void) +static void do_hlt(CPUX86State *env) { env->hflags &= ~HF_INHIBIT_IRQ_MASK; /* needed if sti is just before */ env->halted = 1; @@ -562,15 +557,15 @@ static void do_hlt(void) cpu_loop_exit(env); } -void helper_hlt(int next_eip_addend) +void helper_hlt(CPUX86State *env, int next_eip_addend) { cpu_svm_check_intercept_param(env, SVM_EXIT_HLT, 0); EIP += next_eip_addend; - do_hlt(); + do_hlt(env); } -void helper_monitor(target_ulong ptr) +void helper_monitor(CPUX86State *env, target_ulong ptr) { if ((uint32_t)ECX != 0) { raise_exception(env, EXCP0D_GPF); @@ -579,7 +574,7 @@ void helper_monitor(target_ulong ptr) cpu_svm_check_intercept_param(env, SVM_EXIT_MONITOR, 0); } -void helper_mwait(int next_eip_addend) +void helper_mwait(CPUX86State *env, int next_eip_addend) { if ((uint32_t)ECX != 0) { raise_exception(env, EXCP0D_GPF); @@ -592,11 +587,11 @@ void helper_mwait(int next_eip_addend) /* more than one CPU: do not sleep because another CPU may wake this one */ } else { - do_hlt(); + do_hlt(env); } } -void helper_debug(void) +void helper_debug(CPUX86State *env) { env->exception_index = EXCP_DEBUG; cpu_loop_exit(env); diff --git a/target-i386/translate.c b/target-i386/translate.c index 840d281..a4c2ae0 100644 --- a/target-i386/translate.c +++ b/target-i386/translate.c @@ -740,9 +740,15 @@ static void gen_check_io(DisasContext *s, int ot, target_ulong cur_eip, state_saved = 1; tcg_gen_trunc_tl_i32(cpu_tmp2_i32, cpu_T[0]); switch (ot) { - case 0: gen_helper_check_iob(cpu_tmp2_i32); break; - case 1: gen_helper_check_iow(cpu_tmp2_i32); break; - case 2: gen_helper_check_iol(cpu_tmp2_i32); break; + case 0: + gen_helper_check_iob(cpu_env, cpu_tmp2_i32); + break; + case 1: + gen_helper_check_iow(cpu_env, cpu_tmp2_i32); + break; + case 2: + gen_helper_check_iol(cpu_env, cpu_tmp2_i32); + break; } } if(s->flags & HF_SVMI_MASK) { @@ -2736,7 +2742,7 @@ static void gen_debug(DisasContext *s, target_ulong cur_eip) if (s->cc_op != CC_OP_DYNAMIC) gen_op_set_cc_op(s->cc_op); gen_jmp_im(cur_eip); - gen_helper_debug(); + gen_helper_debug(cpu_env); s->is_jmp = DISAS_TB_JUMP; } @@ -2753,9 +2759,9 @@ static void gen_eob(DisasContext *s) gen_helper_reset_rf(cpu_env); } if (s->singlestep_enabled) { - gen_helper_debug(); + gen_helper_debug(cpu_env); } else if (s->tf) { - gen_helper_single_step(); + gen_helper_single_step(cpu_env); } else { tcg_gen_exit_tb(0); } @@ -6832,7 +6838,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) if (s->cc_op != CC_OP_DYNAMIC) gen_op_set_cc_op(s->cc_op); gen_jmp_im(pc_start - s->cs_base); - gen_helper_into(tcg_const_i32(s->pc - pc_start)); + gen_helper_into(cpu_env, tcg_const_i32(s->pc - pc_start)); break; #ifdef WANT_ICEBP case 0xf1: /* icebp (undocumented, exits to external debugger) */ @@ -6989,9 +6995,9 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) gen_op_set_cc_op(s->cc_op); gen_jmp_im(pc_start - s->cs_base); if (b & 2) { - gen_helper_rdmsr(); + gen_helper_rdmsr(cpu_env); } else { - gen_helper_wrmsr(); + gen_helper_wrmsr(cpu_env); } } break; @@ -7001,7 +7007,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) gen_jmp_im(pc_start - s->cs_base); if (use_icount) gen_io_start(); - gen_helper_rdtsc(); + gen_helper_rdtsc(cpu_env); if (use_icount) { gen_io_end(); gen_jmp(s, s->pc - s->cs_base); @@ -7011,7 +7017,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) if (s->cc_op != CC_OP_DYNAMIC) gen_op_set_cc_op(s->cc_op); gen_jmp_im(pc_start - s->cs_base); - gen_helper_rdpmc(); + gen_helper_rdpmc(cpu_env); break; case 0x134: /* sysenter */ /* For Intel SYSENTER is valid on 64-bit */ @@ -7065,7 +7071,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) if (s->cc_op != CC_OP_DYNAMIC) gen_op_set_cc_op(s->cc_op); gen_jmp_im(pc_start - s->cs_base); - gen_helper_cpuid(); + gen_helper_cpuid(cpu_env); break; case 0xf4: /* hlt */ if (s->cpl != 0) { @@ -7074,7 +7080,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) if (s->cc_op != CC_OP_DYNAMIC) gen_op_set_cc_op(s->cc_op); gen_jmp_im(pc_start - s->cs_base); - gen_helper_hlt(tcg_const_i32(s->pc - pc_start)); + gen_helper_hlt(cpu_env, tcg_const_i32(s->pc - pc_start)); s->is_jmp = DISAS_TB_JUMP; } break; @@ -7186,7 +7192,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) gen_op_andl_A0_ffff(); } gen_add_A0_ds_seg(s); - gen_helper_monitor(cpu_A0); + gen_helper_monitor(cpu_env, cpu_A0); break; case 1: /* mwait */ if (!(s->cpuid_ext_features & CPUID_EXT_MONITOR) || @@ -7194,7 +7200,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) goto illegal_op; gen_update_cc_op(s); gen_jmp_im(pc_start - s->cs_base); - gen_helper_mwait(tcg_const_i32(s->pc - pc_start)); + gen_helper_mwait(cpu_env, tcg_const_i32(s->pc - pc_start)); gen_eob(s); break; default: @@ -7334,7 +7340,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) } else { gen_svm_check_intercept(s, pc_start, SVM_EXIT_WRITE_CR0); gen_ldst_modrm(s, modrm, OT_WORD, OR_TMP0, 0); - gen_helper_lmsw(cpu_T[0]); + gen_helper_lmsw(cpu_env, cpu_T[0]); gen_jmp_im(s->pc - s->cs_base); gen_eob(s); } @@ -7348,7 +7354,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) gen_op_set_cc_op(s->cc_op); gen_jmp_im(pc_start - s->cs_base); gen_lea_modrm(s, modrm, ®_addr, &offset_addr); - gen_helper_invlpg(cpu_A0); + gen_helper_invlpg(cpu_env, cpu_A0); gen_jmp_im(s->pc - s->cs_base); gen_eob(s); } @@ -7383,7 +7389,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) gen_jmp_im(pc_start - s->cs_base); if (use_icount) gen_io_start(); - gen_helper_rdtscp(); + gen_helper_rdtscp(cpu_env); if (use_icount) { gen_io_end(); gen_jmp(s, s->pc - s->cs_base); @@ -7565,11 +7571,12 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) gen_jmp_im(pc_start - s->cs_base); if (b & 2) { gen_op_mov_TN_reg(ot, 0, rm); - gen_helper_write_crN(tcg_const_i32(reg), cpu_T[0]); + gen_helper_write_crN(cpu_env, tcg_const_i32(reg), + cpu_T[0]); gen_jmp_im(s->pc - s->cs_base); gen_eob(s); } else { - gen_helper_read_crN(cpu_T[0], tcg_const_i32(reg)); + gen_helper_read_crN(cpu_T[0], cpu_env, tcg_const_i32(reg)); gen_op_mov_reg_T0(ot, rm); } break; @@ -7598,7 +7605,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) if (b & 2) { gen_svm_check_intercept(s, pc_start, SVM_EXIT_WRITE_DR0 + reg); gen_op_mov_TN_reg(ot, 0, rm); - gen_helper_movl_drN_T0(tcg_const_i32(reg), cpu_T[0]); + gen_helper_movl_drN_T0(cpu_env, tcg_const_i32(reg), cpu_T[0]); gen_jmp_im(s->pc - s->cs_base); gen_eob(s); } else { -- cgit v1.1 From 2999a0b20074a7e4a58f56572bb1436749368f59 Mon Sep 17 00:00:00 2001 From: Blue Swirl Date: Sun, 29 Apr 2012 19:47:06 +0000 Subject: x86: avoid AREG0 in segmentation helpers Add an explicit CPUX86State parameter instead of relying on AREG0. Rename remains of op_helper.c to seg_helper.c. Signed-off-by: Blue Swirl --- target-i386/Makefile.objs | 1 - target-i386/helper.h | 38 ++++---- target-i386/seg_helper.c | 217 ++++++++++++++++++++++------------------------ target-i386/translate.c | 54 ++++++------ 4 files changed, 150 insertions(+), 160 deletions(-) diff --git a/target-i386/Makefile.objs b/target-i386/Makefile.objs index 13a7f6a..71d7d3b 100644 --- a/target-i386/Makefile.objs +++ b/target-i386/Makefile.objs @@ -8,4 +8,3 @@ obj-$(CONFIG_LINUX_USER) += ioport-user.o obj-$(CONFIG_BSD_USER) += ioport-user.o $(obj)/mem_helper.o: QEMU_CFLAGS += $(HELPER_CFLAGS) -$(obj)/seg_helper.o: QEMU_CFLAGS += $(HELPER_CFLAGS) diff --git a/target-i386/helper.h b/target-i386/helper.h index 9a9c064..0f02103 100644 --- a/target-i386/helper.h +++ b/target-i386/helper.h @@ -28,19 +28,19 @@ DEF_HELPER_1(aas, void, env) DEF_HELPER_1(daa, void, env) DEF_HELPER_1(das, void, env) -DEF_HELPER_1(lsl, tl, tl) -DEF_HELPER_1(lar, tl, tl) -DEF_HELPER_1(verr, void, tl) -DEF_HELPER_1(verw, void, tl) -DEF_HELPER_1(lldt, void, int) -DEF_HELPER_1(ltr, void, int) -DEF_HELPER_2(load_seg, void, int, int) -DEF_HELPER_3(ljmp_protected, void, int, tl, int) -DEF_HELPER_4(lcall_real, void, int, tl, int, int) -DEF_HELPER_4(lcall_protected, void, int, tl, int, int) -DEF_HELPER_1(iret_real, void, int) -DEF_HELPER_2(iret_protected, void, int, int) -DEF_HELPER_2(lret_protected, void, int, int) +DEF_HELPER_2(lsl, tl, env, tl) +DEF_HELPER_2(lar, tl, env, tl) +DEF_HELPER_2(verr, void, env, tl) +DEF_HELPER_2(verw, void, env, tl) +DEF_HELPER_2(lldt, void, env, int) +DEF_HELPER_2(ltr, void, env, int) +DEF_HELPER_3(load_seg, void, env, int, int) +DEF_HELPER_4(ljmp_protected, void, env, int, tl, int) +DEF_HELPER_5(lcall_real, void, env, int, tl, int, int) +DEF_HELPER_5(lcall_protected, void, env, int, tl, int, int) +DEF_HELPER_2(iret_real, void, env, int) +DEF_HELPER_3(iret_protected, void, env, int, int) +DEF_HELPER_3(lret_protected, void, env, int, int) DEF_HELPER_2(read_crN, tl, env, int) DEF_HELPER_3(write_crN, void, env, int, tl) DEF_HELPER_2(lmsw, void, env, tl) @@ -48,15 +48,15 @@ DEF_HELPER_1(clts, void, env) DEF_HELPER_3(movl_drN_T0, void, env, int, tl) DEF_HELPER_2(invlpg, void, env, tl) -DEF_HELPER_3(enter_level, void, int, int, tl) +DEF_HELPER_4(enter_level, void, env, int, int, tl) #ifdef TARGET_X86_64 -DEF_HELPER_3(enter64_level, void, int, int, tl) +DEF_HELPER_4(enter64_level, void, env, int, int, tl) #endif -DEF_HELPER_0(sysenter, void) -DEF_HELPER_1(sysexit, void, int) +DEF_HELPER_1(sysenter, void, env) +DEF_HELPER_2(sysexit, void, env, int) #ifdef TARGET_X86_64 -DEF_HELPER_1(syscall, void, int) -DEF_HELPER_1(sysret, void, int) +DEF_HELPER_2(syscall, void, env, int) +DEF_HELPER_2(sysret, void, env, int) #endif DEF_HELPER_2(hlt, void, env, int) DEF_HELPER_2(monitor, void, env, tl) diff --git a/target-i386/seg_helper.c b/target-i386/seg_helper.c index f5dcf01..f136128 100644 --- a/target-i386/seg_helper.c +++ b/target-i386/seg_helper.c @@ -19,7 +19,6 @@ */ #include "cpu.h" -#include "dyngen-exec.h" #include "qemu-log.h" #include "helper.h" @@ -35,8 +34,8 @@ #endif /* return non zero if error */ -static inline int load_segment(uint32_t *e1_ptr, uint32_t *e2_ptr, - int selector) +static inline int load_segment(CPUX86State *env, uint32_t *e1_ptr, + uint32_t *e2_ptr, int selector) { SegmentCache *dt; int index; @@ -82,14 +81,14 @@ static inline void load_seg_cache_raw_dt(SegmentCache *sc, uint32_t e1, } /* init the segment cache in vm86 mode. */ -static inline void load_seg_vm(int seg, int selector) +static inline void load_seg_vm(CPUX86State *env, int seg, int selector) { selector &= 0xffff; cpu_x86_load_seg_cache(env, seg, selector, (selector << 4), 0xffff, 0); } -static inline void get_ss_esp_from_tss(uint32_t *ss_ptr, +static inline void get_ss_esp_from_tss(CPUX86State *env, uint32_t *ss_ptr, uint32_t *esp_ptr, int dpl) { int type, index, shift; @@ -130,13 +129,13 @@ static inline void get_ss_esp_from_tss(uint32_t *ss_ptr, } /* XXX: merge with load_seg() */ -static void tss_load_seg(int seg_reg, int selector) +static void tss_load_seg(CPUX86State *env, int seg_reg, int selector) { uint32_t e1, e2; int rpl, dpl, cpl; if ((selector & 0xfffc) != 0) { - if (load_segment(&e1, &e2, selector) != 0) { + if (load_segment(env, &e1, &e2, selector) != 0) { raise_exception_err(env, EXCP0A_TSS, selector & 0xfffc); } if (!(e2 & DESC_S_MASK)) { @@ -195,7 +194,7 @@ static void tss_load_seg(int seg_reg, int selector) #define SWITCH_TSS_CALL 2 /* XXX: restore CPU state in registers (PowerPC case) */ -static void switch_tss(int tss_selector, +static void switch_tss(CPUX86State *env, int tss_selector, uint32_t e1, uint32_t e2, int source, uint32_t next_eip) { @@ -221,7 +220,7 @@ static void switch_tss(int tss_selector, if (tss_selector & 4) { raise_exception_err(env, EXCP0A_TSS, tss_selector & 0xfffc); } - if (load_segment(&e1, &e2, tss_selector) != 0) { + if (load_segment(env, &e1, &e2, tss_selector) != 0) { raise_exception_err(env, EXCP0D_GPF, tss_selector & 0xfffc); } if (e2 & DESC_S_MASK) { @@ -403,7 +402,7 @@ static void switch_tss(int tss_selector, EDI = new_regs[7]; if (new_eflags & VM_MASK) { for (i = 0; i < 6; i++) { - load_seg_vm(i, new_segs[i]); + load_seg_vm(env, i, new_segs[i]); } /* in vm86, CPL is always 3 */ cpu_x86_set_cpl(env, 3); @@ -446,12 +445,12 @@ static void switch_tss(int tss_selector, /* load the segments */ if (!(new_eflags & VM_MASK)) { - tss_load_seg(R_CS, new_segs[R_CS]); - tss_load_seg(R_SS, new_segs[R_SS]); - tss_load_seg(R_ES, new_segs[R_ES]); - tss_load_seg(R_DS, new_segs[R_DS]); - tss_load_seg(R_FS, new_segs[R_FS]); - tss_load_seg(R_GS, new_segs[R_GS]); + tss_load_seg(env, R_CS, new_segs[R_CS]); + tss_load_seg(env, R_SS, new_segs[R_SS]); + tss_load_seg(env, R_ES, new_segs[R_ES]); + tss_load_seg(env, R_DS, new_segs[R_DS]); + tss_load_seg(env, R_FS, new_segs[R_FS]); + tss_load_seg(env, R_GS, new_segs[R_GS]); } /* check that EIP is in the CS segment limits */ @@ -545,8 +544,9 @@ static int exception_has_error_code(int intno) } /* protected mode interrupt */ -static void do_interrupt_protected(int intno, int is_int, int error_code, - unsigned int next_eip, int is_hw) +static void do_interrupt_protected(CPUX86State *env, int intno, int is_int, + int error_code, unsigned int next_eip, + int is_hw) { SegmentCache *dt; target_ulong ptr, ssp; @@ -580,7 +580,7 @@ static void do_interrupt_protected(int intno, int is_int, int error_code, if (!(e2 & DESC_P_MASK)) { raise_exception_err(env, EXCP0B_NOSEG, intno * 8 + 2); } - switch_tss(intno * 8, e1, e2, SWITCH_TSS_CALL, old_eip); + switch_tss(env, intno * 8, e1, e2, SWITCH_TSS_CALL, old_eip); if (has_error_code) { int type; uint32_t mask; @@ -627,7 +627,7 @@ static void do_interrupt_protected(int intno, int is_int, int error_code, if ((selector & 0xfffc) == 0) { raise_exception_err(env, EXCP0D_GPF, 0); } - if (load_segment(&e1, &e2, selector) != 0) { + if (load_segment(env, &e1, &e2, selector) != 0) { raise_exception_err(env, EXCP0D_GPF, selector & 0xfffc); } if (!(e2 & DESC_S_MASK) || !(e2 & (DESC_CS_MASK))) { @@ -642,14 +642,14 @@ static void do_interrupt_protected(int intno, int is_int, int error_code, } if (!(e2 & DESC_C_MASK) && dpl < cpl) { /* to inner privilege */ - get_ss_esp_from_tss(&ss, &esp, dpl); + get_ss_esp_from_tss(env, &ss, &esp, dpl); if ((ss & 0xfffc) == 0) { raise_exception_err(env, EXCP0A_TSS, ss & 0xfffc); } if ((ss & 3) != dpl) { raise_exception_err(env, EXCP0A_TSS, ss & 0xfffc); } - if (load_segment(&ss_e1, &ss_e2, ss) != 0) { + if (load_segment(env, &ss_e1, &ss_e2, ss) != 0) { raise_exception_err(env, EXCP0A_TSS, ss & 0xfffc); } ss_dpl = (ss_e2 >> DESC_DPL_SHIFT) & 3; @@ -773,7 +773,7 @@ static void do_interrupt_protected(int intno, int is_int, int error_code, sp += 8; \ } -static inline target_ulong get_rsp_from_tss(int level) +static inline target_ulong get_rsp_from_tss(CPUX86State *env, int level) { int index; @@ -793,8 +793,8 @@ static inline target_ulong get_rsp_from_tss(int level) } /* 64 bit interrupt */ -static void do_interrupt64(int intno, int is_int, int error_code, - target_ulong next_eip, int is_hw) +static void do_interrupt64(CPUX86State *env, int intno, int is_int, + int error_code, target_ulong next_eip, int is_hw) { SegmentCache *dt; target_ulong ptr; @@ -848,7 +848,7 @@ static void do_interrupt64(int intno, int is_int, int error_code, raise_exception_err(env, EXCP0D_GPF, 0); } - if (load_segment(&e1, &e2, selector) != 0) { + if (load_segment(env, &e1, &e2, selector) != 0) { raise_exception_err(env, EXCP0D_GPF, selector & 0xfffc); } if (!(e2 & DESC_S_MASK) || !(e2 & (DESC_CS_MASK))) { @@ -867,9 +867,9 @@ static void do_interrupt64(int intno, int is_int, int error_code, if ((!(e2 & DESC_C_MASK) && dpl < cpl) || ist != 0) { /* to inner privilege */ if (ist != 0) { - esp = get_rsp_from_tss(ist + 3); + esp = get_rsp_from_tss(env, ist + 3); } else { - esp = get_rsp_from_tss(dpl); + esp = get_rsp_from_tss(env, dpl); } esp &= ~0xfLL; /* align stack */ ss = 0; @@ -881,7 +881,7 @@ static void do_interrupt64(int intno, int is_int, int error_code, } new_stack = 0; if (ist != 0) { - esp = get_rsp_from_tss(ist + 3); + esp = get_rsp_from_tss(env, ist + 3); } else { esp = ESP; } @@ -926,14 +926,14 @@ static void do_interrupt64(int intno, int is_int, int error_code, #ifdef TARGET_X86_64 #if defined(CONFIG_USER_ONLY) -void helper_syscall(int next_eip_addend) +void helper_syscall(CPUX86State *env, int next_eip_addend) { env->exception_index = EXCP_SYSCALL; env->exception_next_eip = env->eip + next_eip_addend; cpu_loop_exit(env); } #else -void helper_syscall(int next_eip_addend) +void helper_syscall(CPUX86State *env, int next_eip_addend) { int selector; @@ -990,7 +990,7 @@ void helper_syscall(int next_eip_addend) #endif #ifdef TARGET_X86_64 -void helper_sysret(int dflag) +void helper_sysret(CPUX86State *env, int dflag) { int cpl, selector; @@ -1047,8 +1047,8 @@ void helper_sysret(int dflag) #endif /* real mode interrupt */ -static void do_interrupt_real(int intno, int is_int, int error_code, - unsigned int next_eip) +static void do_interrupt_real(CPUX86State *env, int intno, int is_int, + int error_code, unsigned int next_eip) { SegmentCache *dt; target_ulong ptr, ssp; @@ -1087,8 +1087,8 @@ static void do_interrupt_real(int intno, int is_int, int error_code, #if defined(CONFIG_USER_ONLY) /* fake user mode interrupt */ -static void do_interrupt_user(int intno, int is_int, int error_code, - target_ulong next_eip) +static void do_interrupt_user(CPUX86State *env, int intno, int is_int, + int error_code, target_ulong next_eip) { SegmentCache *dt; target_ulong ptr; @@ -1121,8 +1121,8 @@ static void do_interrupt_user(int intno, int is_int, int error_code, #else -static void handle_even_inj(int intno, int is_int, int error_code, - int is_hw, int rm) +static void handle_even_inj(CPUX86State *env, int intno, int is_int, + int error_code, int is_hw, int rm) { uint32_t event_inj = ldl_phys(env->vm_vmcb + offsetof(struct vmcb, control.event_inj)); @@ -1153,8 +1153,8 @@ static void handle_even_inj(int intno, int is_int, int error_code, * the int instruction. next_eip is the EIP value AFTER the interrupt * instruction. It is only relevant if is_int is TRUE. */ -static void do_interrupt_all(int intno, int is_int, int error_code, - target_ulong next_eip, int is_hw) +static void do_interrupt_all(CPUX86State *env, int intno, int is_int, + int error_code, target_ulong next_eip, int is_hw) { if (qemu_loglevel_mask(CPU_LOG_INT)) { if ((env->cr[0] & CR0_PE_MASK)) { @@ -1193,24 +1193,25 @@ static void do_interrupt_all(int intno, int is_int, int error_code, if (env->cr[0] & CR0_PE_MASK) { #if !defined(CONFIG_USER_ONLY) if (env->hflags & HF_SVMI_MASK) { - handle_even_inj(intno, is_int, error_code, is_hw, 0); + handle_even_inj(env, intno, is_int, error_code, is_hw, 0); } #endif #ifdef TARGET_X86_64 if (env->hflags & HF_LMA_MASK) { - do_interrupt64(intno, is_int, error_code, next_eip, is_hw); + do_interrupt64(env, intno, is_int, error_code, next_eip, is_hw); } else #endif { - do_interrupt_protected(intno, is_int, error_code, next_eip, is_hw); + do_interrupt_protected(env, intno, is_int, error_code, next_eip, + is_hw); } } else { #if !defined(CONFIG_USER_ONLY) if (env->hflags & HF_SVMI_MASK) { - handle_even_inj(intno, is_int, error_code, is_hw, 1); + handle_even_inj(env, intno, is_int, error_code, is_hw, 1); } #endif - do_interrupt_real(intno, is_int, error_code, next_eip); + do_interrupt_real(env, intno, is_int, error_code, next_eip); } #if !defined(CONFIG_USER_ONLY) @@ -1225,17 +1226,13 @@ static void do_interrupt_all(int intno, int is_int, int error_code, #endif } -void do_interrupt(CPUX86State *env1) +void do_interrupt(CPUX86State *env) { - CPUX86State *saved_env; - - saved_env = env; - env = env1; #if defined(CONFIG_USER_ONLY) /* if user mode only, we simulate a fake exception which will be handled outside the cpu execution loop */ - do_interrupt_user(env->exception_index, + do_interrupt_user(env, env->exception_index, env->exception_is_int, env->error_code, env->exception_next_eip); @@ -1245,27 +1242,22 @@ void do_interrupt(CPUX86State *env1) /* simulate a real cpu exception. On i386, it can trigger new exceptions, but we do not handle double or triple faults yet. */ - do_interrupt_all(env->exception_index, + do_interrupt_all(env, env->exception_index, env->exception_is_int, env->error_code, env->exception_next_eip, 0); /* successfully delivered */ env->old_exception = -1; #endif - env = saved_env; } -void do_interrupt_x86_hardirq(CPUX86State *env1, int intno, int is_hw) +void do_interrupt_x86_hardirq(CPUX86State *env, int intno, int is_hw) { - CPUX86State *saved_env; - - saved_env = env; - env = env1; - do_interrupt_all(intno, 0, 0, 0, is_hw); - env = saved_env; + do_interrupt_all(env, intno, 0, 0, 0, is_hw); } -void helper_enter_level(int level, int data32, target_ulong t1) +void helper_enter_level(CPUX86State *env, int level, int data32, + target_ulong t1) { target_ulong ssp; uint32_t esp_mask, esp, ebp; @@ -1300,7 +1292,8 @@ void helper_enter_level(int level, int data32, target_ulong t1) } #ifdef TARGET_X86_64 -void helper_enter64_level(int level, int data64, target_ulong t1) +void helper_enter64_level(CPUX86State *env, int level, int data64, + target_ulong t1) { target_ulong esp, ebp; @@ -1331,7 +1324,7 @@ void helper_enter64_level(int level, int data64, target_ulong t1) } #endif -void helper_lldt(int selector) +void helper_lldt(CPUX86State *env, int selector) { SegmentCache *dt; uint32_t e1, e2; @@ -1385,7 +1378,7 @@ void helper_lldt(int selector) env->ldt.selector = selector; } -void helper_ltr(int selector) +void helper_ltr(CPUX86State *env, int selector) { SegmentCache *dt; uint32_t e1, e2; @@ -1449,7 +1442,7 @@ void helper_ltr(int selector) } /* only works if protected mode and not VM86. seg_reg must be != R_CS */ -void helper_load_seg(int seg_reg, int selector) +void helper_load_seg(CPUX86State *env, int seg_reg, int selector) { uint32_t e1, e2; int cpl, dpl, rpl; @@ -1537,7 +1530,7 @@ void helper_load_seg(int seg_reg, int selector) } /* protected mode jump */ -void helper_ljmp_protected(int new_cs, target_ulong new_eip, +void helper_ljmp_protected(CPUX86State *env, int new_cs, target_ulong new_eip, int next_eip_addend) { int gate_cs, type; @@ -1547,7 +1540,7 @@ void helper_ljmp_protected(int new_cs, target_ulong new_eip, if ((new_cs & 0xfffc) == 0) { raise_exception_err(env, EXCP0D_GPF, 0); } - if (load_segment(&e1, &e2, new_cs) != 0) { + if (load_segment(env, &e1, &e2, new_cs) != 0) { raise_exception_err(env, EXCP0D_GPF, new_cs & 0xfffc); } cpl = env->hflags & HF_CPL_MASK; @@ -1596,7 +1589,7 @@ void helper_ljmp_protected(int new_cs, target_ulong new_eip, raise_exception_err(env, EXCP0D_GPF, new_cs & 0xfffc); } next_eip = env->eip + next_eip_addend; - switch_tss(new_cs, e1, e2, SWITCH_TSS_JMP, next_eip); + switch_tss(env, new_cs, e1, e2, SWITCH_TSS_JMP, next_eip); CC_OP = CC_OP_EFLAGS; break; case 4: /* 286 call gate */ @@ -1612,7 +1605,7 @@ void helper_ljmp_protected(int new_cs, target_ulong new_eip, if (type == 12) { new_eip |= (e2 & 0xffff0000); } - if (load_segment(&e1, &e2, gate_cs) != 0) { + if (load_segment(env, &e1, &e2, gate_cs) != 0) { raise_exception_err(env, EXCP0D_GPF, gate_cs & 0xfffc); } dpl = (e2 >> DESC_DPL_SHIFT) & 3; @@ -1644,7 +1637,7 @@ void helper_ljmp_protected(int new_cs, target_ulong new_eip, } /* real mode call */ -void helper_lcall_real(int new_cs, target_ulong new_eip1, +void helper_lcall_real(CPUX86State *env, int new_cs, target_ulong new_eip1, int shift, int next_eip) { int new_eip; @@ -1670,7 +1663,7 @@ void helper_lcall_real(int new_cs, target_ulong new_eip1, } /* protected mode call */ -void helper_lcall_protected(int new_cs, target_ulong new_eip, +void helper_lcall_protected(CPUX86State *env, int new_cs, target_ulong new_eip, int shift, int next_eip_addend) { int new_stack, i; @@ -1685,7 +1678,7 @@ void helper_lcall_protected(int new_cs, target_ulong new_eip, if ((new_cs & 0xfffc) == 0) { raise_exception_err(env, EXCP0D_GPF, 0); } - if (load_segment(&e1, &e2, new_cs) != 0) { + if (load_segment(env, &e1, &e2, new_cs) != 0) { raise_exception_err(env, EXCP0D_GPF, new_cs & 0xfffc); } cpl = env->hflags & HF_CPL_MASK; @@ -1765,7 +1758,7 @@ void helper_lcall_protected(int new_cs, target_ulong new_eip, if (dpl < cpl || dpl < rpl) { raise_exception_err(env, EXCP0D_GPF, new_cs & 0xfffc); } - switch_tss(new_cs, e1, e2, SWITCH_TSS_CALL, next_eip); + switch_tss(env, new_cs, e1, e2, SWITCH_TSS_CALL, next_eip); CC_OP = CC_OP_EFLAGS; return; case 4: /* 286 call gate */ @@ -1791,7 +1784,7 @@ void helper_lcall_protected(int new_cs, target_ulong new_eip, raise_exception_err(env, EXCP0D_GPF, 0); } - if (load_segment(&e1, &e2, selector) != 0) { + if (load_segment(env, &e1, &e2, selector) != 0) { raise_exception_err(env, EXCP0D_GPF, selector & 0xfffc); } if (!(e2 & DESC_S_MASK) || !(e2 & (DESC_CS_MASK))) { @@ -1807,7 +1800,7 @@ void helper_lcall_protected(int new_cs, target_ulong new_eip, if (!(e2 & DESC_C_MASK) && dpl < cpl) { /* to inner privilege */ - get_ss_esp_from_tss(&ss, &sp, dpl); + get_ss_esp_from_tss(env, &ss, &sp, dpl); LOG_PCALL("new ss:esp=%04x:%08x param_count=%d ESP=" TARGET_FMT_lx "\n", ss, sp, param_count, ESP); @@ -1817,7 +1810,7 @@ void helper_lcall_protected(int new_cs, target_ulong new_eip, if ((ss & 3) != dpl) { raise_exception_err(env, EXCP0A_TSS, ss & 0xfffc); } - if (load_segment(&ss_e1, &ss_e2, ss) != 0) { + if (load_segment(env, &ss_e1, &ss_e2, ss) != 0) { raise_exception_err(env, EXCP0A_TSS, ss & 0xfffc); } ss_dpl = (ss_e2 >> DESC_DPL_SHIFT) & 3; @@ -1897,7 +1890,7 @@ void helper_lcall_protected(int new_cs, target_ulong new_eip, } /* real and vm86 mode iret */ -void helper_iret_real(int shift) +void helper_iret_real(CPUX86State *env, int shift) { uint32_t sp, new_cs, new_eip, new_eflags, sp_mask; target_ulong ssp; @@ -1936,7 +1929,7 @@ void helper_iret_real(int shift) env->hflags2 &= ~HF2_NMI_MASK; } -static inline void validate_seg(int seg_reg, int cpl) +static inline void validate_seg(CPUX86State *env, int seg_reg, int cpl) { int dpl; uint32_t e2; @@ -1960,7 +1953,8 @@ static inline void validate_seg(int seg_reg, int cpl) } /* protected mode iret */ -static inline void helper_ret_protected(int shift, int is_iret, int addend) +static inline void helper_ret_protected(CPUX86State *env, int shift, + int is_iret, int addend) { uint32_t new_cs, new_eflags, new_ss; uint32_t new_es, new_ds, new_fs, new_gs; @@ -2016,7 +2010,7 @@ static inline void helper_ret_protected(int shift, int is_iret, int addend) if ((new_cs & 0xfffc) == 0) { raise_exception_err(env, EXCP0D_GPF, new_cs & 0xfffc); } - if (load_segment(&e1, &e2, new_cs) != 0) { + if (load_segment(env, &e1, &e2, new_cs) != 0) { raise_exception_err(env, EXCP0D_GPF, new_cs & 0xfffc); } if (!(e2 & DESC_S_MASK) || @@ -2093,7 +2087,7 @@ static inline void helper_ret_protected(int shift, int is_iret, int addend) if ((new_ss & 3) != rpl) { raise_exception_err(env, EXCP0D_GPF, new_ss & 0xfffc); } - if (load_segment(&ss_e1, &ss_e2, new_ss) != 0) { + if (load_segment(env, &ss_e1, &ss_e2, new_ss) != 0) { raise_exception_err(env, EXCP0D_GPF, new_ss & 0xfffc); } if (!(ss_e2 & DESC_S_MASK) || @@ -2130,10 +2124,10 @@ static inline void helper_ret_protected(int shift, int is_iret, int addend) } /* validate data segments */ - validate_seg(R_ES, rpl); - validate_seg(R_DS, rpl); - validate_seg(R_FS, rpl); - validate_seg(R_GS, rpl); + validate_seg(env, R_ES, rpl); + validate_seg(env, R_DS, rpl); + validate_seg(env, R_FS, rpl); + validate_seg(env, R_GS, rpl); sp += addend; } @@ -2168,19 +2162,19 @@ static inline void helper_ret_protected(int shift, int is_iret, int addend) cpu_load_eflags(env, new_eflags, TF_MASK | AC_MASK | ID_MASK | IF_MASK | IOPL_MASK | VM_MASK | NT_MASK | VIF_MASK | VIP_MASK); - load_seg_vm(R_CS, new_cs & 0xffff); + load_seg_vm(env, R_CS, new_cs & 0xffff); cpu_x86_set_cpl(env, 3); - load_seg_vm(R_SS, new_ss & 0xffff); - load_seg_vm(R_ES, new_es & 0xffff); - load_seg_vm(R_DS, new_ds & 0xffff); - load_seg_vm(R_FS, new_fs & 0xffff); - load_seg_vm(R_GS, new_gs & 0xffff); + load_seg_vm(env, R_SS, new_ss & 0xffff); + load_seg_vm(env, R_ES, new_es & 0xffff); + load_seg_vm(env, R_DS, new_ds & 0xffff); + load_seg_vm(env, R_FS, new_fs & 0xffff); + load_seg_vm(env, R_GS, new_gs & 0xffff); env->eip = new_eip & 0xffff; ESP = new_esp; } -void helper_iret_protected(int shift, int next_eip) +void helper_iret_protected(CPUX86State *env, int shift, int next_eip) { int tss_selector, type; uint32_t e1, e2; @@ -2196,7 +2190,7 @@ void helper_iret_protected(int shift, int next_eip) if (tss_selector & 4) { raise_exception_err(env, EXCP0A_TSS, tss_selector & 0xfffc); } - if (load_segment(&e1, &e2, tss_selector) != 0) { + if (load_segment(env, &e1, &e2, tss_selector) != 0) { raise_exception_err(env, EXCP0A_TSS, tss_selector & 0xfffc); } type = (e2 >> DESC_TYPE_SHIFT) & 0x17; @@ -2204,19 +2198,19 @@ void helper_iret_protected(int shift, int next_eip) if (type != 3) { raise_exception_err(env, EXCP0A_TSS, tss_selector & 0xfffc); } - switch_tss(tss_selector, e1, e2, SWITCH_TSS_IRET, next_eip); + switch_tss(env, tss_selector, e1, e2, SWITCH_TSS_IRET, next_eip); } else { - helper_ret_protected(shift, 1, 0); + helper_ret_protected(env, shift, 1, 0); } env->hflags2 &= ~HF2_NMI_MASK; } -void helper_lret_protected(int shift, int addend) +void helper_lret_protected(CPUX86State *env, int shift, int addend) { - helper_ret_protected(shift, 0, addend); + helper_ret_protected(env, shift, 0, addend); } -void helper_sysenter(void) +void helper_sysenter(CPUX86State *env) { if (env->sysenter_cs == 0) { raise_exception_err(env, EXCP0D_GPF, 0); @@ -2250,7 +2244,7 @@ void helper_sysenter(void) EIP = env->sysenter_eip; } -void helper_sysexit(int dflag) +void helper_sysexit(CPUX86State *env, int dflag) { int cpl; @@ -2290,7 +2284,7 @@ void helper_sysexit(int dflag) EIP = EDX; } -target_ulong helper_lsl(target_ulong selector1) +target_ulong helper_lsl(CPUX86State *env, target_ulong selector1) { unsigned int limit; uint32_t e1, e2, eflags, selector; @@ -2301,7 +2295,7 @@ target_ulong helper_lsl(target_ulong selector1) if ((selector & 0xfffc) == 0) { goto fail; } - if (load_segment(&e1, &e2, selector) != 0) { + if (load_segment(env, &e1, &e2, selector) != 0) { goto fail; } rpl = selector & 3; @@ -2338,7 +2332,7 @@ target_ulong helper_lsl(target_ulong selector1) return limit; } -target_ulong helper_lar(target_ulong selector1) +target_ulong helper_lar(CPUX86State *env, target_ulong selector1) { uint32_t e1, e2, eflags, selector; int rpl, dpl, cpl, type; @@ -2348,7 +2342,7 @@ target_ulong helper_lar(target_ulong selector1) if ((selector & 0xfffc) == 0) { goto fail; } - if (load_segment(&e1, &e2, selector) != 0) { + if (load_segment(env, &e1, &e2, selector) != 0) { goto fail; } rpl = selector & 3; @@ -2387,7 +2381,7 @@ target_ulong helper_lar(target_ulong selector1) return e2 & 0x00f0ff00; } -void helper_verr(target_ulong selector1) +void helper_verr(CPUX86State *env, target_ulong selector1) { uint32_t e1, e2, eflags, selector; int rpl, dpl, cpl; @@ -2397,7 +2391,7 @@ void helper_verr(target_ulong selector1) if ((selector & 0xfffc) == 0) { goto fail; } - if (load_segment(&e1, &e2, selector) != 0) { + if (load_segment(env, &e1, &e2, selector) != 0) { goto fail; } if (!(e2 & DESC_S_MASK)) { @@ -2425,7 +2419,7 @@ void helper_verr(target_ulong selector1) CC_SRC = eflags | CC_Z; } -void helper_verw(target_ulong selector1) +void helper_verw(CPUX86State *env, target_ulong selector1) { uint32_t e1, e2, eflags, selector; int rpl, dpl, cpl; @@ -2435,7 +2429,7 @@ void helper_verw(target_ulong selector1) if ((selector & 0xfffc) == 0) { goto fail; } - if (load_segment(&e1, &e2, selector) != 0) { + if (load_segment(env, &e1, &e2, selector) != 0) { goto fail; } if (!(e2 & DESC_S_MASK)) { @@ -2460,19 +2454,14 @@ void helper_verw(target_ulong selector1) } #if defined(CONFIG_USER_ONLY) -void cpu_x86_load_seg(CPUX86State *s, int seg_reg, int selector) +void cpu_x86_load_seg(CPUX86State *env, int seg_reg, int selector) { - CPUX86State *saved_env; - - saved_env = env; - env = s; if (!(env->cr[0] & CR0_PE_MASK) || (env->eflags & VM_MASK)) { selector &= 0xffff; cpu_x86_load_seg_cache(env, seg_reg, selector, (selector << 4), 0xffff, 0); } else { - helper_load_seg(seg_reg, selector); + helper_load_seg(env, seg_reg, selector); } - env = saved_env; } #endif diff --git a/target-i386/translate.c b/target-i386/translate.c index a4c2ae0..26091f9 100644 --- a/target-i386/translate.c +++ b/target-i386/translate.c @@ -2443,7 +2443,7 @@ static void gen_movl_seg_T0(DisasContext *s, int seg_reg, target_ulong cur_eip) gen_op_set_cc_op(s->cc_op); gen_jmp_im(cur_eip); tcg_gen_trunc_tl_i32(cpu_tmp2_i32, cpu_T[0]); - gen_helper_load_seg(tcg_const_i32(seg_reg), cpu_tmp2_i32); + gen_helper_load_seg(cpu_env, tcg_const_i32(seg_reg), cpu_tmp2_i32); /* abort translation because the addseg value may change or because ss32 may change. For R_SS, translation must always stop as a special handling must be done to disable hardware @@ -2680,7 +2680,7 @@ static void gen_enter(DisasContext *s, int esp_addend, int level) gen_op_st_T0_A0(ot + s->mem_index); if (level) { /* XXX: must save state */ - gen_helper_enter64_level(tcg_const_i32(level), + gen_helper_enter64_level(cpu_env, tcg_const_i32(level), tcg_const_i32((ot == OT_QUAD)), cpu_T[1]); } @@ -2705,7 +2705,7 @@ static void gen_enter(DisasContext *s, int esp_addend, int level) gen_op_st_T0_A0(ot + s->mem_index); if (level) { /* XXX: must save state */ - gen_helper_enter_level(tcg_const_i32(level), + gen_helper_enter_level(cpu_env, tcg_const_i32(level), tcg_const_i32(s->dflag), cpu_T[1]); } @@ -4759,13 +4759,13 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) gen_op_set_cc_op(s->cc_op); gen_jmp_im(pc_start - s->cs_base); tcg_gen_trunc_tl_i32(cpu_tmp2_i32, cpu_T[0]); - gen_helper_lcall_protected(cpu_tmp2_i32, cpu_T[1], - tcg_const_i32(dflag), + gen_helper_lcall_protected(cpu_env, cpu_tmp2_i32, cpu_T[1], + tcg_const_i32(dflag), tcg_const_i32(s->pc - pc_start)); } else { tcg_gen_trunc_tl_i32(cpu_tmp2_i32, cpu_T[0]); - gen_helper_lcall_real(cpu_tmp2_i32, cpu_T[1], - tcg_const_i32(dflag), + gen_helper_lcall_real(cpu_env, cpu_tmp2_i32, cpu_T[1], + tcg_const_i32(dflag), tcg_const_i32(s->pc - s->cs_base)); } gen_eob(s); @@ -4786,7 +4786,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) gen_op_set_cc_op(s->cc_op); gen_jmp_im(pc_start - s->cs_base); tcg_gen_trunc_tl_i32(cpu_tmp2_i32, cpu_T[0]); - gen_helper_ljmp_protected(cpu_tmp2_i32, cpu_T[1], + gen_helper_ljmp_protected(cpu_env, cpu_tmp2_i32, cpu_T[1], tcg_const_i32(s->pc - pc_start)); } else { gen_op_movl_seg_T0_vm(R_CS); @@ -6320,7 +6320,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) if (s->cc_op != CC_OP_DYNAMIC) gen_op_set_cc_op(s->cc_op); gen_jmp_im(pc_start - s->cs_base); - gen_helper_lret_protected(tcg_const_i32(s->dflag), + gen_helper_lret_protected(cpu_env, tcg_const_i32(s->dflag), tcg_const_i32(val)); } else { gen_stack_A0(s); @@ -6347,20 +6347,20 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) gen_svm_check_intercept(s, pc_start, SVM_EXIT_IRET); if (!s->pe) { /* real mode */ - gen_helper_iret_real(tcg_const_i32(s->dflag)); + gen_helper_iret_real(cpu_env, tcg_const_i32(s->dflag)); s->cc_op = CC_OP_EFLAGS; } else if (s->vm86) { if (s->iopl != 3) { gen_exception(s, EXCP0D_GPF, pc_start - s->cs_base); } else { - gen_helper_iret_real(tcg_const_i32(s->dflag)); + gen_helper_iret_real(cpu_env, tcg_const_i32(s->dflag)); s->cc_op = CC_OP_EFLAGS; } } else { if (s->cc_op != CC_OP_DYNAMIC) gen_op_set_cc_op(s->cc_op); gen_jmp_im(pc_start - s->cs_base); - gen_helper_iret_protected(tcg_const_i32(s->dflag), + gen_helper_iret_protected(cpu_env, tcg_const_i32(s->dflag), tcg_const_i32(s->pc - s->cs_base)); s->cc_op = CC_OP_EFLAGS; } @@ -7028,7 +7028,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) } else { gen_update_cc_op(s); gen_jmp_im(pc_start - s->cs_base); - gen_helper_sysenter(); + gen_helper_sysenter(cpu_env); gen_eob(s); } break; @@ -7041,7 +7041,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) } else { gen_update_cc_op(s); gen_jmp_im(pc_start - s->cs_base); - gen_helper_sysexit(tcg_const_i32(dflag)); + gen_helper_sysexit(cpu_env, tcg_const_i32(dflag)); gen_eob(s); } break; @@ -7050,7 +7050,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) /* XXX: is it usable in real mode ? */ gen_update_cc_op(s); gen_jmp_im(pc_start - s->cs_base); - gen_helper_syscall(tcg_const_i32(s->pc - pc_start)); + gen_helper_syscall(cpu_env, tcg_const_i32(s->pc - pc_start)); gen_eob(s); break; case 0x107: /* sysret */ @@ -7059,7 +7059,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) } else { gen_update_cc_op(s); gen_jmp_im(pc_start - s->cs_base); - gen_helper_sysret(tcg_const_i32(s->dflag)); + gen_helper_sysret(cpu_env, tcg_const_i32(s->dflag)); /* condition codes are modified only in long mode */ if (s->lma) s->cc_op = CC_OP_EFLAGS; @@ -7109,7 +7109,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) gen_ldst_modrm(s, modrm, OT_WORD, OR_TMP0, 0); gen_jmp_im(pc_start - s->cs_base); tcg_gen_trunc_tl_i32(cpu_tmp2_i32, cpu_T[0]); - gen_helper_lldt(cpu_tmp2_i32); + gen_helper_lldt(cpu_env, cpu_tmp2_i32); } break; case 1: /* str */ @@ -7132,7 +7132,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) gen_ldst_modrm(s, modrm, OT_WORD, OR_TMP0, 0); gen_jmp_im(pc_start - s->cs_base); tcg_gen_trunc_tl_i32(cpu_tmp2_i32, cpu_T[0]); - gen_helper_ltr(cpu_tmp2_i32); + gen_helper_ltr(cpu_env, cpu_tmp2_i32); } break; case 4: /* verr */ @@ -7142,10 +7142,11 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) gen_ldst_modrm(s, modrm, OT_WORD, OR_TMP0, 0); if (s->cc_op != CC_OP_DYNAMIC) gen_op_set_cc_op(s->cc_op); - if (op == 4) - gen_helper_verr(cpu_T[0]); - else - gen_helper_verw(cpu_T[0]); + if (op == 4) { + gen_helper_verr(cpu_env, cpu_T[0]); + } else { + gen_helper_verw(cpu_env, cpu_T[0]); + } s->cc_op = CC_OP_EFLAGS; break; default: @@ -7506,10 +7507,11 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) t0 = tcg_temp_local_new(); if (s->cc_op != CC_OP_DYNAMIC) gen_op_set_cc_op(s->cc_op); - if (b == 0x102) - gen_helper_lar(t0, cpu_T[0]); - else - gen_helper_lsl(t0, cpu_T[0]); + if (b == 0x102) { + gen_helper_lar(t0, cpu_env, cpu_T[0]); + } else { + gen_helper_lsl(t0, cpu_env, cpu_T[0]); + } tcg_gen_andi_tl(cpu_tmp0, cpu_cc_src, CC_Z); label1 = gen_new_label(); tcg_gen_brcondi_tl(TCG_COND_EQ, cpu_tmp0, 0, label1); -- cgit v1.1 From 92fc4b586f8856ee9f2bad31fb6e9acd80fa8319 Mon Sep 17 00:00:00 2001 From: Blue Swirl Date: Sun, 29 Apr 2012 20:35:48 +0000 Subject: x86: switch to AREG0 free mode Add an explicit CPUX86State parameter instead of relying on AREG0. Remove temporary wrappers and switch to AREG0 free mode. Signed-off-by: Blue Swirl --- configure | 2 +- cpu-all.h | 22 ++++++ target-i386/Makefile.objs | 2 - target-i386/cpu.h | 21 ------ target-i386/fpu_helper.c | 4 ++ target-i386/helper.h | 8 +-- target-i386/mem_helper.c | 101 +++++--------------------- target-i386/misc_helper.c | 4 ++ target-i386/seg_helper.c | 4 ++ target-i386/svm_helper.c | 4 ++ target-i386/translate.c | 179 +++++++++++++++++++++++----------------------- 11 files changed, 151 insertions(+), 200 deletions(-) diff --git a/configure b/configure index fea62f1..edf9da4 100755 --- a/configure +++ b/configure @@ -3778,7 +3778,7 @@ symlink "$source_path/Makefile.target" "$target_dir/Makefile" case "$target_arch2" in - alpha | or32 | sparc* | xtensa* | ppc*) + alpha | i386 | or32 | sparc* | x86_64 | xtensa* | ppc*) echo "CONFIG_TCG_PASS_AREG0=y" >> $config_target_mak ;; esac diff --git a/cpu-all.h b/cpu-all.h index 82ba1d7..5e07d28 100644 --- a/cpu-all.h +++ b/cpu-all.h @@ -274,6 +274,28 @@ extern unsigned long reserved_va; #define cpu_ldsw_code(env1, p) ldsw_raw(p) #define cpu_ldl_code(env1, p) ldl_raw(p) #define cpu_ldq_code(env1, p) ldq_raw(p) + +#define cpu_ldub_data(env, addr) ldub_raw(addr) +#define cpu_lduw_data(env, addr) lduw_raw(addr) +#define cpu_ldsw_data(env, addr) ldsw_raw(addr) +#define cpu_ldl_data(env, addr) ldl_raw(addr) +#define cpu_ldq_data(env, addr) ldq_raw(addr) + +#define cpu_stb_data(env, addr, data) stb_raw(addr, data) +#define cpu_stw_data(env, addr, data) stw_raw(addr, data) +#define cpu_stl_data(env, addr, data) stl_raw(addr, data) +#define cpu_stq_data(env, addr, data) stq_raw(addr, data) + +#define cpu_ldub_kernel(env, addr) ldub_raw(addr) +#define cpu_lduw_kernel(env, addr) lduw_raw(addr) +#define cpu_ldsw_kernel(env, addr) ldsw_raw(addr) +#define cpu_ldl_kernel(env, addr) ldl_raw(addr) +#define cpu_ldq_kernel(env, addr) ldq_raw(addr) + +#define cpu_stb_kernel(env, addr, data) stb_raw(addr, data) +#define cpu_stw_kernel(env, addr, data) stw_raw(addr, data) +#define cpu_stl_kernel(env, addr, data) stl_raw(addr, data) +#define cpu_stq_kernel(env, addr, data) stq_raw(addr, data) #endif #define ldub_kernel(p) ldub_raw(p) diff --git a/target-i386/Makefile.objs b/target-i386/Makefile.objs index 71d7d3b..c1d4f05 100644 --- a/target-i386/Makefile.objs +++ b/target-i386/Makefile.objs @@ -6,5 +6,3 @@ obj-$(CONFIG_KVM) += kvm.o hyperv.o obj-$(CONFIG_NO_KVM) += kvm-stub.o obj-$(CONFIG_LINUX_USER) += ioport-user.o obj-$(CONFIG_BSD_USER) += ioport-user.o - -$(obj)/mem_helper.o: QEMU_CFLAGS += $(HELPER_CFLAGS) diff --git a/target-i386/cpu.h b/target-i386/cpu.h index f33be16..60f9e97 100644 --- a/target-i386/cpu.h +++ b/target-i386/cpu.h @@ -1138,25 +1138,4 @@ void do_smm_enter(CPUX86State *env1); void cpu_report_tpr_access(CPUX86State *env, TPRAccess access); -/* temporary wrappers */ -uint32_t cpu_ldub_data(CPUX86State *env, target_ulong ptr); -uint32_t cpu_lduw_data(CPUX86State *env, target_ulong ptr); -uint32_t cpu_ldl_data(CPUX86State *env, target_ulong ptr); -uint64_t cpu_ldq_data(CPUX86State *env, target_ulong ptr); - -void cpu_stb_data(CPUX86State *env, target_ulong ptr, uint32_t data); -void cpu_stw_data(CPUX86State *env, target_ulong ptr, uint32_t data); -void cpu_stl_data(CPUX86State *env, target_ulong ptr, uint32_t data); -void cpu_stq_data(CPUX86State *env, target_ulong ptr, uint64_t data); - -uint32_t cpu_ldub_kernel(CPUX86State *env, target_ulong ptr); -uint32_t cpu_lduw_kernel(CPUX86State *env, target_ulong ptr); -uint32_t cpu_ldl_kernel(CPUX86State *env, target_ulong ptr); -uint64_t cpu_ldq_kernel(CPUX86State *env, target_ulong ptr); - -void cpu_stb_kernel(CPUX86State *env, target_ulong ptr, uint32_t data); -void cpu_stw_kernel(CPUX86State *env, target_ulong ptr, uint32_t data); -void cpu_stl_kernel(CPUX86State *env, target_ulong ptr, uint32_t data); -void cpu_stq_kernel(CPUX86State *env, target_ulong ptr, uint64_t data); - #endif /* CPU_I386_H */ diff --git a/target-i386/fpu_helper.c b/target-i386/fpu_helper.c index a1d7ef7..dfc34a6 100644 --- a/target-i386/fpu_helper.c +++ b/target-i386/fpu_helper.c @@ -21,6 +21,10 @@ #include "cpu.h" #include "helper.h" +#if !defined(CONFIG_USER_ONLY) +#include "softmmu_exec.h" +#endif /* !defined(CONFIG_USER_ONLY) */ + #define FPU_RC_MASK 0xc00 #define FPU_RC_NEAR 0x000 #define FPU_RC_DOWN 0x400 diff --git a/target-i386/helper.h b/target-i386/helper.h index 0f02103..ab6af63 100644 --- a/target-i386/helper.h +++ b/target-i386/helper.h @@ -69,13 +69,13 @@ DEF_HELPER_1(cli, void, env) DEF_HELPER_1(sti, void, env) DEF_HELPER_1(set_inhibit_irq, void, env) DEF_HELPER_1(reset_inhibit_irq, void, env) -DEF_HELPER_2(boundw, void, tl, int) -DEF_HELPER_2(boundl, void, tl, int) +DEF_HELPER_3(boundw, void, env, tl, int) +DEF_HELPER_3(boundl, void, env, tl, int) DEF_HELPER_1(rsm, void, env) DEF_HELPER_2(into, void, env, int) -DEF_HELPER_1(cmpxchg8b, void, tl) +DEF_HELPER_2(cmpxchg8b, void, env, tl) #ifdef TARGET_X86_64 -DEF_HELPER_1(cmpxchg16b, void, tl) +DEF_HELPER_2(cmpxchg16b, void, env, tl) #endif DEF_HELPER_1(single_step, void, env) DEF_HELPER_1(cpuid, void, env) diff --git a/target-i386/mem_helper.c b/target-i386/mem_helper.c index 3dd4406..7f99c7c 100644 --- a/target-i386/mem_helper.c +++ b/target-i386/mem_helper.c @@ -18,7 +18,6 @@ */ #include "cpu.h" -#include "dyngen-exec.h" #include "helper.h" #if !defined(CONFIG_USER_ONLY) @@ -39,19 +38,19 @@ void helper_unlock(void) spin_unlock(&global_cpu_lock); } -void helper_cmpxchg8b(target_ulong a0) +void helper_cmpxchg8b(CPUX86State *env, target_ulong a0) { uint64_t d; int eflags; eflags = cpu_cc_compute_all(env, CC_OP); - d = ldq(a0); + d = cpu_ldq_data(env, a0); if (d == (((uint64_t)EDX << 32) | (uint32_t)EAX)) { - stq(a0, ((uint64_t)ECX << 32) | (uint32_t)EBX); + cpu_stq_data(env, a0, ((uint64_t)ECX << 32) | (uint32_t)EBX); eflags |= CC_Z; } else { /* always do the store */ - stq(a0, d); + cpu_stq_data(env, a0, d); EDX = (uint32_t)(d >> 32); EAX = (uint32_t)d; eflags &= ~CC_Z; @@ -60,7 +59,7 @@ void helper_cmpxchg8b(target_ulong a0) } #ifdef TARGET_X86_64 -void helper_cmpxchg16b(target_ulong a0) +void helper_cmpxchg16b(CPUX86State *env, target_ulong a0) { uint64_t d0, d1; int eflags; @@ -69,16 +68,16 @@ void helper_cmpxchg16b(target_ulong a0) raise_exception(env, EXCP0D_GPF); } eflags = cpu_cc_compute_all(env, CC_OP); - d0 = ldq(a0); - d1 = ldq(a0 + 8); + d0 = cpu_ldq_data(env, a0); + d1 = cpu_ldq_data(env, a0 + 8); if (d0 == EAX && d1 == EDX) { - stq(a0, EBX); - stq(a0 + 8, ECX); + cpu_stq_data(env, a0, EBX); + cpu_stq_data(env, a0 + 8, ECX); eflags |= CC_Z; } else { /* always do the store */ - stq(a0, d0); - stq(a0 + 8, d1); + cpu_stq_data(env, a0, d0); + cpu_stq_data(env, a0 + 8, d1); EDX = d1; EAX = d0; eflags &= ~CC_Z; @@ -87,24 +86,24 @@ void helper_cmpxchg16b(target_ulong a0) } #endif -void helper_boundw(target_ulong a0, int v) +void helper_boundw(CPUX86State *env, target_ulong a0, int v) { int low, high; - low = ldsw(a0); - high = ldsw(a0 + 2); + low = cpu_ldsw_data(env, a0); + high = cpu_ldsw_data(env, a0 + 2); v = (int16_t)v; if (v < low || v > high) { raise_exception(env, EXCP05_BOUND); } } -void helper_boundl(target_ulong a0, int v) +void helper_boundl(CPUX86State *env, target_ulong a0, int v) { int low, high; - low = ldl(a0); - high = ldl(a0 + 4); + low = cpu_ldl_data(env, a0); + high = cpu_ldl_data(env, a0 + 4); if (v < low || v > high) { raise_exception(env, EXCP05_BOUND); } @@ -133,15 +132,11 @@ void helper_boundl(target_ulong a0, int v) NULL, it means that the function was called in C code (i.e. not from generated code or from helper.c) */ /* XXX: fix it to restore all registers */ -void tlb_fill(CPUX86State *env1, target_ulong addr, int is_write, int mmu_idx, +void tlb_fill(CPUX86State *env, target_ulong addr, int is_write, int mmu_idx, uintptr_t retaddr) { TranslationBlock *tb; int ret; - CPUX86State *saved_env; - - saved_env = env; - env = env1; ret = cpu_x86_handle_mmu_fault(env, addr, is_write, mmu_idx); if (ret) { @@ -156,65 +151,5 @@ void tlb_fill(CPUX86State *env1, target_ulong addr, int is_write, int mmu_idx, } raise_exception_err(env, env->exception_index, env->error_code); } - env = saved_env; } #endif - -/* temporary wrappers */ -#if defined(CONFIG_USER_ONLY) -#define ldub_data(addr) ldub_raw(addr) -#define lduw_data(addr) lduw_raw(addr) -#define ldl_data(addr) ldl_raw(addr) -#define ldq_data(addr) ldq_raw(addr) - -#define stb_data(addr, data) stb_raw(addr, data) -#define stw_data(addr, data) stw_raw(addr, data) -#define stl_data(addr, data) stl_raw(addr, data) -#define stq_data(addr, data) stq_raw(addr, data) -#endif - -#define WRAP_LD(rettype, fn) \ - rettype cpu_ ## fn(CPUX86State *env1, target_ulong addr) \ - { \ - CPUX86State *saved_env; \ - rettype ret; \ - \ - saved_env = env; \ - env = env1; \ - ret = fn(addr); \ - env = saved_env; \ - return ret; \ - } - -WRAP_LD(uint32_t, ldub_data) -WRAP_LD(uint32_t, lduw_data) -WRAP_LD(uint32_t, ldl_data) -WRAP_LD(uint64_t, ldq_data) - -WRAP_LD(uint32_t, ldub_kernel) -WRAP_LD(uint32_t, lduw_kernel) -WRAP_LD(uint32_t, ldl_kernel) -WRAP_LD(uint64_t, ldq_kernel) -#undef WRAP_LD - -#define WRAP_ST(datatype, fn) \ - void cpu_ ## fn(CPUX86State *env1, target_ulong addr, datatype val) \ - { \ - CPUX86State *saved_env; \ - \ - saved_env = env; \ - env = env1; \ - fn(addr, val); \ - env = saved_env; \ - } - -WRAP_ST(uint32_t, stb_data) -WRAP_ST(uint32_t, stw_data) -WRAP_ST(uint32_t, stl_data) -WRAP_ST(uint64_t, stq_data) - -WRAP_ST(uint32_t, stb_kernel) -WRAP_ST(uint32_t, stw_kernel) -WRAP_ST(uint32_t, stl_kernel) -WRAP_ST(uint64_t, stq_kernel) -#undef WRAP_ST diff --git a/target-i386/misc_helper.c b/target-i386/misc_helper.c index 154601b..a020379 100644 --- a/target-i386/misc_helper.c +++ b/target-i386/misc_helper.c @@ -21,6 +21,10 @@ #include "ioport.h" #include "helper.h" +#if !defined(CONFIG_USER_ONLY) +#include "softmmu_exec.h" +#endif /* !defined(CONFIG_USER_ONLY) */ + /* check if Port I/O is allowed in TSS */ static inline void check_io(CPUX86State *env, int addr, int size) { diff --git a/target-i386/seg_helper.c b/target-i386/seg_helper.c index f136128..5fff8d5 100644 --- a/target-i386/seg_helper.c +++ b/target-i386/seg_helper.c @@ -24,6 +24,10 @@ //#define DEBUG_PCALL +#if !defined(CONFIG_USER_ONLY) +#include "softmmu_exec.h" +#endif /* !defined(CONFIG_USER_ONLY) */ + #ifdef DEBUG_PCALL # define LOG_PCALL(...) qemu_log_mask(CPU_LOG_PCALL, ## __VA_ARGS__) # define LOG_PCALL_STATE(env) \ diff --git a/target-i386/svm_helper.c b/target-i386/svm_helper.c index f370ac5..4943c37 100644 --- a/target-i386/svm_helper.c +++ b/target-i386/svm_helper.c @@ -21,6 +21,10 @@ #include "cpu-all.h" #include "helper.h" +#if !defined(CONFIG_USER_ONLY) +#include "softmmu_exec.h" +#endif /* !defined(CONFIG_USER_ONLY) */ + /* Secure Virtual Machine helpers */ #if defined(CONFIG_USER_ONLY) diff --git a/target-i386/translate.c b/target-i386/translate.c index 26091f9..7ab2ccb 100644 --- a/target-i386/translate.c +++ b/target-i386/translate.c @@ -2043,7 +2043,7 @@ static void gen_lea_modrm(DisasContext *s, int modrm, int *reg_ptr, int *offset_ if (base == 4) { havesib = 1; - code = ldub_code(s->pc++); + code = cpu_ldub_code(cpu_single_env, s->pc++); scale = (code >> 6) & 3; index = ((code >> 3) & 7) | REX_X(s); base = (code & 7); @@ -2054,7 +2054,7 @@ static void gen_lea_modrm(DisasContext *s, int modrm, int *reg_ptr, int *offset_ case 0: if ((base & 7) == 5) { base = -1; - disp = (int32_t)ldl_code(s->pc); + disp = (int32_t)cpu_ldl_code(cpu_single_env, s->pc); s->pc += 4; if (CODE64(s) && !havesib) { disp += s->pc + s->rip_offset; @@ -2064,11 +2064,11 @@ static void gen_lea_modrm(DisasContext *s, int modrm, int *reg_ptr, int *offset_ } break; case 1: - disp = (int8_t)ldub_code(s->pc++); + disp = (int8_t)cpu_ldub_code(cpu_single_env, s->pc++); break; default: case 2: - disp = (int32_t)ldl_code(s->pc); + disp = (int32_t)cpu_ldl_code(cpu_single_env, s->pc); s->pc += 4; break; } @@ -2131,7 +2131,7 @@ static void gen_lea_modrm(DisasContext *s, int modrm, int *reg_ptr, int *offset_ switch (mod) { case 0: if (rm == 6) { - disp = lduw_code(s->pc); + disp = cpu_lduw_code(cpu_single_env, s->pc); s->pc += 2; gen_op_movl_A0_im(disp); rm = 0; /* avoid SS override */ @@ -2141,11 +2141,11 @@ static void gen_lea_modrm(DisasContext *s, int modrm, int *reg_ptr, int *offset_ } break; case 1: - disp = (int8_t)ldub_code(s->pc++); + disp = (int8_t)cpu_ldub_code(cpu_single_env, s->pc++); break; default: case 2: - disp = lduw_code(s->pc); + disp = cpu_lduw_code(cpu_single_env, s->pc); s->pc += 2; break; } @@ -2215,7 +2215,7 @@ static void gen_nop_modrm(DisasContext *s, int modrm) base = rm; if (base == 4) { - code = ldub_code(s->pc++); + code = cpu_ldub_code(cpu_single_env, s->pc++); base = (code & 7); } @@ -2311,16 +2311,16 @@ static inline uint32_t insn_get(DisasContext *s, int ot) switch(ot) { case OT_BYTE: - ret = ldub_code(s->pc); + ret = cpu_ldub_code(cpu_single_env, s->pc); s->pc++; break; case OT_WORD: - ret = lduw_code(s->pc); + ret = cpu_lduw_code(cpu_single_env, s->pc); s->pc += 2; break; default: case OT_LONG: - ret = ldl_code(s->pc); + ret = cpu_ldl_code(cpu_single_env, s->pc); s->pc += 4; break; } @@ -3229,7 +3229,7 @@ static void gen_sse(DisasContext *s, int b, target_ulong pc_start, int rex_r) gen_helper_enter_mmx(cpu_env); } - modrm = ldub_code(s->pc++); + modrm = cpu_ldub_code(cpu_single_env, s->pc++); reg = ((modrm >> 3) & 7); if (is_xmm) reg |= rex_r; @@ -3433,8 +3433,8 @@ static void gen_sse(DisasContext *s, int b, target_ulong pc_start, int rex_r) if (b1 == 1 && reg != 0) goto illegal_op; - field_length = ldub_code(s->pc++) & 0x3F; - bit_index = ldub_code(s->pc++) & 0x3F; + field_length = cpu_ldub_code(cpu_single_env, s->pc++) & 0x3F; + bit_index = cpu_ldub_code(cpu_single_env, s->pc++) & 0x3F; tcg_gen_addi_ptr(cpu_ptr0, cpu_env, offsetof(CPUX86State,xmm_regs[reg])); if (b1 == 1) @@ -3559,7 +3559,7 @@ static void gen_sse(DisasContext *s, int b, target_ulong pc_start, int rex_r) if (b1 >= 2) { goto illegal_op; } - val = ldub_code(s->pc++); + val = cpu_ldub_code(cpu_single_env, s->pc++); if (is_xmm) { gen_op_movl_T0_im(val); tcg_gen_st32_tl(cpu_T[0], cpu_env, offsetof(CPUX86State,xmm_t0.XMM_L(0))); @@ -3718,7 +3718,7 @@ static void gen_sse(DisasContext *s, int b, target_ulong pc_start, int rex_r) case 0x1c4: s->rip_offset = 1; gen_ldst_modrm(s, modrm, OT_WORD, OR_TMP0, 0); - val = ldub_code(s->pc++); + val = cpu_ldub_code(cpu_single_env, s->pc++); if (b1) { val &= 7; tcg_gen_st16_tl(cpu_T[0], cpu_env, @@ -3734,7 +3734,7 @@ static void gen_sse(DisasContext *s, int b, target_ulong pc_start, int rex_r) if (mod != 3) goto illegal_op; ot = (s->dflag == 2) ? OT_QUAD : OT_LONG; - val = ldub_code(s->pc++); + val = cpu_ldub_code(cpu_single_env, s->pc++); if (b1) { val &= 7; rm = (modrm & 7) | REX_B(s); @@ -3795,7 +3795,7 @@ static void gen_sse(DisasContext *s, int b, target_ulong pc_start, int rex_r) goto crc32; case 0x038: b = modrm; - modrm = ldub_code(s->pc++); + modrm = cpu_ldub_code(cpu_single_env, s->pc++); rm = modrm & 7; reg = ((modrm >> 3) & 7) | rex_r; mod = (modrm >> 6) & 3; @@ -3869,7 +3869,7 @@ static void gen_sse(DisasContext *s, int b, target_ulong pc_start, int rex_r) case 0x338: /* crc32 */ crc32: b = modrm; - modrm = ldub_code(s->pc++); + modrm = cpu_ldub_code(cpu_single_env, s->pc++); reg = ((modrm >> 3) & 7) | rex_r; if (b != 0xf0 && b != 0xf1) @@ -3899,7 +3899,7 @@ static void gen_sse(DisasContext *s, int b, target_ulong pc_start, int rex_r) case 0x03a: case 0x13a: b = modrm; - modrm = ldub_code(s->pc++); + modrm = cpu_ldub_code(cpu_single_env, s->pc++); rm = modrm & 7; reg = ((modrm >> 3) & 7) | rex_r; mod = (modrm >> 6) & 3; @@ -3920,7 +3920,7 @@ static void gen_sse(DisasContext *s, int b, target_ulong pc_start, int rex_r) if (mod != 3) gen_lea_modrm(s, modrm, ®_addr, &offset_addr); reg = ((modrm >> 3) & 7) | rex_r; - val = ldub_code(s->pc++); + val = cpu_ldub_code(cpu_single_env, s->pc++); switch (b) { case 0x14: /* pextrb */ tcg_gen_ld8u_tl(cpu_T[0], cpu_env, offsetof(CPUX86State, @@ -4063,7 +4063,7 @@ static void gen_sse(DisasContext *s, int b, target_ulong pc_start, int rex_r) gen_ldq_env_A0(s->mem_index, op2_offset); } } - val = ldub_code(s->pc++); + val = cpu_ldub_code(cpu_single_env, s->pc++); if ((b & 0xfc) == 0x60) { /* pcmpXstrX */ s->cc_op = CC_OP_EFLAGS; @@ -4129,7 +4129,7 @@ static void gen_sse(DisasContext *s, int b, target_ulong pc_start, int rex_r) case 0x0f: /* 3DNow! data insns */ if (!(s->cpuid_ext2_features & CPUID_EXT2_3DNOW)) goto illegal_op; - val = ldub_code(s->pc++); + val = cpu_ldub_code(cpu_single_env, s->pc++); sse_fn_epp = sse_op_table5[val]; if (!sse_fn_epp) { goto illegal_op; @@ -4140,7 +4140,7 @@ static void gen_sse(DisasContext *s, int b, target_ulong pc_start, int rex_r) break; case 0x70: /* pshufx insn */ case 0xc6: /* pshufx insn */ - val = ldub_code(s->pc++); + val = cpu_ldub_code(cpu_single_env, s->pc++); tcg_gen_addi_ptr(cpu_ptr0, cpu_env, op1_offset); tcg_gen_addi_ptr(cpu_ptr1, cpu_env, op2_offset); /* XXX: introduce a new table? */ @@ -4149,7 +4149,7 @@ static void gen_sse(DisasContext *s, int b, target_ulong pc_start, int rex_r) break; case 0xc2: /* compare insns */ - val = ldub_code(s->pc++); + val = cpu_ldub_code(cpu_single_env, s->pc++); if (val >= 8) goto illegal_op; sse_fn_epp = sse_op_table4[val][b1]; @@ -4218,7 +4218,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) #endif s->rip_offset = 0; /* for relative ip address */ next_byte: - b = ldub_code(s->pc); + b = cpu_ldub_code(cpu_single_env, s->pc); s->pc++; /* check prefixes */ #ifdef TARGET_X86_64 @@ -4333,7 +4333,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) case 0x0f: /**************************/ /* extended op code */ - b = ldub_code(s->pc++) | 0x100; + b = cpu_ldub_code(cpu_single_env, s->pc++) | 0x100; goto reswitch; /**************************/ @@ -4358,7 +4358,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) switch(f) { case 0: /* OP Ev, Gv */ - modrm = ldub_code(s->pc++); + modrm = cpu_ldub_code(cpu_single_env, s->pc++); reg = ((modrm >> 3) & 7) | rex_r; mod = (modrm >> 6) & 3; rm = (modrm & 7) | REX_B(s); @@ -4380,7 +4380,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) gen_op(s, op, ot, opreg); break; case 1: /* OP Gv, Ev */ - modrm = ldub_code(s->pc++); + modrm = cpu_ldub_code(cpu_single_env, s->pc++); mod = (modrm >> 6) & 3; reg = ((modrm >> 3) & 7) | rex_r; rm = (modrm & 7) | REX_B(s); @@ -4417,7 +4417,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) else ot = dflag + OT_WORD; - modrm = ldub_code(s->pc++); + modrm = cpu_ldub_code(cpu_single_env, s->pc++); mod = (modrm >> 6) & 3; rm = (modrm & 7) | REX_B(s); op = (modrm >> 3) & 7; @@ -4466,7 +4466,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) else ot = dflag + OT_WORD; - modrm = ldub_code(s->pc++); + modrm = cpu_ldub_code(cpu_single_env, s->pc++); mod = (modrm >> 6) & 3; rm = (modrm & 7) | REX_B(s); op = (modrm >> 3) & 7; @@ -4698,7 +4698,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) else ot = dflag + OT_WORD; - modrm = ldub_code(s->pc++); + modrm = cpu_ldub_code(cpu_single_env, s->pc++); mod = (modrm >> 6) & 3; rm = (modrm & 7) | REX_B(s); op = (modrm >> 3) & 7; @@ -4810,7 +4810,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) else ot = dflag + OT_WORD; - modrm = ldub_code(s->pc++); + modrm = cpu_ldub_code(cpu_single_env, s->pc++); reg = ((modrm >> 3) & 7) | rex_r; gen_ldst_modrm(s, modrm, ot, OR_TMP0, 0); @@ -4875,7 +4875,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) case 0x69: /* imul Gv, Ev, I */ case 0x6b: ot = dflag + OT_WORD; - modrm = ldub_code(s->pc++); + modrm = cpu_ldub_code(cpu_single_env, s->pc++); reg = ((modrm >> 3) & 7) | rex_r; if (b == 0x69) s->rip_offset = insn_const_size(ot); @@ -4939,7 +4939,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) ot = OT_BYTE; else ot = dflag + OT_WORD; - modrm = ldub_code(s->pc++); + modrm = cpu_ldub_code(cpu_single_env, s->pc++); reg = ((modrm >> 3) & 7) | rex_r; mod = (modrm >> 6) & 3; if (mod == 3) { @@ -4970,7 +4970,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) ot = OT_BYTE; else ot = dflag + OT_WORD; - modrm = ldub_code(s->pc++); + modrm = cpu_ldub_code(cpu_single_env, s->pc++); reg = ((modrm >> 3) & 7) | rex_r; mod = (modrm >> 6) & 3; t0 = tcg_temp_local_new(); @@ -5018,7 +5018,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) } break; case 0x1c7: /* cmpxchg8b */ - modrm = ldub_code(s->pc++); + modrm = cpu_ldub_code(cpu_single_env, s->pc++); mod = (modrm >> 6) & 3; if ((mod == 3) || ((modrm & 0x38) != 0x8)) goto illegal_op; @@ -5030,7 +5030,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) if (s->cc_op != CC_OP_DYNAMIC) gen_op_set_cc_op(s->cc_op); gen_lea_modrm(s, modrm, ®_addr, &offset_addr); - gen_helper_cmpxchg16b(cpu_A0); + gen_helper_cmpxchg16b(cpu_env, cpu_A0); } else #endif { @@ -5040,7 +5040,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) if (s->cc_op != CC_OP_DYNAMIC) gen_op_set_cc_op(s->cc_op); gen_lea_modrm(s, modrm, ®_addr, &offset_addr); - gen_helper_cmpxchg8b(cpu_A0); + gen_helper_cmpxchg8b(cpu_env, cpu_A0); } s->cc_op = CC_OP_EFLAGS; break; @@ -5092,7 +5092,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) } else { ot = dflag + OT_WORD; } - modrm = ldub_code(s->pc++); + modrm = cpu_ldub_code(cpu_single_env, s->pc++); mod = (modrm >> 6) & 3; gen_pop_T0(s); if (mod == 3) { @@ -5111,9 +5111,9 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) case 0xc8: /* enter */ { int level; - val = lduw_code(s->pc); + val = cpu_lduw_code(cpu_single_env, s->pc); s->pc += 2; - level = ldub_code(s->pc++); + level = cpu_ldub_code(cpu_single_env, s->pc++); gen_enter(s, val, level); } break; @@ -5193,7 +5193,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) ot = OT_BYTE; else ot = dflag + OT_WORD; - modrm = ldub_code(s->pc++); + modrm = cpu_ldub_code(cpu_single_env, s->pc++); reg = ((modrm >> 3) & 7) | rex_r; /* generate a generic store */ @@ -5205,7 +5205,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) ot = OT_BYTE; else ot = dflag + OT_WORD; - modrm = ldub_code(s->pc++); + modrm = cpu_ldub_code(cpu_single_env, s->pc++); mod = (modrm >> 6) & 3; if (mod != 3) { s->rip_offset = insn_const_size(ot); @@ -5224,14 +5224,14 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) ot = OT_BYTE; else ot = OT_WORD + dflag; - modrm = ldub_code(s->pc++); + modrm = cpu_ldub_code(cpu_single_env, s->pc++); reg = ((modrm >> 3) & 7) | rex_r; gen_ldst_modrm(s, modrm, ot, OR_TMP0, 0); gen_op_mov_reg_T0(ot, reg); break; case 0x8e: /* mov seg, Gv */ - modrm = ldub_code(s->pc++); + modrm = cpu_ldub_code(cpu_single_env, s->pc++); reg = (modrm >> 3) & 7; if (reg >= 6 || reg == R_CS) goto illegal_op; @@ -5251,7 +5251,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) } break; case 0x8c: /* mov Gv, seg */ - modrm = ldub_code(s->pc++); + modrm = cpu_ldub_code(cpu_single_env, s->pc++); reg = (modrm >> 3) & 7; mod = (modrm >> 6) & 3; if (reg >= 6) @@ -5274,7 +5274,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) d_ot = dflag + OT_WORD; /* ot is the size of source */ ot = (b & 1) + OT_BYTE; - modrm = ldub_code(s->pc++); + modrm = cpu_ldub_code(cpu_single_env, s->pc++); reg = ((modrm >> 3) & 7) | rex_r; mod = (modrm >> 6) & 3; rm = (modrm & 7) | REX_B(s); @@ -5311,7 +5311,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) case 0x8d: /* lea */ ot = dflag + OT_WORD; - modrm = ldub_code(s->pc++); + modrm = cpu_ldub_code(cpu_single_env, s->pc++); mod = (modrm >> 6) & 3; if (mod == 3) goto illegal_op; @@ -5338,7 +5338,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) ot = dflag + OT_WORD; #ifdef TARGET_X86_64 if (s->aflag == 2) { - offset_addr = ldq_code(s->pc); + offset_addr = cpu_ldq_code(cpu_single_env, s->pc); s->pc += 8; gen_op_movq_A0_im(offset_addr); } else @@ -5394,7 +5394,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) if (dflag == 2) { uint64_t tmp; /* 64 bit case */ - tmp = ldq_code(s->pc); + tmp = cpu_ldq_code(cpu_single_env, s->pc); s->pc += 8; reg = (b & 7) | REX_B(s); gen_movtl_T0_im(tmp); @@ -5422,7 +5422,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) ot = OT_BYTE; else ot = dflag + OT_WORD; - modrm = ldub_code(s->pc++); + modrm = cpu_ldub_code(cpu_single_env, s->pc++); reg = ((modrm >> 3) & 7) | rex_r; mod = (modrm >> 6) & 3; if (mod == 3) { @@ -5465,7 +5465,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) op = R_GS; do_lxx: ot = dflag ? OT_LONG : OT_WORD; - modrm = ldub_code(s->pc++); + modrm = cpu_ldub_code(cpu_single_env, s->pc++); reg = ((modrm >> 3) & 7) | rex_r; mod = (modrm >> 6) & 3; if (mod == 3) @@ -5497,7 +5497,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) else ot = dflag + OT_WORD; - modrm = ldub_code(s->pc++); + modrm = cpu_ldub_code(cpu_single_env, s->pc++); mod = (modrm >> 6) & 3; op = (modrm >> 3) & 7; @@ -5516,7 +5516,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) gen_shift(s, op, ot, opreg, OR_ECX); } else { if (shift == 2) { - shift = ldub_code(s->pc++); + shift = cpu_ldub_code(cpu_single_env, s->pc++); } gen_shifti(s, op, ot, opreg, shift); } @@ -5550,7 +5550,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) shift = 0; do_shiftd: ot = dflag + OT_WORD; - modrm = ldub_code(s->pc++); + modrm = cpu_ldub_code(cpu_single_env, s->pc++); mod = (modrm >> 6) & 3; rm = (modrm & 7) | REX_B(s); reg = ((modrm >> 3) & 7) | rex_r; @@ -5563,7 +5563,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) gen_op_mov_TN_reg(ot, 1, reg); if (shift) { - val = ldub_code(s->pc++); + val = cpu_ldub_code(cpu_single_env, s->pc++); tcg_gen_movi_tl(cpu_T3, val); } else { tcg_gen_mov_tl(cpu_T3, cpu_regs[R_ECX]); @@ -5580,7 +5580,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) gen_exception(s, EXCP07_PREX, pc_start - s->cs_base); break; } - modrm = ldub_code(s->pc++); + modrm = cpu_ldub_code(cpu_single_env, s->pc++); mod = (modrm >> 6) & 3; rm = modrm & 7; op = ((b & 7) << 3) | ((modrm >> 3) & 7); @@ -6211,7 +6211,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) ot = OT_BYTE; else ot = dflag ? OT_LONG : OT_WORD; - val = ldub_code(s->pc++); + val = cpu_ldub_code(cpu_single_env, s->pc++); gen_op_movl_T0_im(val); gen_check_io(s, ot, pc_start - s->cs_base, SVM_IOIO_TYPE_MASK | svm_is_rep(prefixes)); @@ -6231,7 +6231,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) ot = OT_BYTE; else ot = dflag ? OT_LONG : OT_WORD; - val = ldub_code(s->pc++); + val = cpu_ldub_code(cpu_single_env, s->pc++); gen_op_movl_T0_im(val); gen_check_io(s, ot, pc_start - s->cs_base, svm_is_rep(prefixes)); @@ -6293,7 +6293,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) /************************/ /* control */ case 0xc2: /* ret im */ - val = ldsw_code(s->pc); + val = cpu_ldsw_code(cpu_single_env, s->pc); s->pc += 2; gen_pop_T0(s); if (CODE64(s) && s->dflag) @@ -6313,7 +6313,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) gen_eob(s); break; case 0xca: /* lret im */ - val = ldsw_code(s->pc); + val = cpu_ldsw_code(cpu_single_env, s->pc); s->pc += 2; do_lret: if (s->pe && !s->vm86) { @@ -6448,7 +6448,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) break; case 0x190 ... 0x19f: /* setcc Gv */ - modrm = ldub_code(s->pc++); + modrm = cpu_ldub_code(cpu_single_env, s->pc++); gen_setcc(s, b); gen_ldst_modrm(s, modrm, OT_BYTE, OR_TMP0, 1); break; @@ -6458,7 +6458,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) TCGv t0; ot = dflag + OT_WORD; - modrm = ldub_code(s->pc++); + modrm = cpu_ldub_code(cpu_single_env, s->pc++); reg = ((modrm >> 3) & 7) | rex_r; mod = (modrm >> 6) & 3; t0 = tcg_temp_local_new(); @@ -6616,7 +6616,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) /* bit operations */ case 0x1ba: /* bt/bts/btr/btc Gv, im */ ot = dflag + OT_WORD; - modrm = ldub_code(s->pc++); + modrm = cpu_ldub_code(cpu_single_env, s->pc++); op = (modrm >> 3) & 7; mod = (modrm >> 6) & 3; rm = (modrm & 7) | REX_B(s); @@ -6628,7 +6628,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) gen_op_mov_TN_reg(ot, 0, rm); } /* load shift */ - val = ldub_code(s->pc++); + val = cpu_ldub_code(cpu_single_env, s->pc++); gen_op_movl_T1_im(val); if (op < 4) goto illegal_op; @@ -6647,7 +6647,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) op = 3; do_btx: ot = dflag + OT_WORD; - modrm = ldub_code(s->pc++); + modrm = cpu_ldub_code(cpu_single_env, s->pc++); reg = ((modrm >> 3) & 7) | rex_r; mod = (modrm >> 6) & 3; rm = (modrm & 7) | REX_B(s); @@ -6708,7 +6708,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) TCGv t0; ot = dflag + OT_WORD; - modrm = ldub_code(s->pc++); + modrm = cpu_ldub_code(cpu_single_env, s->pc++); reg = ((modrm >> 3) & 7) | rex_r; gen_ldst_modrm(s,modrm, ot, OR_TMP0, 0); gen_extu(ot, cpu_T[0]); @@ -6780,7 +6780,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) case 0xd4: /* aam */ if (CODE64(s)) goto illegal_op; - val = ldub_code(s->pc++); + val = cpu_ldub_code(cpu_single_env, s->pc++); if (val == 0) { gen_exception(s, EXCP00_DIVZ, pc_start - s->cs_base); } else { @@ -6791,7 +6791,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) case 0xd5: /* aad */ if (CODE64(s)) goto illegal_op; - val = ldub_code(s->pc++); + val = cpu_ldub_code(cpu_single_env, s->pc++); gen_helper_aad(cpu_env, tcg_const_i32(val)); s->cc_op = CC_OP_LOGICB; break; @@ -6825,7 +6825,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) gen_interrupt(s, EXCP03_INT3, pc_start - s->cs_base, s->pc - s->cs_base); break; case 0xcd: /* int N */ - val = ldub_code(s->pc++); + val = cpu_ldub_code(cpu_single_env, s->pc++); if (s->vm86 && s->iopl != 3) { gen_exception(s, EXCP0D_GPF, pc_start - s->cs_base); } else { @@ -6895,7 +6895,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) if (CODE64(s)) goto illegal_op; ot = dflag ? OT_LONG : OT_WORD; - modrm = ldub_code(s->pc++); + modrm = cpu_ldub_code(cpu_single_env, s->pc++); reg = (modrm >> 3) & 7; mod = (modrm >> 6) & 3; if (mod == 3) @@ -6904,10 +6904,11 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) gen_lea_modrm(s, modrm, ®_addr, &offset_addr); gen_jmp_im(pc_start - s->cs_base); tcg_gen_trunc_tl_i32(cpu_tmp2_i32, cpu_T[0]); - if (ot == OT_WORD) - gen_helper_boundw(cpu_A0, cpu_tmp2_i32); - else - gen_helper_boundl(cpu_A0, cpu_tmp2_i32); + if (ot == OT_WORD) { + gen_helper_boundw(cpu_env, cpu_A0, cpu_tmp2_i32); + } else { + gen_helper_boundl(cpu_env, cpu_A0, cpu_tmp2_i32); + } break; case 0x1c8 ... 0x1cf: /* bswap reg */ reg = (b & 7) | REX_B(s); @@ -7085,7 +7086,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) } break; case 0x100: - modrm = ldub_code(s->pc++); + modrm = cpu_ldub_code(cpu_single_env, s->pc++); mod = (modrm >> 6) & 3; op = (modrm >> 3) & 7; switch(op) { @@ -7154,7 +7155,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) } break; case 0x101: - modrm = ldub_code(s->pc++); + modrm = cpu_ldub_code(cpu_single_env, s->pc++); mod = (modrm >> 6) & 3; op = (modrm >> 3) & 7; rm = modrm & 7; @@ -7421,7 +7422,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) /* d_ot is the size of destination */ d_ot = dflag + OT_WORD; - modrm = ldub_code(s->pc++); + modrm = cpu_ldub_code(cpu_single_env, s->pc++); reg = ((modrm >> 3) & 7) | rex_r; mod = (modrm >> 6) & 3; rm = (modrm & 7) | REX_B(s); @@ -7453,7 +7454,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) t1 = tcg_temp_local_new(); t2 = tcg_temp_local_new(); ot = OT_WORD; - modrm = ldub_code(s->pc++); + modrm = cpu_ldub_code(cpu_single_env, s->pc++); reg = (modrm >> 3) & 7; mod = (modrm >> 6) & 3; rm = modrm & 7; @@ -7501,7 +7502,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) if (!s->pe || s->vm86) goto illegal_op; ot = dflag ? OT_LONG : OT_WORD; - modrm = ldub_code(s->pc++); + modrm = cpu_ldub_code(cpu_single_env, s->pc++); reg = ((modrm >> 3) & 7) | rex_r; gen_ldst_modrm(s, modrm, OT_WORD, OR_TMP0, 0); t0 = tcg_temp_local_new(); @@ -7522,7 +7523,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) } break; case 0x118: - modrm = ldub_code(s->pc++); + modrm = cpu_ldub_code(cpu_single_env, s->pc++); mod = (modrm >> 6) & 3; op = (modrm >> 3) & 7; switch(op) { @@ -7541,7 +7542,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) } break; case 0x119 ... 0x11f: /* nop (multi byte) */ - modrm = ldub_code(s->pc++); + modrm = cpu_ldub_code(cpu_single_env, s->pc++); gen_nop_modrm(s, modrm); break; case 0x120: /* mov reg, crN */ @@ -7549,7 +7550,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) if (s->cpl != 0) { gen_exception(s, EXCP0D_GPF, pc_start - s->cs_base); } else { - modrm = ldub_code(s->pc++); + modrm = cpu_ldub_code(cpu_single_env, s->pc++); if ((modrm & 0xc0) != 0xc0) goto illegal_op; rm = (modrm & 7) | REX_B(s); @@ -7592,7 +7593,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) if (s->cpl != 0) { gen_exception(s, EXCP0D_GPF, pc_start - s->cs_base); } else { - modrm = ldub_code(s->pc++); + modrm = cpu_ldub_code(cpu_single_env, s->pc++); if ((modrm & 0xc0) != 0xc0) goto illegal_op; rm = (modrm & 7) | REX_B(s); @@ -7633,7 +7634,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) if (!(s->cpuid_features & CPUID_SSE2)) goto illegal_op; ot = s->dflag == 2 ? OT_QUAD : OT_LONG; - modrm = ldub_code(s->pc++); + modrm = cpu_ldub_code(cpu_single_env, s->pc++); mod = (modrm >> 6) & 3; if (mod == 3) goto illegal_op; @@ -7642,7 +7643,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) gen_ldst_modrm(s, modrm, ot, reg, 1); break; case 0x1ae: - modrm = ldub_code(s->pc++); + modrm = cpu_ldub_code(cpu_single_env, s->pc++); mod = (modrm >> 6) & 3; op = (modrm >> 3) & 7; switch(op) { @@ -7717,7 +7718,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) } break; case 0x10d: /* 3DNow! prefetch(w) */ - modrm = ldub_code(s->pc++); + modrm = cpu_ldub_code(cpu_single_env, s->pc++); mod = (modrm >> 6) & 3; if (mod == 3) goto illegal_op; @@ -7740,7 +7741,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) if (!(s->cpuid_ext_features & CPUID_EXT_POPCNT)) goto illegal_op; - modrm = ldub_code(s->pc++); + modrm = cpu_ldub_code(cpu_single_env, s->pc++); reg = ((modrm >> 3) & 7); if (s->prefix & PREFIX_DATA) -- cgit v1.1 From ca6190673c90e283897740b243f6508055c9de5a Mon Sep 17 00:00:00 2001 From: Jing Huang Date: Tue, 24 Jul 2012 13:58:02 +0000 Subject: linux-user: pass sockaddr from host to target Signed-off-by: Jing Huang Reviewed-by: Peter Maydell Signed-off-by: Peter Maydell --- linux-user/syscall.c | 16 +++++++++++++--- 1 file changed, 13 insertions(+), 3 deletions(-) diff --git a/linux-user/syscall.c b/linux-user/syscall.c index 8a06131..4bc11f1 100644 --- a/linux-user/syscall.c +++ b/linux-user/syscall.c @@ -1268,7 +1268,6 @@ static inline abi_long host_to_target_sockaddr(abi_ulong target_addr, return 0; } -/* ??? Should this also swap msgh->name? */ static inline abi_long target_to_host_cmsg(struct msghdr *msgh, struct target_msghdr *target_msgh) { @@ -1325,7 +1324,6 @@ static inline abi_long target_to_host_cmsg(struct msghdr *msgh, return 0; } -/* ??? Should this also swap msgh->name? */ static inline abi_long host_to_target_cmsg(struct target_msghdr *target_msgh, struct msghdr *msgh) { @@ -1885,10 +1883,22 @@ static abi_long do_sendrecvmsg(int fd, abi_ulong target_msg, if (!is_error(ret)) { len = ret; ret = host_to_target_cmsg(msgp, &msg); - if (!is_error(ret)) + if (!is_error(ret)) { + msgp->msg_namelen = tswap32(msg.msg_namelen); + if (msg.msg_name != NULL) { + ret = host_to_target_sockaddr(tswapal(msgp->msg_name), + msg.msg_name, msg.msg_namelen); + if (ret) { + goto out; + } + } + ret = len; + } } } + +out: unlock_iovec(vec, target_vec, count, !send); unlock_user_struct(msgp, target_msg, send ? 0 : 1); return ret; -- cgit v1.1 From 920394db819e30fbbfa527f25e45360061d1a220 Mon Sep 17 00:00:00 2001 From: Jing Huang Date: Tue, 24 Jul 2012 13:59:23 +0000 Subject: linux-user: make do_setsockopt support SOL_RAW ICMP_FILTER socket option Signed-off-by: Jing Huang Reviewed-by: Peter Maydell Signed-off-by: Peter Maydell --- linux-user/syscall.c | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) diff --git a/linux-user/syscall.c b/linux-user/syscall.c index 4bc11f1..ae9c1d0 100644 --- a/linux-user/syscall.c +++ b/linux-user/syscall.c @@ -60,6 +60,7 @@ int __clone2(int (*fn)(void *), void *child_stack_base, #include #include #include +#include #include "qemu-common.h" #ifdef TARGET_GPROF #include @@ -1452,6 +1453,25 @@ static abi_long do_setsockopt(int sockfd, int level, int optname, goto unimplemented; } break; + case SOL_RAW: + switch (optname) { + case ICMP_FILTER: + /* struct icmp_filter takes an u32 value */ + if (optlen < sizeof(uint32_t)) { + return -TARGET_EINVAL; + } + + if (get_user_u32(val, optval_addr)) { + return -TARGET_EFAULT; + } + ret = get_errno(setsockopt(sockfd, level, optname, + &val, sizeof(val))); + break; + + default: + goto unimplemented; + } + break; case TARGET_SOL_SOCKET: switch (optname) { /* Options with 'int' argument. */ -- cgit v1.1 From aebf5bc727fa1837b3c5296c5325b560f19ed9ee Mon Sep 17 00:00:00 2001 From: Jing Huang Date: Tue, 24 Jul 2012 14:01:42 +0000 Subject: linux-user: make host_to_target_cmsg support SO_TIMESTAMP cmsg_type Signed-off-by: Jing Huang Reviewed-by: Peter Maydell Signed-off-by: Peter Maydell --- linux-user/syscall.c | 20 ++++++++++++++++---- 1 file changed, 16 insertions(+), 4 deletions(-) diff --git a/linux-user/syscall.c b/linux-user/syscall.c index ae9c1d0..41c869b 100644 --- a/linux-user/syscall.c +++ b/linux-user/syscall.c @@ -1359,16 +1359,28 @@ static inline abi_long host_to_target_cmsg(struct target_msghdr *target_msgh, target_cmsg->cmsg_type = tswap32(cmsg->cmsg_type); target_cmsg->cmsg_len = tswapal(TARGET_CMSG_LEN(len)); - if (cmsg->cmsg_level != TARGET_SOL_SOCKET || cmsg->cmsg_type != SCM_RIGHTS) { - gemu_log("Unsupported ancillary data: %d/%d\n", cmsg->cmsg_level, cmsg->cmsg_type); - memcpy(target_data, data, len); - } else { + if ((cmsg->cmsg_level == TARGET_SOL_SOCKET) && + (cmsg->cmsg_type == SCM_RIGHTS)) { int *fd = (int *)data; int *target_fd = (int *)target_data; int i, numfds = len / sizeof(int); for (i = 0; i < numfds; i++) target_fd[i] = tswap32(fd[i]); + } else if ((cmsg->cmsg_level == TARGET_SOL_SOCKET) && + (cmsg->cmsg_type == SO_TIMESTAMP) && + (len == sizeof(struct timeval))) { + /* copy struct timeval to target */ + struct timeval *tv = (struct timeval *)data; + struct target_timeval *target_tv = + (struct target_timeval *)target_data; + + target_tv->tv_sec = tswapal(tv->tv_sec); + target_tv->tv_usec = tswapal(tv->tv_usec); + } else { + gemu_log("Unsupported ancillary data: %d/%d\n", + cmsg->cmsg_level, cmsg->cmsg_type); + memcpy(target_data, data, len); } cmsg = CMSG_NXTHDR(msgh, cmsg); -- cgit v1.1 From cd8e407d24657569e0d6e323b2e8c274fafab590 Mon Sep 17 00:00:00 2001 From: Mike Frysinger Date: Mon, 9 Jul 2012 03:04:57 +0000 Subject: flatload: fix bss clearing The current bss clear logic assumes the target mmap address and host address are the same. Use g2h to translate from the target address space to the host so we can call memset on it. Signed-off-by: Mike Frysinger Reviewed-by: Peter Maydell Signed-off-by: Peter Maydell --- linux-user/flatload.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/linux-user/flatload.c b/linux-user/flatload.c index be79496..58f679e 100644 --- a/linux-user/flatload.c +++ b/linux-user/flatload.c @@ -660,7 +660,7 @@ static int load_flat_file(struct linux_binprm * bprm, } /* zero the BSS. */ - memset((void *)((unsigned long)datapos + data_len), 0, bss_len); + memset(g2h(datapos + data_len), 0, bss_len); return 0; } -- cgit v1.1 From dce104013d1b393d39a89c4417d7771d928c08f3 Mon Sep 17 00:00:00 2001 From: Meador Inge Date: Thu, 26 Jul 2012 16:50:01 +0000 Subject: linux-user: Factor out guest space probing into a function Signed-off-by: Meador Inge Reviewed-by: Peter Maydell Signed-off-by: Peter Maydell --- linux-user/elfload.c | 110 +++++++++++++++++++++++++++++++++++---------------- linux-user/qemu.h | 13 ++++++ 2 files changed, 90 insertions(+), 33 deletions(-) diff --git a/linux-user/elfload.c b/linux-user/elfload.c index 6b622d4..cbc7617 100644 --- a/linux-user/elfload.c +++ b/linux-user/elfload.c @@ -1426,6 +1426,73 @@ bool guest_validate_base(unsigned long guest_base) } #endif +unsigned long init_guest_space(unsigned long host_start, + unsigned long host_size, + unsigned long guest_start, + bool fixed) +{ + unsigned long current_start, real_start; + int flags; + + assert(host_start || host_size); + + /* If just a starting address is given, then just verify that + * address. */ + if (host_start && !host_size) { + if (guest_validate_base(host_start)) { + return host_start; + } else { + return (unsigned long)-1; + } + } + + /* Setup the initial flags and start address. */ + current_start = host_start & qemu_host_page_mask; + flags = MAP_ANONYMOUS | MAP_PRIVATE | MAP_NORESERVE; + if (fixed) { + flags |= MAP_FIXED; + } + + /* Otherwise, a non-zero size region of memory needs to be mapped + * and validated. */ + while (1) { + /* Do not use mmap_find_vma here because that is limited to the + * guest address space. We are going to make the + * guest address space fit whatever we're given. + */ + real_start = (unsigned long) + mmap((void *)current_start, host_size, PROT_NONE, flags, -1, 0); + if (real_start == (unsigned long)-1) { + return (unsigned long)-1; + } + + if ((real_start == current_start) + && guest_validate_base(real_start - guest_start)) { + break; + } + + /* That address didn't work. Unmap and try a different one. + * The address the host picked because is typically right at + * the top of the host address space and leaves the guest with + * no usable address space. Resort to a linear search. We + * already compensated for mmap_min_addr, so this should not + * happen often. Probably means we got unlucky and host + * address space randomization put a shared library somewhere + * inconvenient. + */ + munmap((void *)real_start, host_size); + current_start += qemu_host_page_size; + if (host_start == current_start) { + /* Theoretically possible if host doesn't have any suitably + * aligned areas. Normally the first mmap will fail. + */ + return (unsigned long)-1; + } + } + + return real_start; +} + static void probe_guest_base(const char *image_name, abi_ulong loaddr, abi_ulong hiaddr) { @@ -1452,46 +1519,23 @@ static void probe_guest_base(const char *image_name, } } host_size = hiaddr - loaddr; - while (1) { - /* Do not use mmap_find_vma here because that is limited to the - guest address space. We are going to make the - guest address space fit whatever we're given. */ - real_start = (unsigned long) - mmap((void *)host_start, host_size, PROT_NONE, - MAP_ANONYMOUS | MAP_PRIVATE | MAP_NORESERVE, -1, 0); - if (real_start == (unsigned long)-1) { - goto exit_perror; - } - guest_base = real_start - loaddr; - if ((real_start == host_start) && - guest_validate_base(guest_base)) { - break; - } - /* That address didn't work. Unmap and try a different one. - The address the host picked because is typically right at - the top of the host address space and leaves the guest with - no usable address space. Resort to a linear search. We - already compensated for mmap_min_addr, so this should not - happen often. Probably means we got unlucky and host - address space randomization put a shared library somewhere - inconvenient. */ - munmap((void *)real_start, host_size); - host_start += qemu_host_page_size; - if (host_start == loaddr) { - /* Theoretically possible if host doesn't have any suitably - aligned areas. Normally the first mmap will fail. */ - errmsg = "Unable to find space for application"; - goto exit_errmsg; - } + + /* Setup the initial guest memory space with ranges gleaned from + * the ELF image that is being loaded. + */ + real_start = init_guest_space(host_start, host_size, loaddr, false); + if (real_start == (unsigned long)-1) { + errmsg = "Unable to find space for application"; + goto exit_errmsg; } + guest_base = real_start - loaddr; + qemu_log("Relocating guest address space from 0x" TARGET_ABI_FMT_lx " to 0x%lx\n", loaddr, real_start); } return; -exit_perror: - errmsg = strerror(errno); exit_errmsg: fprintf(stderr, "%s: %s\n", image_name, errmsg); exit(-1); diff --git a/linux-user/qemu.h b/linux-user/qemu.h index 7b299b7..7d4e23e 100644 --- a/linux-user/qemu.h +++ b/linux-user/qemu.h @@ -210,6 +210,19 @@ void fork_end(int child); */ bool guest_validate_base(unsigned long guest_base); +/* Creates the initial guest address space in the host memory space using + * the given host start address hint and size. The guest_start parameter + * specifies the start address of the guest space. guest_base will be the + * difference between the host start address computed by this function and + * guest_start. If fixed is specified, then the mapped address space must + * start at host_start. The real start address of the mapped memory space is + * returned or -1 if there was an error. + */ +unsigned long init_guest_space(unsigned long host_start, + unsigned long host_size, + unsigned long guest_start, + bool fixed); + #include "qemu-log.h" /* strace.c */ -- cgit v1.1 From 806d102141b99d4f1e55a97d68b7ea8c8ba3129f Mon Sep 17 00:00:00 2001 From: Meador Inge Date: Thu, 26 Jul 2012 16:50:02 +0000 Subject: linux-user: Use init_guest_space when -R and -B are specified Roll the code used to initialize the guest memory space when -R or -B is used into 'init_guest_space' and then call 'init_guest_space' from the driver. This way the reserved guest memory space can be probed for. Calling 'mmap' just once as is currently done is not guaranteed to succeed since the host address space validation might fail. Signed-off-by: Meador Inge [PMM: Fixed minor whitespace errors.] Reviewed-by: Peter Maydell Signed-off-by: Peter Maydell --- linux-user/elfload.c | 59 ++++++++++++++++++++++++++++++++++++++++++++-------- linux-user/main.c | 35 ++++++------------------------- linux-user/qemu.h | 6 ------ 3 files changed, 56 insertions(+), 44 deletions(-) diff --git a/linux-user/elfload.c b/linux-user/elfload.c index cbc7617..819fdd5 100644 --- a/linux-user/elfload.c +++ b/linux-user/elfload.c @@ -332,9 +332,17 @@ enum ARM_HWCAP_ARM_VFPv3D16 = 1 << 13, }; -#define TARGET_HAS_GUEST_VALIDATE_BASE -/* We want the opportunity to check the suggested base */ -bool guest_validate_base(unsigned long guest_base) +#define TARGET_HAS_VALIDATE_GUEST_SPACE +/* Return 1 if the proposed guest space is suitable for the guest. + * Return 0 if the proposed guest space isn't suitable, but another + * address space should be tried. + * Return -1 if there is no way the proposed guest space can be + * valid regardless of the base. + * The guest code may leave a page mapped and populate it if the + * address is suitable. + */ +static int validate_guest_space(unsigned long guest_base, + unsigned long guest_size) { unsigned long real_start, test_page_addr; @@ -342,6 +350,15 @@ bool guest_validate_base(unsigned long guest_base) * commpage at 0xffff0fxx */ test_page_addr = guest_base + (0xffff0f00 & qemu_host_page_mask); + + /* If the commpage lies within the already allocated guest space, + * then there is no way we can allocate it. + */ + if (test_page_addr >= guest_base + && test_page_addr <= (guest_base + guest_size)) { + return -1; + } + /* Note it needs to be writeable to let us initialise it */ real_start = (unsigned long) mmap((void *)test_page_addr, qemu_host_page_size, @@ -1418,9 +1435,10 @@ static abi_ulong create_elf_tables(abi_ulong p, int argc, int envc, return sp; } -#ifndef TARGET_HAS_GUEST_VALIDATE_BASE +#ifndef TARGET_HAS_VALIDATE_GUEST_SPACE /* If the guest doesn't have a validation function just agree */ -bool guest_validate_base(unsigned long guest_base) +static int validate_guest_space(unsigned long guest_base, + unsigned long guest_size) { return 1; } @@ -1439,7 +1457,7 @@ unsigned long init_guest_space(unsigned long host_start, /* If just a starting address is given, then just verify that * address. */ if (host_start && !host_size) { - if (guest_validate_base(host_start)) { + if (validate_guest_space(host_start, host_size) == 1) { return host_start; } else { return (unsigned long)-1; @@ -1456,6 +1474,8 @@ unsigned long init_guest_space(unsigned long host_start, /* Otherwise, a non-zero size region of memory needs to be mapped * and validated. */ while (1) { + unsigned long real_size = host_size; + /* Do not use mmap_find_vma here because that is limited to the * guest address space. We are going to make the * guest address space fit whatever we're given. @@ -1466,9 +1486,28 @@ unsigned long init_guest_space(unsigned long host_start, return (unsigned long)-1; } - if ((real_start == current_start) - && guest_validate_base(real_start - guest_start)) { - break; + /* Ensure the address is properly aligned. */ + if (real_start & ~qemu_host_page_mask) { + munmap((void *)real_start, host_size); + real_size = host_size + qemu_host_page_size; + real_start = (unsigned long) + mmap((void *)real_start, real_size, PROT_NONE, flags, -1, 0); + if (real_start == (unsigned long)-1) { + return (unsigned long)-1; + } + real_start = HOST_PAGE_ALIGN(real_start); + } + + /* Check to see if the address is valid. */ + if (!host_start || real_start == current_start) { + int valid = validate_guest_space(real_start - guest_start, + real_size); + if (valid == 1) { + break; + } else if (valid == -1) { + return (unsigned long)-1; + } + /* valid == 0, so try again. */ } /* That address didn't work. Unmap and try a different one. @@ -1490,6 +1529,8 @@ unsigned long init_guest_space(unsigned long host_start, } } + qemu_log("Reserved 0x%lx bytes of guest address space\n", host_size); + return real_start; } diff --git a/linux-user/main.c b/linux-user/main.c index 9d921aa..63c1249 100644 --- a/linux-user/main.c +++ b/linux-user/main.c @@ -3516,39 +3516,16 @@ int main(int argc, char **argv, char **envp) */ guest_base = HOST_PAGE_ALIGN(guest_base); - if (reserved_va) { - void *p; - int flags; - - flags = MAP_ANONYMOUS | MAP_PRIVATE | MAP_NORESERVE; - if (have_guest_base) { - flags |= MAP_FIXED; - } - p = mmap((void *)guest_base, reserved_va, PROT_NONE, flags, -1, 0); - if (p == MAP_FAILED) { + if (reserved_va || have_guest_base) { + guest_base = init_guest_space(guest_base, reserved_va, 0, + have_guest_base); + if (guest_base == (unsigned long)-1) { fprintf(stderr, "Unable to reserve guest address space\n"); exit(1); } - guest_base = (unsigned long)p; - /* Make sure the address is properly aligned. */ - if (guest_base & ~qemu_host_page_mask) { - munmap(p, reserved_va); - p = mmap((void *)guest_base, reserved_va + qemu_host_page_size, - PROT_NONE, flags, -1, 0); - if (p == MAP_FAILED) { - fprintf(stderr, "Unable to reserve guest address space\n"); - exit(1); - } - guest_base = HOST_PAGE_ALIGN((unsigned long)p); - } - qemu_log("Reserved 0x%lx bytes of guest address space\n", reserved_va); - mmap_next_start = reserved_va; - } - if (reserved_va || have_guest_base) { - if (!guest_validate_base(guest_base)) { - fprintf(stderr, "Guest base/Reserved VA rejected by guest code\n"); - exit(1); + if (reserved_va) { + mmap_next_start = reserved_va; } } #endif /* CONFIG_USE_GUEST_BASE */ diff --git a/linux-user/qemu.h b/linux-user/qemu.h index 7d4e23e..69b27d7 100644 --- a/linux-user/qemu.h +++ b/linux-user/qemu.h @@ -204,12 +204,6 @@ int get_osversion(void); void fork_start(void); void fork_end(int child); -/* Return true if the proposed guest_base is suitable for the guest. - * The guest code may leave a page mapped and populate it if the - * address is suitable. - */ -bool guest_validate_base(unsigned long guest_base); - /* Creates the initial guest address space in the host memory space using * the given host start address hint and size. The guest_start parameter * specifies the start address of the guest space. guest_base will be the -- cgit v1.1 From 3a1363acf9648bc26989b01b87c7c3c494df2138 Mon Sep 17 00:00:00 2001 From: Alexander Graf Date: Tue, 29 May 2012 05:30:26 +0000 Subject: linux-user: ARM: Ignore immediate value for svc in thumb mode When running in thumb mode, Linux doesn't evaluate the immediate value of the svc instruction, but instead just always assumes the syscall number to be in r7. This fixes executing go_bootstrap while building go for me. Signed-off-by: Alexander Graf Reviewed-by: Peter Maydell Signed-off-by: Peter Maydell --- linux-user/main.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/linux-user/main.c b/linux-user/main.c index 63c1249..7dea084 100644 --- a/linux-user/main.c +++ b/linux-user/main.c @@ -822,8 +822,7 @@ void cpu_loop(CPUARMState *env) } else if (n == ARM_NR_semihosting || n == ARM_NR_thumb_semihosting) { env->regs[0] = do_arm_semihosting (env); - } else if (n == 0 || n >= ARM_SYSCALL_BASE - || (env->thumb && n == ARM_THUMB_SYSCALL)) { + } else if (n == 0 || n >= ARM_SYSCALL_BASE || env->thumb) { /* linux syscall */ if (env->thumb || n == 0) { n = env->regs[7]; -- cgit v1.1