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2016-10-24char: remove explicit_fe_open, use a set_handlers argumentMarc-André Lureau2-5/+5
No need to keep explicit_fe_open around if it affects only a qemu_chr_fe_set_handlers(). Use an additional argument instead. Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Message-Id: <20161022095318.17775-24-marcandre.lureau@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2016-10-24tests: start chardev unit testsMarc-André Lureau2-0/+257
Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Message-Id: <20161022095318.17775-21-marcandre.lureau@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2016-10-24char: replace qemu_chr_claim/release with qemu_chr_fe_init/deinitMarc-André Lureau1-0/+1
Now that all front end use qemu_chr_fe_init(), we can move chardev claiming in init(), and add a function deinit() to release the chardev and cleanup handlers. The qemu_chr_fe_claim_no_fail() for property are gone, since the property will raise an error instead. In other cases, where there is already an error path, an error is raised instead. Finally, other cases are handled by &error_abort in qemu_chr_fe_init(). Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Message-Id: <20161022095318.17775-19-marcandre.lureau@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2016-10-24char: use qemu_chr_fe* functions with CharBackend argumentMarc-André Lureau1-16/+19
This also switches from qemu_chr_add_handlers() to qemu_chr_fe_set_handlers(). Note that qemu_chr_fe_set_handlers() now takes the focus when fe_open (qemu_chr_add_handlers() did take the focus) Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Message-Id: <20161022095318.17775-16-marcandre.lureau@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2016-10-24char: rename some frontend functionsMarc-André Lureau1-3/+3
qemu_chr_accept_input() and qemu_chr_disconnect() are only used by frontend, so use qemu_chr_fe prefix. Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Message-Id: <20161022095318.17775-14-marcandre.lureau@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2016-10-24char: remaining switch to CharBackend in frontendMarc-André Lureau1-18/+21
Similar to previous change, for the remaining CharDriverState front ends users. Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Message-Id: <20161022095318.17775-13-marcandre.lureau@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2016-10-24char: remove init callbackMarc-André Lureau1-1/+1
The CharDriverState.init() callback is no longer set since commit a61ae7f88ce and thus unused. The only user, the malta FGPA display has been converted to use an event "opened" callback instead. Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Message-Id: <20161022095318.17775-7-marcandre.lureau@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2016-10-24test-i386: fix bitrot for 64-bitPaolo Bonzini1-2/+2
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2016-10-24qht-bench: relax test_start/stop atomic accessesEmilio G. Cota1-3/+3
test_start/stop are used only as flags to loop on. Barriers are unnecessary, since no dependent data is transferred among threads apart from the flags themselves. This commit relaxes the three accesses to test_start/stop that were not yet relaxed. Signed-off-by: Emilio G. Cota <cota@braap.org>
2016-10-19crypto: fix initialization of crypto in testsDaniel P. Berrange2-10/+5
The test-io-channel-tls test was missing a call to qcrypto_init and test-crypto-hash was initializing it multiple times, Reviewed-by: Eric Blake <eblake@redhat.com> Signed-off-by: Daniel P. Berrange <berrange@redhat.com>
2016-10-19qtest: fix make check complaint in crypto moduleGonglei1-1/+4
CC tests/test-crypto-tlscredsx509.o CC tests/crypto-tls-x509-helpers.o CC tests/pkix_asn1_tab.o tests/pkix_asn1_tab.c:7:22: warning: libtasn1.h: No such file or directory tests/pkix_asn1_tab.c:9: error: expected ‘=’, ‘,’, ‘;’, ‘asm’ or ‘__attribute__’ before ‘pkix_asn1_tab’ make: *** [tests/pkix_asn1_tab.o] Error 1 Signed-off-by: Gonglei <arei.gonglei@huawei.com> Signed-off-by: Daniel P. Berrange <berrange@redhat.com>
2016-10-19crypto: add CTR mode supportGonglei1-0/+55
Introduce CTR mode support for the cipher APIs. CTR mode uses a counter rather than a traditional IV. The counter has additional properties, including a nonce and initial counter block. We reuse the ctx->iv as the counter for conveniences. Both libgcrypt and nettle are support CTR mode, the cipher-builtin doesn't support yet. Signed-off-by: Gonglei <arei.gonglei@huawei.com> Signed-off-by: Daniel P. Berrange <berrange@redhat.com>
2016-10-19crypto: extend mode as a parameter in qcrypto_cipher_supports()Gonglei1-1/+1
It can't guarantee all cipher modes are supported if one cipher algorithm is supported by a backend. Let's extend qcrypto_cipher_supports() to take both the algorithm and mode as parameters. Signed-off-by: Gonglei <arei.gonglei@huawei.com> Signed-off-by: Daniel P. Berrange <berrange@redhat.com>
2016-10-18Merge remote-tracking branch 'remotes/ehabkost/tags/x86-pull-request' into ↵Peter Maydell1-0/+44
staging x86 queue, 2016-10-17 # gpg: Signature made Mon 17 Oct 2016 18:51:07 BST # gpg: using RSA key 0x2807936F984DC5A6 # gpg: Good signature from "Eduardo Habkost <ehabkost@redhat.com>" # Primary key fingerprint: 5A32 2FD5 ABC4 D3DB ACCF D1AA 2807 936F 984D C5A6 * remotes/ehabkost/tags/x86-pull-request: (21 commits) target-i386: Don't use cpu->migratable when filtering features target-i386: Return runnability information on query-cpu-definitions target-i386: x86_cpu_load_features() function target-i386: Unset cannot_destroy_with_object_finalize_yet target-i386/kvm: cache the return value of kvm_enable_x2apic() intel_iommu: reject broken EIM intel_iommu: add OnOffAuto intr_eim as "eim" property intel_iommu: redo configuraton check in realize intel_iommu: pass whole remapped addresses to apic apic: add send_msi() to APICCommonClass apic: add global apic_get_class() target-i386: Move warning code outside x86_cpu_filter_features() qmp: Add runnability information to query-cpu-definitions target-i386: xsave: Add FP and SSE bits to x86_ext_save_areas target-i386: Register properties for feature aliases manually target-i386: Remove underscores from feat_names arrays target-i386: Make plus_features/minus_features QOM-based target-i386: Register aliases for feature names with underscores target-i386: Disable VME by default with TCG target-i386: List CPU models using subclass list ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-10-17tests: cleanup ptimer-testPaolo Bonzini3-13/+21
1) ptimer-test is not a qtest---it runs the ptimer.c code directly in the ptimer-test process 2) ptimer-test has its own stubs file, so there is no need to add more stubs to stubs/vmstate.c Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Reviewed-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-10-17tests: add a m25p80 testCédric Le Goater2-0/+254
This test uses the palmetto platform and the Aspeed SPI controller to test the m25p80 flash module device model. The flash model is defined by the platform (n25q256a) and it would be nice to find way to control it, using a property probably. Signed-off-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 1475787271-28794-1-git-send-email-clg@kaod.org Brainstormed-with: Greg Kurz <groug@kaod.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-10-17tests: Add test case for x86 feature parsing compatibilityEduardo Habkost1-0/+44
Add a new test case to ensure the existing behavior of the feature parsing code will be kept. Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
2016-10-17Merge remote-tracking branch 'remotes/dgibson/tags/ppc-for-2.8-20161017' ↵Peter Maydell12-122/+135
into staging ppc patch queue 2016-10-17 Highlights: * Significant rework of how PCI IO windows are placed for the pseries machine type * A number of extra tests added for ppc * Other tests clean up / fixed * Some cleanups to the XICS interrupt controller in preparation for the 'powernv' machine type A number of the test changes aren't strictly in ppc related code, but are included via my tree because they're primarily focused on improving test coverage for ppc. # gpg: Signature made Mon 17 Oct 2016 03:42:41 BST # gpg: using RSA key 0x6C38CACA20D9B392 # gpg: Good signature from "David Gibson <david@gibson.dropbear.id.au>" # gpg: aka "David Gibson (Red Hat) <dgibson@redhat.com>" # gpg: aka "David Gibson (ozlabs.org) <dgibson@ozlabs.org>" # gpg: aka "David Gibson (kernel.org) <dwg@kernel.org>" # Primary key fingerprint: 75F4 6586 AE61 A66C C44E 87DC 6C38 CACA 20D9 B392 * remotes/dgibson/tags/ppc-for-2.8-20161017: spapr: Improved placement of PCI host bridges in guest memory map spapr_pci: Add a 64-bit MMIO window spapr: Adjust placement of PCI host bridge to allow > 1TiB RAM spapr_pci: Delegate placement of PCI host bridges to machine type libqos: Limit spapr-pci to 32-bit MMIO for now libqos: Correct error in PCI hole sizing for spapr libqos: Isolate knowledge of spapr memory map to qpci_init_spapr() ppc/xics: Split ICS into ics-base and ics class ppc/xics: Make the ICSState a list spapr: fix inheritance chain for default machine options target-ppc: implement vexts[bh]2w and vexts[bhw]2d tests/boot-sector: Increase time-out to 90 seconds tests/boot-sector: Use mkstemp() to create a unique file name tests/boot-sector: Use minimum length for the Forth boot script qtest: ask endianness of the target in qtest_init() tests: minor cleanups in usb-hcd-uhci-test Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-10-17tests/docker/Makefile.include: add a generic docker-run targetAlex Bennée1-23/+38
This re-factors the docker makefile to include a docker-run target which can be controlled entirely from environment variables specified on the make command line. This allows us to run against any given docker image we may have in our repository, for example: make docker-run TEST="test-quick" IMAGE="debian:arm64" \ EXECUTABLE=./aarch64-linux-user/qemu-aarch64 The existing docker-foo@bar targets still work but the inline verification has been dropped because we already don't hit that due to other pattern rules in rules.mak. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20161011161625.9070-5-alex.bennee@linaro.org> Message-Id: <20161011161625.9070-6-alex.bennee@linaro.org> [Squash in the verification removal patch. - Fam] Signed-off-by: Fam Zheng <famz@redhat.com>
2016-10-17tests/docker: make test-mingw honour TARGET_LISTAlex Bennée1-1/+2
The other builders honour this variable, so should the mingw build. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20161011161625.9070-4-alex.bennee@linaro.org> Signed-off-by: Fam Zheng <famz@redhat.com>
2016-10-17tests/docker: test-build scriptAlex Bennée1-0/+20
Much like test-quick but only builds. This is useful for some of the build targets like ThreadSanitizer that don't yet pass "make check". Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20161011161625.9070-3-alex.bennee@linaro.org> Signed-off-by: Fam Zheng <famz@redhat.com>
2016-10-17tests/docker: add travis dockerfileAlex Bennée1-0/+6
This target grabs the latest Travis containers from their repository at quay.io and then installs QEMU's build dependencies. With this it is possible to run on broadly the same setup as they have on travis-ci.org. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20161011161625.9070-2-alex.bennee@linaro.org> Signed-off-by: Fam Zheng <famz@redhat.com>
2016-10-16spapr: Improved placement of PCI host bridges in guest memory mapDavid Gibson3-7/+7
Currently, the MMIO space for accessing PCI on pseries guests begins at 1 TiB in guest address space. Each PCI host bridge (PHB) has a 64 GiB chunk of address space in which it places its outbound PIO and 32-bit and 64-bit MMIO windows. This scheme as several problems: - It limits guest RAM to 1 TiB (though we have a limited fix for this now) - It limits the total MMIO window to 64 GiB. This is not always enough for some of the large nVidia GPGPU cards - Putting all the windows into a single 64 GiB area means that naturally aligning things within there will waste more address space. In addition there was a miscalculation in some of the defaults, which meant that the MMIO windows for each PHB actually slightly overran the 64 GiB region for that PHB. We got away without nasty consequences because the overrun fit within an unused area at the beginning of the next PHB's region, but it's not pretty. This patch implements a new scheme which addresses those problems, and is also closer to what bare metal hardware and pHyp guests generally use. Because some guest versions (including most current distro kernels) can't access PCI MMIO above 64 TiB, we put all the PCI windows between 32 TiB and 64 TiB. This is broken into 1 TiB chunks. The first 1 TiB contains the PIO (64 kiB) and 32-bit MMIO (2 GiB) windows for all of the PHBs. Each subsequent TiB chunk contains a naturally aligned 64-bit MMIO window for one PHB each. This reduces the number of allowed PHBs (without full manual configuration of all the windows) from 256 to 31, but this should still be plenty in practice. We also change some of the default window sizes for manually configured PHBs to saner values. Finally we adjust some tests and libqos so that it correctly uses the new default locations. Ideally it would parse the device tree given to the guest, but that's a more complex problem for another time. Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Reviewed-by: Laurent Vivier <lvivier@redhat.com>
2016-10-16libqos: Limit spapr-pci to 32-bit MMIO for nowDavid Gibson1-17/+15
Currently the functions in pci-spapr.c (like pci-pc.c on which it's based) don't distinguish between 32-bit and 64-bit PCI MMIO. At the moment, the qemu side implementation is a bit weird and has a single MMIO window straddling 32-bit and 64-bit regions, but we're likely to change that in future. In any case, pci-pc.c - and therefore the testcases using PCI - only handle 32-bit MMIOs for now. For spapr despite whatever changes might happen with the MMIO windows, the 32-bit window is likely to remain at 2..4 GiB in PCI space. So, explicitly limit pci-spapr.c to 32-bit MMIOs for now, we can add 64-bit MMIO support back in when and if we need it. Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Reviewed-by: Laurent Vivier <lvivier@redhat.com>
2016-10-16libqos: Correct error in PCI hole sizing for spaprDavid Gibson1-2/+4
In pci-spapr.c (as in pci-pc.c from which it was derived), the pci_hole_start/pci_hole_size and pci_iohole_start/pci_iohole_size pairs[1] essentially define the region of PCI (not CPU) addresses in which MMIO or PIO BARs respectively will be allocated. The size value is relative to the start value. But in pci-spapr.c it is set to the entire size of the window supported by the (emulated) hardware, but the start values are *not* at the beginning of the emulated windows. That means if you tried to map enough PCI BARs, we'd messily overrun the IO windows, instead of failing in iomap as we should. This patch corrects this by calculating the hole sizes from the location of the window in PCI space and the hole start. [1] Those are bad names, but that's a problem for another time. Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Reviewed-by: Laurent Vivier <lvivier@redhat.com>
2016-10-16libqos: Isolate knowledge of spapr memory map to qpci_init_spapr()David Gibson1-49/+64
The libqos code for accessing PCI on the spapr machine type uses IOBASE() and MMIOBASE() macros to determine the address in the CPU memory map of the windows to PCI address space. This is a detail of the implementation of PCI in the machine type, it's not specified by the PAPR standard. Real guests would get the addresses of the PCI windows from the device tree. Finding the device tree in libqos would be awkward, but we can at least localize this knowledge of the implementation to the init function, saving it in the QPCIBusSPAPR structure for use by the accessors. That leaves only one place to fix if we alter the location of the PCI windows, as we're planning to do. Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Reviewed-by: Laurent Vivier <lvivier@redhat.com>
2016-10-14tests/boot-sector: Increase time-out to 90 secondsThomas Huth1-2/+2
Since the PXE tester runs rather slow on ppc64 with tcg, there is a chance that we hit the 60 seconds timeout on machines that have a heavy CPU load. So let's increase the timeout to ease the situation. Signed-off-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2016-10-14tests/boot-sector: Use mkstemp() to create a unique file nameThomas Huth4-9/+16
The pxe-test is run for three different targets now (x86_64, i386 and ppc64), and the bios-tables-test is run for two targets (x86_64 and i386). But each of the tests is using an invariant name for the disk image with the boot sector code - so if the tests are running in parallel, there is a race condition that they destroy the disk image of a parallel test program. Let's use mkstemp() to create unique temporary files here instead - and since mkstemp() is returning an integer file descriptor instead of a FILE pointer, we also switch the fwrite() and fclose() to write() and close() instead. Reported-by: Sascha Silbe <x-qemu@se-silbe.de> Signed-off-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2016-10-14tests/boot-sector: Use minimum length for the Forth boot scriptThomas Huth1-3/+3
The pxe-test is quite slow on ppc64 with tcg. We can speed it up a little bit by decreasing the size of the file that has to be loaded via TFTP. Signed-off-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Eric Blake <eblake@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2016-10-14qtest: ask endianness of the target in qtest_init()Laurent Vivier4-50/+38
The target endianness is not deduced anymore from the architecture name but asked directly to the guest, using a new qtest command: "endianness". As it can't change (this is the value of TARGET_WORDS_BIGENDIAN), we store it to not have to ask every time we want to know if we have to byte-swap a value. Signed-off-by: Laurent Vivier <lvivier@redhat.com> CC: Greg Kurz <groug@kaod.org> CC: David Gibson <david@gibson.dropbear.id.au> CC: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2016-10-14tests: minor cleanups in usb-hcd-uhci-testLaurent Vivier1-6/+9
Two minor cleanups: - exit gracefully in case on unsupported target, - put machine command line in a constant to avoid to duplicate it. Signed-off-by: Laurent Vivier <lvivier@redhat.com> Reviewed-by: Gerd Hoffmann <kraxel@redhat.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2016-10-10Merge remote-tracking branch 'remotes/mst/tags/for_upstream' into stagingPeter Maydell5-2/+4
virtio, pc: fixes and features more guest error handling for virtio devices virtio migration rework pc fixes Signed-off-by: Michael S. Tsirkin <mst@redhat.com> # gpg: Signature made Mon 10 Oct 2016 00:39:11 BST # gpg: using RSA key 0x281F0DB8D28D5469 # gpg: Good signature from "Michael S. Tsirkin <mst@kernel.org>" # gpg: aka "Michael S. Tsirkin <mst@redhat.com>" # Primary key fingerprint: 0270 606B 6F3C DF3D 0B17 0970 C350 3912 AFBE 8E67 # Subkey fingerprint: 5D09 FD08 71C8 F85B 94CA 8A0D 281F 0DB8 D28D 5469 * remotes/mst/tags/for_upstream: (33 commits) intel-iommu: Check IOAPIC's Trigger Mode against the one in IRTE virtio: cleanup VMSTATE_VIRTIO_DEVICE vhost-vsock: convert VMSTATE_VIRTIO_DEVICE virtio-rng: convert VMSTATE_VIRTIO_DEVICE virtio-balloon: convert VMSTATE_VIRTIO_DEVICE virtio-scsi: convert VMSTATE_VIRTIO_DEVICE virtio-input: convert VMSTATE_VIRTIO_DEVICE virtio-gpu: convert VMSTATE_VIRTIO_DEVICE virtio-serial: convert VMSTATE_VIRTIO_DEVICE virtio-9p: convert VMSTATE_VIRTIO_DEVICE virtio-net: convert VMSTATE_VIRTIO_DEVICE virtio-blk: convert VMSTATE_VIRTIO_DEVICE virtio: prepare change VMSTATE_VIRTIO_DEVICE macro net: don't poke at chardev internal QemuOpts virtio-scsi: handle virtio_scsi_set_config() error virtio-scsi: convert virtio_scsi_bad_req() to use virtio_error() virtio-net: handle virtio_net_flush_tx() errors virtio-net: handle virtio_net_receive() errors virtio-net: handle virtio_net_handle_ctrl() error virtio-blk: handle virtio_blk_handle_request() errors ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-10-10Merge remote-tracking branch 'remotes/mjt/tags/trivial-patches-fetch' into ↵Peter Maydell1-0/+2
staging trivial patches for 2016-10-08 # gpg: Signature made Sat 08 Oct 2016 09:56:38 BST # gpg: using RSA key 0x701B4F6B1A693E59 # gpg: Good signature from "Michael Tokarev <mjt@tls.msk.ru>" # gpg: aka "Michael Tokarev <mjt@corpit.ru>" # gpg: aka "Michael Tokarev <mjt@debian.org>" # Primary key fingerprint: 6EE1 95D1 886E 8FFB 810D 4324 457C E0A0 8044 65C5 # Subkey fingerprint: 7B73 BAD6 8BE7 A2C2 8931 4B22 701B 4F6B 1A69 3E59 * remotes/mjt/tags/trivial-patches-fetch: (26 commits) net/filter-mirror: Fix mirror initial check typo virtio: rename the bar index field name in VirtIOPCIProxy linux-user: include <poll.h> instead of <sys/poll.h> char: fix missing return in error path for chardev TLS init CODING_STYLE: Fix a typo ("have" vs. "has") bitmap: refine and move BITMAP_{FIRST/LAST}_WORD_MASK build-sys: fix find-in-path m68k: change default system clock for m5208evb exec: remove unused compacted argument usb: ehci: fix memory leak in ehci_process_itd qapi: make the json schema files more regular. maint: Add module_block.h to .gitignore MAINTAINERS: Some updates related to the SH4 machines MAINTAINERS: Add some more MIPS related files MAINTAINERS: Add usermode related config files MAINTAINERS: Add some more pattern to recognize all win32 related files MAINTAINERS: Add some more rocker related files MAINTAINERS: Add header files to CRIS section MAINTAINERS: Add some more files to the virtio section MAINTAINERS: Add some SPARC machine related files ... # Conflicts: # MAINTAINERS
2016-10-10Merge remote-tracking branch 'remotes/armbru/tags/pull-qapi-2016-10-07' into ↵Peter Maydell2-1/+47
staging QAPI patches for 2016-10-07 # gpg: Signature made Fri 07 Oct 2016 18:55:40 BST # gpg: using RSA key 0x3870B400EB918653 # gpg: Good signature from "Markus Armbruster <armbru@redhat.com>" # gpg: aka "Markus Armbruster <armbru@pond.sub.org>" # Primary key fingerprint: 354B C8B3 D7EB 2A6B 6867 4E5F 3870 B400 EB91 8653 * remotes/armbru/tags/pull-qapi-2016-10-07: docs: Belatedly update for move of QMP/* to docs/ docs: Belatedly update for move of qmp-commands.txt qmp: Disable query-cpu-* commands when they're unavailable MAINTAINERS: Pass the QObject staff from Luiz to Markus MAINTAINERS: Pass the HMP staff from Luiz to David qapi: return a 'missing parameter' error qapi: assert list entry has a value qapi: add assert about root value tests/test-qmp-input-strict: Cover missing struct members qapi: Fix crash when 'any' or 'null' parameter is missing qmp: fix object-add assert() without props Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-10-10Merge remote-tracking branch 'remotes/bonzini/tags/for-upstream' into stagingPeter Maydell2-0/+80
* Thread Sanitizer fixes (Alex) * Coverity fixes (David) * test-qht fixes (Emilio) * QOM interface for info irq/info pic (Hervé) * -rtc clock=rt fix (Junlian) * mux chardev fixes (Marc-André) * nicer report on death by signal (Michal) * qemu-tech TLC (Paolo) * MSI support for edu device (Peter) * qemu-nbd --offset fix (Tomáš) # gpg: Signature made Fri 07 Oct 2016 17:25:10 BST # gpg: using RSA key 0xBFFBD25F78C7AE83 # gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>" # gpg: aka "Paolo Bonzini <pbonzini@redhat.com>" # Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4 E2F7 7E15 100C CD36 69B1 # Subkey fingerprint: F133 3857 4B66 2389 866C 7682 BFFB D25F 78C7 AE83 * remotes/bonzini/tags/for-upstream: (39 commits) qemu-doc: merge qemu-tech and qemu-doc qemu-tech: rewrite some parts qemu-tech: reorganize content qemu-tech: move TCG test documentation to tests/tcg/README qemu-tech: move user mode emulation features from qemu-tech qemu-tech: document lazy condition code evaluation in cpu.h qemu-tech: move text from qemu-tech to tcg/README qemu-doc: drop installation and compilation notes qemu-doc: replace introduction with the one from the internals manual qemu-tech: drop index test-qht: perform lookups under rcu_read_lock qht: fix unlock-after-free segfault upon resizing qht: simplify qht_reset_size qemu-nbd: Shrink image size by specified offset qemu_kill_report: Report PID name too util: Introduce qemu_get_pid_name char: update read handler in all cases char: use a fixed idx for child muxed chr i8259: give ISA device when registering ISA ioports .travis.yml: add gcc sanitizer build ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-10-10tests: acpi tables expected blobs updateIgor Mammedov4-0/+0
Signed-off-by: Igor Mammedov <imammedo@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2016-10-10tests: acpi: extend cphp testcase with numa checkIgor Mammedov1-2/+4
so it would be possible to verify _PXM generation in DSDT and SRAT tables. Signed-off-by: Igor Mammedov <imammedo@redhat.com> Reviewed-by: Marcel Apfelbaum <marcel@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2016-10-08tests: Ignore test executablesEric Blake1-0/+2
Commits 9ef8112a and efad6682 introduced new tests, but forgot to ignore the built executables from an in-tree build. Signed-off-by: Eric Blake <eblake@redhat.com> Reviewed-by: Alberto Garcia <berto@igalia.com> Reviewed-by: Fam Zheng <famz@redhat.com> Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
2016-10-07qapi: return a 'missing parameter' errorMarc-André Lureau1-1/+1
The 'old' dispatch code returned a QERR_MISSING_PARAMETER for missing parameters, but the qapi qmp_dispatch() code uses QERR_INVALID_PARAMETER_TYPE. Improve qapi code to return QERR_MISSING_PARAMETER where appropriate. Fix expected error message in iotests. Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Alberto Garcia <berto@igalia.com> Reviewed-by: Eric Blake <eblake@redhat.com> Message-Id: <20160930095948.3154-4-marcandre.lureau@redhat.com> [Drop incorrect error_setg() from qmp_input_type_any() and qmp_input_type_null()] Reviewed-by: Markus Armbruster <armbru@redhat.com> Signed-off-by: Markus Armbruster <armbru@redhat.com>
2016-10-07qemu-tech: move TCG test documentation to tests/tcg/READMEPaolo Bonzini1-0/+76
Reviewed-by: Emilio G. Cota <cota@braap.org> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2016-10-06test-qht: perform lookups under rcu_read_lockEmilio G. Cota1-0/+4
qht_lookup is meant to be called from an RCU read-critical section. Make sure we're in such a section in test-qht when performing lookups, despite the fact that no races in qht can be triggered by test-qht since it is single-threaded. Note that rcu_register_thread is already called by the rcu_after_fork hook, and therefore duplicating it here would be a bug. Signed-off-by: Emilio G. Cota <cota@braap.org> Message-Id: <1475706880-10667-4-git-send-email-cota@braap.org> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2016-10-06tests/test-qmp-input-strict: Cover missing struct membersMarkus Armbruster1-0/+46
These tests would have caught the bug fixed by the previous commit. Signed-off-by: Markus Armbruster <armbru@redhat.com> Message-Id: <1475594630-24758-1-git-send-email-armbru@redhat.com>
2016-10-06Merge remote-tracking branch 'remotes/dgibson/tags/ppc-for-2.8-20161006' ↵Peter Maydell30-69/+490
into staging ppc patch queue 2016-10-06 Currently accumulated target-ppc and spapr machine related patches. - More POWER9 instruction implementations - Additional test case / enabling of test cases for Power - Assorted fixes # gpg: Signature made Thu 06 Oct 2016 07:05:07 BST # gpg: using RSA key 0x6C38CACA20D9B392 # gpg: Good signature from "David Gibson <david@gibson.dropbear.id.au>" # gpg: aka "David Gibson (Red Hat) <dgibson@redhat.com>" # gpg: aka "David Gibson (ozlabs.org) <dgibson@ozlabs.org>" # gpg: aka "David Gibson (kernel.org) <dwg@kernel.org>" # Primary key fingerprint: 75F4 6586 AE61 A66C C44E 87DC 6C38 CACA 20D9 B392 * remotes/dgibson/tags/ppc-for-2.8-20161006: (29 commits) hw/ppc/spapr: Use POWER8 by default for the pseries-2.8 machine tests/pxe: Use -nodefaults to speed up ppc64/ipv6 pxe test spapr: fix check of cpu alias name in spapr_get_cpu_core_type() tests: enable ohci/uhci/xhci tests on PPC64 libqos: use generic qtest_shutdown() libqos: add PCI management in qtest_vboot()/qtest_shutdown() libqos: add PPC64 PCI support target-ppc: fix vmx instruction type/type2 target-ppc/kvm: Enable transactional memory on POWER8 with KVM-HV, too target-ppc/kvm: Add a wrapper function to check for KVM-PR MAINTAINERS: Add two more ppc related files target-ppc: Implement mtvsrws instruction target-ppc: add vclzlsbb/vctzlsbb instructions target-ppc: add vector compare not equal instructions target-ppc: fix invalid mask - cmpl, bctar target-ppc: add stxvb16x instruction target-ppc: add lxvb16x instruction target-ppc: add stxvh8x instruction target-ppc: add lxvh8x instruction target-ppc: improve stxvw4x implementation ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-10-06rules.mak: quiet-command: Split command name and args to printPeter Maydell2-17/+17
The quiet-command make rule currently takes two arguments: the command and arguments to run, and a string to print if the V flag is not set (ie we are not being verbose). By convention, the string printed is of the form " NAME some args". Unfortunately to get nicely lined up output all the strings have to agree about what column the arguments should start in, which means that if we add a new quiet-command usage which wants a slightly longer CMD name then we either put up with misalignment or change every quiet-command string. Split the quiet-mode string into two, the "NAME" and the "same args" part, and use printf(1) to format the string automatically. This means we only need to change one place if we want to support a longer maximum name. In particular, we can now print 7-character names lined up properly (they are needed for the OSX "SETTOOL" invocation). Change all the uses of quiet-command to the new syntax. (Any which are missed or inadvertently reintroduced via later merges will result in slightly misformatted quiet output rather than disaster.) A few places in the pc-bios/ makefiles are updated to use "BUILD", "SIGN" and "STRIP" rather than "Building", "Signing" and "Stripping" for consistency and to keep them below 7 characters. Module .mo links now print "LD" rather than the nonstandard "LD -r". Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Eric Blake <eblake@redhat.com> Message-id: 1475598441-27908-1-git-send-email-peter.maydell@linaro.org
2016-10-06tests/pxe: Use -nodefaults to speed up ppc64/ipv6 pxe testThomas Huth1-2/+2
SLOF is unfortunately quite slow when running with TCG, so the pxe test is also performing rather slow here. By using "-nodefaults" we can disable some devices (vscsi) that we are not interested in here, so that SLOF does not have to scan them during boot and thus starts up a little bit faster. The ppc64 pxe-test now only takes 27 seconds on my laptop instead of 33 seconds. The "-nodefaults" flag seems to work fine for the x86 tests, too, so it is added here unconditionally here (though there is no speed-up on x86 by using this flag). Suggested-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Laurent Vivier <lvivier@redhat.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2016-10-06tests: enable ohci/uhci/xhci tests on PPC64Laurent Vivier2-9/+23
Signed-off-by: Laurent Vivier <lvivier@redhat.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2016-10-06libqos: use generic qtest_shutdown()Laurent Vivier5-6/+21
Machine specific shutdown function can be registered by the machine specific qtest_XXX_boot() if needed. So we will not have to test twice the architecture (on boot and on shutdown) if the test can be run on several architectures. Signed-off-by: Laurent Vivier <lvivier@redhat.com> Reviewed-by: Greg Kurz <groug@kaod.org> Reviewed-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2016-10-06libqos: add PCI management in qtest_vboot()/qtest_shutdown()Laurent Vivier21-25/+46
Signed-off-by: Laurent Vivier <lvivier@redhat.com> Reviewed-by: Greg Kurz <groug@kaod.org> Reviewed-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2016-10-06libqos: add PPC64 PCI supportLaurent Vivier7-23/+376
Signed-off-by: Laurent Vivier <lvivier@redhat.com> [dwg: Fixed build problem on 32-bit hosts] Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2016-10-05tests: Test IPv6 and ppc64 in the PXE testerThomas Huth3-7/+25
The firmware of the pseries machine, SLOF, is able to load files via IPv6 networking, too. So to test both, network bootloading on ppc64 and IPv6 (via Slirp) , let's add some PXE tests for this environment, too. Since we can not use the normal x86 boot sector for network boot loading, we use a simple Forth script on ppc64 instead. Signed-off-by: Thomas Huth <thuth@redhat.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
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