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Age
Commit message (
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Author
Files
Lines
2008-05-24
Fix ARM conditional branch bug.
pbrook
1
-0
/
+18
2008-05-23
Comment non-obvious calculation. Don't clobber r3 in qemu_st64.
balrog
1
-6
/
+33
2008-05-23
A branch insn must not overwrite the branch target before relocation.
balrog
1
-3
/
+14
2008-05-23
added tcg_temp_free() and improved the handling of constants
bellard
3
-229
/
+396
2008-05-23
Fix qemu_ld/st for mem_index > 0 on arm host.
balrog
1
-6
/
+15
2008-05-23
Define TCG_TARGET_CALL_STACK_OFFSET on arm.
balrog
1
-2
/
+3
2008-05-23
compilation fix
bellard
1
-2
/
+2
2008-05-23
profiler clean up
bellard
2
-13
/
+93
2008-05-22
added debug_insn_start debug instruction
bellard
3
-3
/
+43
2008-05-22
debug output: write helper names
bellard
2
-15
/
+35
2008-05-22
more generic call codegen
bellard
4
-42
/
+75
2008-05-22
fixed zero shifts (64 bit case)
bellard
1
-3
/
+4
2008-05-22
small shift opts
bellard
1
-6
/
+30
2008-05-21
fixed dead global variable update
bellard
1
-20
/
+18
2008-05-20
Fix 8-bit signed load/store and a typo.
balrog
1
-4
/
+4
2008-05-20
Implement neg_i32, clean-up.
balrog
2
-5
/
+10
2008-05-20
Remove dyngen ARM code, which did't build.
balrog
1
-103
/
+0
2008-05-19
ARM host support for TCG targets.
balrog
3
-1
/
+1622
2008-05-19
Better solution for the alignment problem
blueswir1
1
-3
/
+3
2008-05-18
Switch most MIPS logical and arithmetic instructions to TCG.
ths
1
-0
/
+4
2008-05-18
Fix constant checks on Sparc64 host
blueswir1
1
-12
/
+17
2008-05-18
Fix TCG alignment problems on Sparc64 host
blueswir1
1
-2
/
+2
2008-05-17
added 'pure' function attribute - fixed indirect function calls
bellard
2
-23
/
+46
2008-05-17
added not pseudo op - more _tl macros
bellard
1
-0
/
+23
2008-05-17
Fix qemu_ld/st branches, constification, use orcc for tst synthetic op
blueswir1
1
-9
/
+9
2008-05-16
Implement qemu_ld/st, fix brcond, handle more corner cases
blueswir1
1
-29
/
+395
2008-05-15
Implement brcond, ldst with large offset; fix direct jump, prologue
blueswir1
1
-14
/
+71
2008-05-15
Fix bit fitting checks
blueswir1
1
-11
/
+15
2008-05-14
Fix compilation on Sparc host, implement ld and st
blueswir1
2
-4
/
+15
2008-05-12
temporary hack to handle register shortage with dyngen for qemu_st64()
bellard
2
-0
/
+41
2008-05-11
Add TCG native negation op.
pbrook
5
-0
/
+42
2008-05-11
Add zero extension (pseudo-)ops.
pbrook
2
-2
/
+50
2008-05-10
REXB optimization cannot be done at this level
bellard
1
-1
/
+1
2008-05-10
fixed qemu_st8 insn - prologue saved too many registers
bellard
1
-8
/
+6
2008-05-10
Fix DEBUG_TCGV.
pbrook
1
-3
/
+3
2008-05-10
Rename CONFIG_NO_DYNGEN_OP to CONFIG_DYNGEN_OP to avoid double negatives
blueswir1
4
-4
/
+4
2008-05-10
fixed global variable handling with qemu load/stores - initial global prologu...
bellard
4
-62
/
+219
2008-05-06
Fix i64 remainder calculation copy-paste error.
balrog
1
-2
/
+2
2008-05-04
Add helpers and shorthands for mul and muli operations.
ths
1
-0
/
+19
2008-05-03
Skip register moves when the target and the source are the same
blueswir1
1
-4
/
+8
2008-04-12
HPPA (PA-RISC) host support
aurel32
7
-10
/
+1263
2008-04-11
Remove osdep.c/qemu-img code duplication
aurel32
1
-31
/
+1
2008-03-31
ARM TCG conversion 9/16.
pbrook
1
-0
/
+12
2008-03-31
ARM TCG conversion 7/16.
pbrook
1
-0
/
+19
2008-03-22
Add TL variants of trunc and ext/extu
blueswir1
1
-0
/
+12
2008-03-21
Prepare for op.c removal and zero legacy ops
blueswir1
4
-0
/
+9
2008-03-21
Make TCG br op available
blueswir1
1
-0
/
+5
2008-03-16
Increase max temps limit
blueswir1
1
-1
/
+1
2008-03-16
Add discard_ptr and discard_tl
blueswir1
1
-0
/
+4
2008-03-13
Add tcg_const_tl
blueswir1
1
-0
/
+2
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