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2014-05-28tcg/optimize: Remember garbage high bits for 32-bit opsRichard Henderson1-7/+26
For a 64-bit host, the high bits of a register after a 32-bit operation are undefined. Adjust the temps mask for all 32-bit ops to reflect that. Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-05-28tcg/optimize: Move updating of gen_opc_buf into tcg_opt_gen_mov*Richard Henderson1-61/+56
No functional change, just reduce a bit of redundancy. Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-05-28tcg-sparc: Make debug_frame constRichard Henderson1-13/+9
Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-05-28tcg-s390: Make debug_frame constRichard Henderson1-13/+9
Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-05-28tcg-arm: Make debug_frame constRichard Henderson1-13/+9
Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-05-28tcg-aarch64: Make debug_frame constRichard Henderson1-13/+9
Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-05-28tcg-i386: Make debug_frame constRichard Henderson1-21/+17
Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-05-28tcg: Allow the debug_frame data structure to be constantRichard Henderson1-4/+17
Adjust the FDE to point to the code_buffer after we've copied it to the image, rather than requiring that the backend set it prior. This allows the backend to use read-only storage for its data. Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-05-28tcg: Remove sizemask and flags arguments to tcg_gen_callNRichard Henderson2-12/+9
Take them from the TCGHelperInfo struct instead. Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-05-28tcg: Save flags and computed sizemask in TCGHelperInfoRichard Henderson1-0/+7
Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-05-28tcg: Register the helper info struct rather than the nameRichard Henderson1-2/+5
This will let us find all the info from the hash table. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-05-28tcg: Inline tcg_gen_helperNRichard Henderson1-7/+0
Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-05-28tcg: Use helper-gen.h in tcg-op.hRichard Henderson1-150/+25
No need to open-code the setup of the builtin helpers. Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-05-28tcg: Push tcg-runtime routines into exec/helper-*Richard Henderson4-52/+31
Rather than special casing them, use the standard mechanisms for tcg helper generation. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-05-28tcg: Invert the inclusion of helper.hRichard Henderson1-4/+3
Rather than include helper.h with N values of GEN_HELPER, include a secondary file that sets up the macros to include helper.h. This minimizes the files that must be rebuilt when changing the macros for file N. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-05-28tcg: Optimize brcond2 and setcond2 ne/eqRichard Henderson1-0/+94
If either the high or low pair can be resolved, we can simplify to either a constant or to a 32-bit comparison. Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-05-27Merge remote-tracking branch 'remotes/rth/tcg-mips' into stagingPeter Maydell2-918/+945
* remotes/rth/tcg-mips: (24 commits) tcg-mips: Enable direct chaining of TBs tcg-mips: Simplify movcond tcg-mips: Simplify brcond2 tcg-mips: Improve setcond eq/ne vs zeros tcg-mips: Simplify setcond2 tcg-mips: Simplify brcond tcg-mips: Simplify setcond tcg-mips: Commonize opcode implementations tcg-mips: Improve add2/sub2 tcg-mips: Hoist args loads tcg-mips: Fix subtract immediate range tcg-mips: Name the opcode enumeration tcg-mips: Use EXT for AND on mips32r2 tcg-mips: Use T9 for TCG_TMP1 tcg-mips: Introduce TCG_TMP0, TCG_TMP1 tcg-mips: Rearrange register allocation tcg-mips: Convert to new_ldst tcg-mips: Convert to new qemu_l/st helpers tcg-mips: Move softmmu slow path out of line tcg-mips: Split large ldst offsets ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2014-05-24tcg-mips: Enable direct chaining of TBsRichard Henderson1-1/+10
Now that the code_gen_buffer is constrained to not cross 256mb regions, we are assured that we can use J to reach another TB. Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-05-24tcg-mips: Simplify movcondRichard Henderson1-49/+17
Use the same table to fold comparisons as with setcond. Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-05-24tcg-mips: Simplify brcond2Richard Henderson1-57/+20
Emitting a single branch instead of (up to) 3, using setcond2 to generate the composite compare. Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-05-24tcg-mips: Improve setcond eq/ne vs zerosRichard Henderson1-4/+36
The original code results in one too many insns per zero present in the input. And since comparing 64-bit numbers vs zero is common... Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-05-24tcg-mips: Simplify setcond2Richard Henderson1-64/+31
Using tcg_unsigned_cond and tcg_high_cond. Also, move the function up in the file for future cleanups. Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-05-24tcg-mips: Simplify brcondRichard Henderson1-46/+41
Use the same table to fold comparisons as with setcond. Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-05-24tcg-mips: Simplify setcondRichard Henderson1-58/+67
Use a table to fold comparisons to less-than. Also, move the function up in the file for futher simplifications. Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-05-24tcg-mips: Commonize opcode implementationsRichard Henderson1-114/+98
Most opcodes fall in to one of a couple of patterns. Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-05-24tcg-mips: Improve add2/sub2Richard Henderson1-31/+56
Reduce insn count from 5 to either 3 or 4. Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-05-24tcg-mips: Hoist args loadsRichard Henderson1-98/+103
Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-05-24tcg-mips: Fix subtract immediate rangeRichard Henderson1-5/+11
Since we must use ADDUI, we would generate incorrect code for -32768. Leaving off subtract of +32768 makes things easier for a follow-on patch. Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-05-24tcg-mips: Name the opcode enumerationRichard Henderson1-9/+9
And use it in the opcode emission functions. Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-05-24tcg-mips: Use EXT for AND on mips32r2Richard Henderson2-14/+50
At the same time, tidy deposit by introducing tcg_out_opc_bf. Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-05-24tcg-mips: Use T9 for TCG_TMP1Richard Henderson1-1/+1
T0 is an argument register for the n32 and n64 abis. T9 is the call address register for the abis, and is more directly under the control of the backend. Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-05-24tcg-mips: Introduce TCG_TMP0, TCG_TMP1Richard Henderson1-114/+117
Use these instead of hard-coding the registers to use for temporaries. Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-05-24tcg-mips: Rearrange register allocationRichard Henderson2-11/+19
Use FP (also known as S8) as a normal call-saved register. Include T0 in the allocation order and call-clobbered list even though it's currently used as a TCG temporary. Put the argument registers at the end of the allocation order. Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-05-24tcg-mips: Convert to new_ldstRichard Henderson2-53/+25
Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-05-24tcg-mips: Convert to new qemu_l/st helpersRichard Henderson1-51/+56
In addition, fill delay slots calling the helpers and tail call to the store helpers. Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-05-24tcg-mips: Move softmmu slow path out of lineRichard Henderson1-389/+383
At the same time, tidy up the call helpers, avoiding a memory reference. Split out several subroutines. Use TCGMemOp constants. Make endianness selectable at runtime. Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-05-24tcg-mips: Split large ldst offsetsRichard Henderson1-11/+12
Use this to reduce goto_tb by one insn. Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-05-24tcg-mips: Fill the exit_tb delay slotRichard Henderson1-7/+18
Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-05-24tcg-mips: Use J and JAL opcodesRichard Henderson1-6/+40
For userland builds calls will normally be in range, and for the exit_tb opcode the branch to the epilogue. Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-05-22tci: Fix tcg_out_callRichard Henderson1-0/+3
Broken since dddbb2e1e3f8137d7e3f1faf9758c66cca0c94ea. Do all the rest of the things that tcg_out_op did before and after the big switch statement. Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-05-15tcg-s390: Implement direct chaining of TBsRichard Henderson1-1/+3
Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-05-15tcg-s390: Improve setcondRichard Henderson1-6/+91
There are a variety of common cases for which we can use carry tricks to avoid a conditional branch. On very new hardware, use LOAD ON CONDITION instead of a conditional branch. Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-05-15tcg-s390: Allow immediate operands to add2 and sub2Richard Henderson1-12/+52
Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-05-15tcg-s390: Implement tcg_register_jitRichard Henderson1-7/+55
Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-05-15tcg-s390: Use more risbg in the tlb sequenceRichard Henderson1-21/+28
Elides two insns from the sequence. The resulting tlb compare sequence is satisfyingly minimal: risbg %r2,%r8,51,186,56 risbg %r3,%r8,61,178,0 cg %r3,904(%r10,%r2) lg %r2,920(%r10,%r2) jlh tlb_miss Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-05-15tcg-s390: Move ldst helpers out of lineRichard Henderson1-92/+118
That is, the old LDST_OPTIMIZATION. Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-05-15tcg-s390: Convert to new ldst opcodesRichard Henderson2-116/+56
Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-05-15tcg-s390: Integrate endianness into TCGMemOpRichard Henderson1-64/+60
Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-05-15tcg-s390: Convert to TCGMemOpRichard Henderson1-46/+36
Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-05-15tcg-s390: Fix off-by-one in wraparound andiRichard Henderson1-2/+2
Signed-off-by: Richard Henderson <rth@twiddle.net>
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