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2008-12-07Some cleanups after dyngen removalaurel322-13/+8
2008-12-07Some cleanups after dyngen removalaurel325-503/+38
2008-12-07Some fixes for TCG debuggingblueswir13-7/+7
2008-12-07Remove a few dyngen and dyngen related codeaurel321-17/+4
2008-12-01arm: Don't potentially overwrite input registers in add2, sub2.balrog1-4/+13
2008-12-01Don't rely on ARM tcg_out_goto() generating just a single insn.balrog1-8/+13
2008-12-01Use libgcc __clear_cache to clean icache, when available.balrog1-0/+5
2008-11-29Fix alignment of 64bit argsmalc1-1/+2
2008-11-18Preliminary AIX supportmalc3-2/+55
2008-11-17TCG variable type checking.pbrook3-853/+1034
2008-11-12Rename misnamed BACK_CHAIN_OFFSET to LR_OFFSETmalc1-4/+4
2008-11-12Avoid compiler warningmalc1-1/+1
2008-11-11Fix alignment problem with some 64bit load/store instructionsmalc1-5/+16
2008-11-04Mention output overlaps.pbrook1-0/+5
2008-11-03Fix rotri_i64 typo.pbrook1-1/+1
2008-11-03tcg-ops.h: add rotl/rotli and rotr/rotri TCG instructionsaurel322-1/+127
2008-11-03tcg-op.h: reorder _i64 instructions common to 32- and 64-bit targetsaurel321-15/+15
2008-11-0264-bit target subfi fix.pbrook1-1/+1
2008-11-02tcg-ops.h: add a subfi wrapperaurel321-0/+16
2008-11-02tcg-ops.h: _i64 TCG immediate instructions cleanupaurel321-42/+31
2008-10-26Fix undeclared symbol warnings from sparseblueswir11-2/+2
2008-10-21TCG: add tcg_const_local_tl()aurel323-0/+20
2008-10-21TCG: add logical operations found on alpha and powerpc processorsaurel322-0/+120
2008-10-05Add some missing static and const qualifiers, reg_names only used if NDEBUG setblueswir17-15/+32
2008-10-02Optimize 64 bit bswapmalc1-5/+5
2008-09-23Fix tcg_gen_concat32_i64 on 64-bit hosts.pbrook1-1/+2
2008-09-22Avoid clobbering input register in qemu_ld64+bswap+useronly casemalc1-13/+6
2008-09-21Add concat32_i64 and concat_tl_i64 opsblueswir12-0/+18
2008-09-21Add concat_i32_i64 op.pbrook2-0/+21
2008-09-14Display TCGCond name in tcg dumper (original patch by Tristan Gingold)blueswir11-1/+30
2008-09-13Use 64 bit loads for tlb addend only if addend size is 64 bitsblueswir11-2/+8
2008-09-13Fix stack alignment on Sparc32 hostblueswir11-1/+2
2008-09-07TCG: Use x86-64 zero extension instructions.pbrook1-0/+15
2008-09-07Implement TCG sign extension ops for x86-64.pbrook2-0/+27
2008-09-05Revert "TCG: enable debug"aurel321-1/+1
2008-09-05TCG: enable debugaurel321-1/+1
2008-08-30Fix some warnings that would be generated by gcc -Wredundant-declsblueswir17-63/+12
2008-08-21Relax qemu_ld/st constraints for !SOFTMMU casemalc1-1/+14
2008-08-20Relax qemu_ld/st constraints for !SOFTMMU casemalc1-2/+6
2008-08-20Avoid clobbering input/aliased registers in !SOFTMMU+64bit+bswap casemalc1-9/+10
2008-08-20Clear the upper 32 bits of addr_reg in TARGET_LONG_BITS == 32 casemalc1-0/+6
2008-08-20Move tcg_out_tlb_read into #ifdef CONFIG_SOFTMMU block to avoid compiler warningmalc1-1/+1
2008-08-17Fix some warnings that would be generated by gcc -Wmissing-prototypesblueswir12-17/+4
2008-08-17Fix 64 bit constant generationblueswir11-5/+12
2008-08-17Fix 32 bit address overflowblueswir11-0/+19
2008-08-17Restore AREG0 after callsblueswir11-73/+64
2008-08-16Sparc code generator update (fix qemu_ld & qemu_st)blueswir11-129/+101
2008-08-15Sparc code generator updateblueswir12-96/+149
2008-08-03Account for MacOS X ABI reserved space in linkage area (Andreas Faerber)malc2-2/+2
2008-08-03Preliminary MacOS X on PPC32 supportmalc2-10/+41
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