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2021-05-26tcg/aarch64: Fix tcg_out_rotlYasuo Kuwahara1-3/+2
2021-05-02Do not include cpu.h if it's not really necessaryThomas Huth3-3/+0
2021-05-02Do not include sysemu/sysemu.h if it's not really necessaryThomas Huth1-1/+0
2021-04-05tcg/mips: Fix SoftTLB comparison on mips backendKele Huang1-1/+1
2021-03-23tcg: Workaround macOS 11.2 mprotect bugRichard Henderson1-3/+7
2021-03-23tcg: Do not set guard pages on the rx portion of code_gen_bufferRichard Henderson1-7/+5
2021-03-17tcg: Fix prototypes for tcg_out_vec_op and tcg_out_opMiroslav Rezanina8-19/+31
2021-03-17tcg/tci: Split out tcg_out_op_r[iI]Richard Henderson1-15/+35
2021-03-17tcg/tci: Split out tcg_out_op_vRichard Henderson1-4/+10
2021-03-17tcg/tci: Split out tcg_out_op_{rrm,rrrm,rrrrm}Richard Henderson1-17/+53
2021-03-17tcg/tci: Split out tcg_out_op_rrrrclRichard Henderson1-8/+19
2021-03-17tcg/tci: Split out tcg_out_op_rrrrRichard Henderson1-6/+15
2021-03-17tcg/tci: Split out tcg_out_op_rrrrrrRichard Henderson1-8/+19
2021-03-17tcg/tci: Split out tcg_out_op_rrclRichard Henderson1-6/+15
2021-03-17tcg/tci: Split out tcg_out_op_rrrbbRichard Henderson1-7/+16
2021-03-17tcg/tci: Split out tcg_out_op_rrrrrcRichard Henderson1-9/+21
2021-03-17tcg/tci: Split out tcg_out_op_rrrcRichard Henderson1-6/+15
2021-03-17tcg/tci: Split out tcg_out_op_rrrRichard Henderson1-5/+14
2021-03-17tcg/tci: Split out tcg_out_op_rrRichard Henderson1-13/+23
2021-03-17tcg/tci: Split out tcg_out_op_pRichard Henderson1-6/+12
2021-03-17tcg/tci: Split out tcg_out_op_lRichard Henderson1-3/+11
2021-03-17tcg/tci: Split out tcg_out_op_rrsRichard Henderson1-43/+37
2021-03-17tcg/tci: Push opcode emit into each caseRichard Henderson1-3/+32
2021-03-17tcg/tci: Implement the disassembler properlyRichard Henderson1-0/+283
2021-03-17tcg/tci: Remove tci_disasRichard Henderson2-12/+0
2021-03-17tcg/tci: Hoist op_size checking into tci_args_*Richard Henderson1-14/+73
2021-03-17tcg/tci: Split out tci_args_{rrm,rrrm,rrrrm}Richard Henderson1-66/+81
2021-03-17tcg/tci: Reduce qemu_ld/st TCGMemOpIdx operand to 32-bitsRichard Henderson2-6/+6
2021-03-17tcg/tci: Clean up deposit operationsRichard Henderson3-28/+30
2021-03-17tcg/tci: Split out tci_args_rrrrRichard Henderson1-5/+11
2021-03-17tcg/tci: Split out tci_args_rrrrrrRichard Henderson1-11/+20
2021-03-17tcg/tci: Reuse tci_args_l for goto_tbRichard Henderson3-23/+9
2021-03-17tcg/tci: Reuse tci_args_l for exit_tbRichard Henderson2-10/+5
2021-03-17tcg/tci: Reuse tci_args_l for calls.Richard Henderson1-19/+19
2021-03-17tcg/tci: Split out tci_args_ri and tci_args_rIRichard Henderson1-16/+22
2021-03-17tcg/tci: Split out tci_args_rrcl and tci_args_rrrrclRichard Henderson1-20/+32
2021-03-17tcg/tci: Split out tci_args_rrrrrcRichard Henderson1-6/+19
2021-03-17tcg/tci: Split out tci_args_lRichard Henderson1-2/+8
2021-03-17tcg/tci: Split out tci_args_rrrcRichard Henderson1-10/+14
2021-03-17tcg/tci: Split out tci_args_rrrRichard Henderson1-97/+57
2021-03-17tcg/tci: Split out tci_args_rrRichard Henderson1-36/+31
2021-03-17tcg/tci: Split out tci_args_rrsRichard Henderson1-44/+67
2021-03-17tcg/tci: Rename tci_read_r to tci_read_rvalRichard Henderson1-96/+96
2021-03-17tcg/tci: Remove ifdefs for TCG_TARGET_HAS_ext32[us]_i64Richard Henderson1-4/+0
2021-03-06tcg/tci: Merge mov, not and neg operationsRichard Henderson1-24/+5
2021-03-06tcg/tci: Merge bswap operationsRichard Henderson1-18/+4
2021-03-06tcg/tci: Merge extension operationsRichard Henderson1-36/+8
2021-03-06tcg/tci: Merge basic arithmetic operationsRichard Henderson1-54/+21
2021-03-06tcg/tci: Reduce use of tci_read_r64Richard Henderson1-51/+42
2021-03-06tcg/tci: Remove tci_read_r32sRichard Henderson1-18/+2