| Age | Commit message (Expand) | Author | Files | Lines |
|---|
| 2022-02-21 | include: Move qemu_[id]cache_* declarations to new qemu/cacheinfo.h | Peter Maydell | 2 | -0/+2 |
| 2022-02-21 | include: Move qemu_mprotect_*() to new qemu/mprotect.h | Peter Maydell | 1 | -0/+1 |
| 2022-02-21 | include: Move qemu_madvise() and related #defines to new qemu/madvise.h | Peter Maydell | 1 | -0/+1 |
| 2022-02-14 | Merge remote-tracking branch 'remotes/rth-gitlab/tags/pull-tcg-20220211' into... | Peter Maydell | 18 | -379/+1293 |
| 2022-02-09 | tracing: remove TCG memory access tracing | Alex Bennée | 1 | -5/+0 |
| 2022-02-09 | tcg/sparc: Support unaligned access for user-only | Richard Henderson | 1 | -8/+211 |
| 2022-02-09 | tcg/sparc: Add tcg_out_jmpl_const for better tail calls | Richard Henderson | 1 | -14/+23 |
| 2022-02-09 | tcg/sparc: Use the constant pool for 64-bit constants | Richard Henderson | 1 | -0/+15 |
| 2022-02-09 | tcg/sparc: Convert patch_reloc to return bool | Richard Henderson | 1 | -2/+6 |
| 2022-02-09 | tcg/sparc: Improve code gen for shifted 32-bit constants | Richard Henderson | 1 | -6/+6 |
| 2022-02-09 | tcg/sparc: Add scratch argument to tcg_out_movi_int | Richard Henderson | 1 | -6/+9 |
| 2022-02-09 | tcg/sparc: Split out tcg_out_movi_imm32 | Richard Henderson | 1 | -15/+21 |
| 2022-02-09 | tcg/sparc: Use tcg_out_movi_imm13 in tcg_out_addsub2_i64 | Richard Henderson | 1 | -3/+7 |
| 2022-02-09 | tcg/mips: Support unaligned access for softmmu | Richard Henderson | 1 | -40/+51 |
| 2022-02-09 | tcg/mips: Support unaligned access for user-only | Richard Henderson | 2 | -8/+328 |
| 2022-02-09 | tcg/arm: Support raising sigbus for user-only | Richard Henderson | 2 | -4/+81 |
| 2022-02-09 | tcg/arm: Reserve a register for guest_base | Richard Henderson | 1 | -11/+28 |
| 2022-02-09 | tcg/arm: Support unaligned access for softmmu | Richard Henderson | 1 | -20/+21 |
| 2022-02-09 | tcg/arm: Check alignment for ldrd and strd | Richard Henderson | 1 | -15/+8 |
| 2022-02-09 | tcg/arm: Remove use_armv6_instructions | Richard Henderson | 2 | -166/+27 |
| 2022-02-09 | tcg/arm: Remove use_armv5t_instructions | Richard Henderson | 2 | -31/+7 |
| 2022-02-09 | tcg/arm: Drop support for armv4 and armv5 hosts | Richard Henderson | 1 | -0/+5 |
| 2022-02-09 | tcg/loongarch64: Support raising sigbus for user-only | WANG Xuerui | 2 | -4/+69 |
| 2022-02-09 | tcg/tci: Support raising sigbus for user-only | Richard Henderson | 1 | -6/+14 |
| 2022-02-09 | tcg/s390x: Support raising sigbus for user-only | Richard Henderson | 2 | -4/+57 |
| 2022-02-09 | tcg/riscv: Support raising sigbus for user-only | Richard Henderson | 2 | -4/+61 |
| 2022-02-09 | tcg/ppc: Support raising sigbus for user-only | Richard Henderson | 2 | -10/+90 |
| 2022-02-09 | tcg/aarch64: Support raising sigbus for user-only | Richard Henderson | 2 | -19/+74 |
| 2022-02-09 | tcg/i386: Support raising sigbus for user-only | Richard Henderson | 2 | -7/+98 |
| 2022-02-09 | tcg/loongarch64: Fix fallout from recent MO_Q renaming | WANG Xuerui | 1 | -1/+1 |
| 2022-02-04 | cpuid: use unsigned for max cpuid | Michael S. Tsirkin | 1 | -1/+1 |
| 2022-01-08 | exec/memop: Adding signedness to quad definitions | Frédéric Pétrot | 10 | -56/+56 |
| 2022-01-04 | tcg/optimize: Fix folding of vector ops | Richard Henderson | 1 | -11/+38 |
| 2021-12-21 | tcg/loongarch64: Register the JIT | WANG Xuerui | 1 | -0/+44 |
| 2021-12-21 | tcg/loongarch64: Implement tcg_target_init | WANG Xuerui | 1 | -0/+27 |
| 2021-12-21 | tcg/loongarch64: Implement exit_tb/goto_tb | WANG Xuerui | 1 | -0/+19 |
| 2021-12-21 | tcg/loongarch64: Implement tcg_target_qemu_prologue | WANG Xuerui | 1 | -0/+68 |
| 2021-12-21 | tcg/loongarch64: Add softmmu load/store helpers, implement qemu_ld/qemu_st ops | WANG Xuerui | 2 | -0/+355 |
| 2021-12-21 | tcg/loongarch64: Implement simple load/store ops | WANG Xuerui | 2 | -0/+132 |
| 2021-12-21 | tcg/loongarch64: Implement tcg_out_call | WANG Xuerui | 1 | -0/+34 |
| 2021-12-21 | tcg/loongarch64: Implement setcond ops | WANG Xuerui | 2 | -0/+70 |
| 2021-12-21 | tcg/loongarch64: Implement br/brcond ops | WANG Xuerui | 2 | -0/+54 |
| 2021-12-21 | tcg/loongarch64: Implement mul/mulsh/muluh/div/divu/rem/remu ops | WANG Xuerui | 3 | -8/+74 |
| 2021-12-21 | tcg/loongarch64: Implement add/sub ops | WANG Xuerui | 2 | -0/+40 |
| 2021-12-21 | tcg/loongarch64: Implement shl/shr/sar/rotl/rotr ops | WANG Xuerui | 3 | -2/+94 |
| 2021-12-21 | tcg/loongarch64: Implement clz/ctz ops | WANG Xuerui | 3 | -4/+47 |
| 2021-12-21 | tcg/loongarch64: Implement bswap{16,32,64} ops | WANG Xuerui | 2 | -5/+37 |
| 2021-12-21 | tcg/loongarch64: Implement deposit/extract ops | WANG Xuerui | 3 | -4/+26 |
| 2021-12-21 | tcg/loongarch64: Implement not/and/or/xor/nor/andc/orc ops | WANG Xuerui | 3 | -8/+98 |
| 2021-12-21 | tcg/loongarch64: Implement sign-/zero-extension ops | WANG Xuerui | 3 | -12/+95 |
