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path: root/tcg/tci/tcg-target.c.inc
AgeCommit message (Expand)AuthorFilesLines
2021-06-19tcg/tci: Implement movcondRichard Henderson1-3/+7
2021-06-19tcg/tci: Implement goto_ptrRichard Henderson1-0/+16
2021-06-19tcg/tci: Change encoding to uint32_t unitsRichard Henderson1-208/+169
2021-06-19tcg/tci: Emit setcond before brcondRichard Henderson1-34/+18
2021-06-19tcg/tci: Reserve r13 for a temporaryRichard Henderson1-0/+1
2021-06-19tcg/tci: Use ffi for callsRichard Henderson1-26/+24
2021-06-19tcg/tci: Move call-return regs to end of tcg_target_reg_alloc_orderRichard Henderson1-2/+2
2021-06-19tcg/tci: Improve tcg_target_call_clobber_regsRichard Henderson1-2/+8
2021-06-04tcg: Change parameters for tcg_target_const_matchRichard Henderson1-4/+2
2021-03-17tcg: Fix prototypes for tcg_out_vec_op and tcg_out_opMiroslav Rezanina1-2/+3
2021-03-17tcg/tci: Split out tcg_out_op_r[iI]Richard Henderson1-15/+35
2021-03-17tcg/tci: Split out tcg_out_op_vRichard Henderson1-4/+10
2021-03-17tcg/tci: Split out tcg_out_op_{rrm,rrrm,rrrrm}Richard Henderson1-17/+53
2021-03-17tcg/tci: Split out tcg_out_op_rrrrclRichard Henderson1-8/+19
2021-03-17tcg/tci: Split out tcg_out_op_rrrrRichard Henderson1-6/+15
2021-03-17tcg/tci: Split out tcg_out_op_rrrrrrRichard Henderson1-8/+19
2021-03-17tcg/tci: Split out tcg_out_op_rrclRichard Henderson1-6/+15
2021-03-17tcg/tci: Split out tcg_out_op_rrrbbRichard Henderson1-7/+16
2021-03-17tcg/tci: Split out tcg_out_op_rrrrrcRichard Henderson1-9/+21
2021-03-17tcg/tci: Split out tcg_out_op_rrrcRichard Henderson1-6/+15
2021-03-17tcg/tci: Split out tcg_out_op_rrrRichard Henderson1-5/+14
2021-03-17tcg/tci: Split out tcg_out_op_rrRichard Henderson1-13/+23
2021-03-17tcg/tci: Split out tcg_out_op_pRichard Henderson1-6/+12
2021-03-17tcg/tci: Split out tcg_out_op_lRichard Henderson1-3/+11
2021-03-17tcg/tci: Split out tcg_out_op_rrsRichard Henderson1-43/+37
2021-03-17tcg/tci: Push opcode emit into each caseRichard Henderson1-3/+32
2021-03-17tcg/tci: Remove tci_disasRichard Henderson1-10/+0
2021-03-17tcg/tci: Reduce qemu_ld/st TCGMemOpIdx operand to 32-bitsRichard Henderson1-2/+2
2021-03-17tcg/tci: Clean up deposit operationsRichard Henderson1-10/+14
2021-03-17tcg/tci: Reuse tci_args_l for goto_tbRichard Henderson1-10/+3
2021-03-17tcg/tci: Reuse tci_args_l for exit_tbRichard Henderson1-1/+1
2021-03-06tcg/tci: Merge identical cases in generation (load/store opcodes)Richard Henderson1-35/+14
2021-03-06tcg/tci: Merge identical cases in generation (conditional opcodes)Richard Henderson1-17/+6
2021-03-06tcg/tci: Merge identical cases in generation (deposit opcode)Richard Henderson1-10/+2
2021-03-06tcg/tci: Merge identical cases in generation (exchange opcodes)Richard Henderson1-21/+14
2021-03-06tcg/tci: Merge identical cases in generation (arithmetic opcodes)Richard Henderson1-48/+37
2021-02-05tcg/tci: Remove TCG_CONSTRichard Henderson1-64/+21
2021-02-05tcg/tci: Fix TCG_REG_R4 misusageRichard Henderson1-6/+1
2021-02-05tcg/tci: Restrict TCG_TARGET_NB_REGS to 16Richard Henderson1-26/+0
2021-02-05tcg/tci: Implement 64-bit divisionRichard Henderson1-6/+4
2021-02-05tcg/tci: Remove dead code for TCG_TARGET_HAS_div2_*Richard Henderson1-8/+0
2021-02-05tcg/tci: Move stack bounds check to compile-timeRichard Henderson1-0/+13
2021-02-02tcg/tci: Split out constraint sets to tcg-target-con-set.hRichard Henderson1-142/+131
2021-02-02tcg/tci: Split out target constraints to tcg-target-con-str.hRichard Henderson1-14/+0
2021-02-02tcg/tci: Remove TCG_TARGET_HAS_* ifdefsRichard Henderson1-82/+0
2021-02-02tcg/tci: Drop L and S constraintsRichard Henderson1-6/+4
2021-01-13tcg: Remove movi and dupi opcodesRichard Henderson1-2/+0
2021-01-13tcg/tci: Add special tci_movi_{i32,i64} opcodesRichard Henderson1-2/+2
2021-01-07tcg: Adjust tcg_out_call for constRichard Henderson1-1/+1
2020-10-08tcg: Remove TCG_CT_REGRichard Henderson1-1/+0
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