aboutsummaryrefslogtreecommitdiff
path: root/tcg/tcg.c
AgeCommit message (Expand)AuthorFilesLines
2020-08-21meson: rename included C source files to .c.incPaolo Bonzini1-3/+3
2020-06-16tcg: call qemu_spin_destroy for tb->jmp_lockEmilio G. Cota1-0/+9
2020-06-02tcg: Improve move ops in liveness_pass_2Richard Henderson1-22/+56
2020-06-02tcg: Implement gvec support for rotate by scalarRichard Henderson1-0/+2
2020-06-02tcg: Implement gvec support for rotate by vectorRichard Henderson1-0/+3
2020-06-02tcg: Implement gvec support for rotate by immediateRichard Henderson1-0/+2
2020-05-15disas: include an optional note for the start of disassemblyAlex Bennée1-2/+2
2020-01-15tcg: Search includes from the project root source directoryPhilippe Mathieu-Daudé1-1/+1
2019-12-18Add use of RCU for qemu_logfile.Robert Foley1-2/+10
2019-12-18qemu_log_lock/unlock now preserves the qemu_logfile handle.Robert Foley1-8/+8
2019-10-28plugin-gen: add module for TCG-related codeEmilio G. Cota1-0/+22
2019-09-03tcg: TCGMemOp is now accelerator independent MemOpTony Nguyen1-1/+1
2019-08-20configure: Define target access alignment in configuretony.nguyen@bt.com1-1/+1
2019-08-16Clean up inclusion of exec/cpu-common.hMarkus Armbruster1-1/+0
2019-07-05general: Replace global smp variables with smp machine propertiesLike Xu1-1/+12
2019-05-22tcg: Add support for vector compare selectRichard Henderson1-0/+3
2019-05-22tcg: Add support for vector bitwise selectRichard Henderson1-0/+2
2019-05-13tcg: Add support for vector absolute valueRichard Henderson1-0/+2
2019-05-13tcg: Add INDEX_op_dupm_vecRichard Henderson1-0/+1
2019-05-13tcg: Add tcg_out_dupm_vec to the backend interfaceRichard Henderson1-1/+18
2019-05-13tcg: Manually expand INDEX_op_dup_vecRichard Henderson1-0/+111
2019-05-13tcg: Promote tcg_out_{dup,dupi}_vec to backend interfaceRichard Henderson1-0/+14
2019-05-13tcg: Support cross-class moves without instruction supportRichard Henderson1-3/+28
2019-05-13tcg: Return bool success from tcg_out_movRichard Henderson1-4/+10
2019-05-13tcg: Assert fixed_reg is read-onlyRichard Henderson1-47/+40
2019-04-24tcg: Restart TB generation after out-of-line ldst overflowRichard Henderson1-3/+4
2019-04-24tcg: Restart TB generation after constant pool overflowRichard Henderson1-4/+5
2019-04-24tcg: Restart TB generation after relocation overflowRichard Henderson1-32/+29
2019-04-24tcg: Restart after TB code generation overflowRichard Henderson1-0/+4
2019-04-24tcg: Add INDEX_op_extract2_{i32,i64}Richard Henderson1-0/+4
2019-04-18tcg: Simplify how dump_exec_info() printsMarkus Armbruster1-20/+21
2019-04-18tcg: Simplify how dump_opcount_info() printsMarkus Armbruster1-4/+5
2019-02-11tcg: Diagnose referenced labels that have not been emittedRichard Henderson1-0/+23
2019-01-28tcg: Add opcodes for vector minmax arithmeticRichard Henderson1-0/+5
2019-01-28tcg: Add opcodes for vector saturated arithmeticRichard Henderson1-0/+5
2019-01-11qemu/queue.h: simplify reverse access to QTAILQPaolo Bonzini1-2/+2
2018-12-26tcg: Improve call argument loadingRichard Henderson1-1/+2
2018-12-26tcg: Record register preferences during livenessRichard Henderson1-32/+165
2018-12-26tcg: Add TCG_OPF_BB_EXITRichard Henderson1-1/+4
2018-12-26tcg: Split out more subroutines from liveness_pass_1Richard Henderson1-12/+23
2018-12-26tcg: Rename and adjust liveness_pass_1 helpersRichard Henderson1-8/+5
2018-12-26tcg: Reindent parts of liveness_pass_1Richard Henderson1-67/+70
2018-12-26tcg: Dump register preference info with livenessRichard Henderson1-7/+37
2018-12-26tcg: Improve register allocation for matching constraintsRichard Henderson1-12/+24
2018-12-26tcg: Add output_pref to TCGOpRichard Henderson1-7/+11
2018-12-26tcg: Add preferred_reg argument to tcg_reg_alloc_do_moviRichard Henderson1-4/+5
2018-12-26tcg: Add preferred_reg argument to temp_syncRichard Henderson1-8/+8
2018-12-26tcg: Add preferred_reg argument to temp_loadRichard Henderson1-9/+9
2018-12-26tcg: Add preferred_reg argument to tcg_reg_allocRichard Henderson1-22/+81
2018-12-26tcg: Add reachable_code_passRichard Henderson1-0/+76