riscv-gnu-toolchain/qemu.git - Unnamed repository; edit this file 'description' to name the repository.

Age	Commit message (Collapse)	Author	Files	Lines
2014-09-29	tcg-aarch64: Use 32-bit loads for qemu_ld_i32	Richard Henderson	1	-2/+3
	The "old" qemu_ld opcode did not specify the size of the result, and so we had to assume full register width. With the new opcodes, we can narrow the result. Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-05-12	tcg: Define tcg_insn_unit for code pointers	Richard Henderson	1	-2/+2
	To be defined by the tcg backend based on the elemental unit of the ISA. During the transition, allow TCG_TARGET_INSN_UNIT_SIZE to be undefined, which allows us to default tcg_insn_unit to the current uint8_t. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-04-18	tcg: Fix warning (1 bit signed bitfield entry) and replace int by bool	Stefan Weil	1	-1/+1
	Static code analyzers complain about signed bitfields with only a single bit. is_ld is used as a boolean value, so make it bool. ppc64 already used bool for the 2nd argument is_ld of the local function add_qemu_ldst_label. Modify all other TCG targets to do follow this example. Signed-off-by: Stefan Weil <sw@weilnetz.de> Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-10-12	tcg: Use TCGMemOp for TCGLabelQemuLdst.opc	Richard Henderson	1	-1/+1
	Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-10-10	tcg: Add tcg-be-ldst.h	Richard Henderson	1	-0/+90
	Move TCGLabelQemuLdst and related stuff out of tcg.h. Signed-off-by: Richard Henderson <rth@twiddle.net>