aboutsummaryrefslogtreecommitdiff
path: root/tcg/sparc
AgeCommit message (Collapse)AuthorFilesLines
2014-04-28tcg-sparc: Accept stores of zeroRichard Henderson1-2/+2
Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-04-28tcg-sparc: Fix small 32-bit moviRichard Henderson1-0/+5
We tested imm13 before discarding garbage high bits. Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-04-28tcg-sparc: Fixup function argument typesRichard Henderson1-66/+51
Use TCGReg everywhere appropriate. Use int32_t for all arguments that may be registers or immediate constants. Merge tcg_out_addi into its only caller. Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-04-28tcg-sparc: Hoist common argument loads in tcg_out_opRichard Henderson1-63/+60
Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-04-28tcg-sparc: Don't handle mov/movi in tcg_out_opRichard Henderson1-7/+6
Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-04-28tcg-sparc: Tidy check_fit_* testsRichard Henderson1-15/+20
Use sextract instead of raw bit shifting for the tests. Introduce a new check_fit_ptr macro to make it clear we're looking at pointers. Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-04-28tcg-sparc: Implement muls2_i32Richard Henderson2-4/+16
Using the 32-bit SMUL is a tad more efficient than resorting to extending and using the 64-bit MULX. Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-04-28tcg-sparc: Use the RETURN instructionRichard Henderson1-4/+10
Saves one insn per TB exit over JMPL+RESTORE. Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-04-28tcg-sparc: Use 64-bit registers with sparcv8plusRichard Henderson2-354/+185
Quite a lot of effort was spent composing and decomposing 64-bit quantities in registers, when we should just create them and leave them as one 64-bit register. Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-04-28tcg-sparc: Support trunc_shr_i32Richard Henderson2-1/+9
Unlike a 64-bit shift op, allows the output to be in %l or %i registers for sparcv8plus. Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-04-28tcg-sparc: Remove most uses of TCG_TARGET_REG_BITSRichard Henderson1-33/+37
Replace with SPARC64 define. Soon even sparcv8plus will use 64-bit register as far as TCG is concerned. Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-04-28tcg: Add INDEX_op_trunc_shr_i32Richard Henderson1-0/+1
Let the backend do something special for truncation. Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-04-18tcg: Use HOST_WORDS_BIGENDIANRichard Henderson1-2/+0
Instead of rolling a local TCG_TARGET_WORDS_BIGENDIAN. Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-04-18tcg-sparc: Use the type parameter to tcg_target_const_matchRichard Henderson1-1/+7
Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-04-18tcg: Add TCGType parameter to tcg_target_const_matchRichard Henderson1-1/+1
Most 64-bit targets need to be able to ignore the high bits of a TCG_TYPE_I32 value. Suggested-by: Stuart Brady <sdb@zubnet.me.uk> Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-03-17tcg-sparc: Convert to new ldst opcodesRichard Henderson2-100/+53
Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-03-17tcg-sparc: Convert to new ldst helpersRichard Henderson1-59/+131
All of the helpers with the explicit big/little endian option require the return address as a parameter. Acquire this via a trampoline. Move the load of areg0 into the trampoline. Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-03-17tcg-sparc: Tidy tcg_out_tlb_load interfaceRichard Henderson1-40/+30
Pass address registers explicitly, rather than as indicies of args[]. It's two argument registers either way. Use more TCGReg as appropriate. Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-03-17tcg-sparc: Use TCGMemOp within qemu_ldst routinesRichard Henderson1-51/+65
Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-03-17tcg-sparc: Improve tcg_out_moviRichard Henderson1-21/+31
If bits 31:13 are zero, reduce the insn count by one. Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-03-17tcg-sparc: Dont handle constant arguments to ext32 opsRichard Henderson1-12/+4
Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-03-17tcg-sparc: Don't handle remainderRichard Henderson2-23/+2
The generic fallback is exactly what we implemented. Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-03-17tcg-sparc: Use intptr_t as appropriateRichard Henderson1-11/+9
Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-03-17tcg-sparc: Tidy call+jump patternsRichard Henderson1-19/+19
Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-03-17tcg-sparc: Fix tlb readRichard Henderson1-21/+15
We were computing the full address into %o0 and then not using it. Adjust some of the computation to rely less on having to pull immediate values into registers. Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-03-17tcg-sparc: Fix ld64 for 32-bit modeRichard Henderson1-0/+1
Since were not using an annulled branch, we need to put a nop in the delay slot. Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-10-10tcg: Add qemu_ld_st_i32/64Richard Henderson1-0/+2
Step two in the transition, adding the new ldst opcodes. Keep the old opcodes around until all backends support the new opcodes. Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-10-10tcg: Add tcg-be-null.hRichard Henderson1-0/+2
This is a no-op backend data implementation, for those targets that are not currently using the load/store optimization path. This is prepatory to always requiring these functions in all backends. Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-09-20tcg-sparc: Fix parenthesis warningRichard Henderson1-1/+1
error: suggest parentheses around comparison in operand of ‘&’ [-Werror=parentheses] Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
2013-09-02exec: Split softmmu_defs.hRichard Henderson1-2/+0
The _cmmu helpers can be moved to exec-all.h. The helpers that are used from TCG will shortly need access to tcg_target_long so move their declarations into tcg.h. This requires minor include adjustments to all TCG backends. Reviewed-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-09-02tcg: Change tcg_out_ld/st offset to intptr_tRichard Henderson1-2/+2
Reviewed-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-09-02tcg: Change relocation offsets to intptr_tRichard Henderson1-3/+3
Reviewed-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-09-02tcg: Allow TCG_TARGET_REG_BITS to be specified independantlyRichard Henderson1-0/+8
There are several hosts for which it would be useful to use the available 64-bit registers in a 32-bit pointer environment. Reviewed-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-09-02tcg: Change flush_icache_range arguments to uintptr_tRichard Henderson1-8/+4
Reviewed-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-09-02tcg: Add muluh and mulsh opcodesRichard Henderson1-0/+4
Use them in places where mulu2 and muls2 are used. Optimize mulx2 with dead low part to mulxh. Reviewed-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-07-09tcg: Move the CIE and FDE header definitions to common codeRichard Henderson1-25/+10
These will necessarily be the same layout for all hosts. This limits the amount of boilerplate required to implement jit debug for a host. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-07-09tcg: Split rem requirement from div requirementRichard Henderson1-0/+2
There are several hosts with only a "div" insn. Remainder is computed manually from the quotient and inputs. We can do this generically. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-03-03tcg-sparc: fix buildBlue Swirl1-1/+1
Fix build breakage by 803d805bcef4ea7b7d6ef0b4929263e1160d6b3c: make tcg_out_addsub2() always available. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2013-02-23tcg: Add signed multiword multiplication operationsRichard Henderson1-0/+2
Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2013-02-23tcg: Add 64-bit multiword arithmetic operationsRichard Henderson1-0/+3
Matching the 32-bit multiword arithmetic that we already have. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2013-02-23tcg-sparc: Always implement 32-bit multiword opsRichard Henderson2-6/+7
Cc: Blue Swirl <blauwirbel@gmail.com> Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2013-02-23tcg: Make 32-bit multiword operations optional for 64-bit hostsRichard Henderson1-0/+4
Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-12-19exec: move include files to include/exec/Paolo Bonzini1-1/+1
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2012-12-19janitor: add guards to headersPaolo Bonzini1-0/+3
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2012-10-19Merge branch 'linux-user-for-upstream' of ↵Aurelien Jarno1-2/+0
git://git.linaro.org/people/rikuvoipio/qemu * 'linux-user-for-upstream' of git://git.linaro.org/people/rikuvoipio/qemu: linux-user: register align p{read, write}64 linux-user: ppc: mark as long long aligned tcg: Remove TCG_TARGET_HAS_GUEST_BASE define configure: Remove unnecessary host_guest_base code linux-user: If loading fails, print error as string, not number linux-user: Fix siginfo handling alpha-linux-user: Fix sigaltstack structure definition linux-user: Implement gethostname linux-user: Perform more checks on iovec lists linux-user: fix multi-threaded /proc/self/maps linux-user: fix statfs
2012-10-13tcg-sparc: Emit MOVR insns for setcond_i64 and movcond_64Richard Henderson1-5/+30
Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-10-13tcg-sparc: Emit BPr insns for brcond_i64Richard Henderson1-2/+47
Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-10-13tcg-sparc: Drop use of Bicc in favor of BPccRichard Henderson1-160/+145
Now that we're always sparcv9, we can not bother using Bicc for 32-bit branches and BPcc for 64-bit branches and instead always use BPcc. New interfaces allow less direct use of tcg_out32 and raw numbers inside the qemu_ld/st routines. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-10-13tcg-sparc: Optimize setcond2 equality compare with 0.Richard Henderson1-3/+12
Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-10-13tcg-sparc: Use Z constraint for %g0Richard Henderson2-60/+66
Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
generated by cgit v1.1 at 2024-12-25 02:01:25 +0000