| Age | Commit message (Expand) | Author | Files | Lines |
|---|
| 2023-05-25 | tcg/riscv: Support CTZ, CLZ from Zbb | Richard Henderson | 1 | -0/+35 |
| 2023-05-25 | tcg/riscv: Implement movcond | Richard Henderson | 1 | -1/+138 |
| 2023-05-25 | tcg/riscv: Improve setcond expansion | Richard Henderson | 1 | -36/+114 |
| 2023-05-25 | tcg/riscv: Support CPOP from Zbb | Richard Henderson | 1 | -0/+9 |
| 2023-05-25 | tcg/riscv: Support REV8 from Zbb | Richard Henderson | 1 | -0/+29 |
| 2023-05-25 | tcg/riscv: Support rotates from Zbb | Richard Henderson | 1 | -0/+34 |
| 2023-05-25 | tcg/riscv: Use ADD.UW for guest address generation | Richard Henderson | 1 | -11/+22 |
| 2023-05-25 | tcg/riscv: Support ADD.UW, SEXT.B, SEXT.H, ZEXT.H from Zba+Zbb | Richard Henderson | 1 | -8/+24 |
| 2023-05-25 | tcg/riscv: Support ANDN, ORN, XNOR from Zbb | Richard Henderson | 1 | -0/+41 |
| 2023-05-25 | tcg/riscv: Probe for Zba, Zbb, Zicond extensions | Richard Henderson | 1 | -0/+96 |
| 2023-05-16 | tcg: Add page_bits and page_mask to TCGContext | Richard Henderson | 1 | -2/+2 |
| 2023-05-16 | tcg: Split INDEX_op_qemu_{ld,st}* for guest address size | Richard Henderson | 1 | -8/+16 |
| 2023-05-16 | tcg/riscv: Use atom_and_align_for_opc | Richard Henderson | 1 | -5/+8 |
| 2023-05-16 | tcg: Introduce tcg_target_has_memory_bswap | Richard Henderson | 1 | -0/+5 |
| 2023-05-16 | tcg/riscv: Support softmmu unaligned accesses | Richard Henderson | 1 | -20/+28 |
| 2023-05-16 | tcg/riscv: Use full load/store helpers in user-only mode | Richard Henderson | 1 | -29/+0 |
| 2023-05-16 | tcg: Unify helper_{be,le}_{ld,st}* | Richard Henderson | 1 | -42/+0 |
| 2023-05-11 | tcg/riscv: Simplify constraints on qemu_ld/st | Richard Henderson | 1 | -13/+3 |
| 2023-05-11 | tcg/riscv: Convert tcg_out_qemu_{ld,st}_slow_path | Richard Henderson | 1 | -27/+10 |
| 2023-05-11 | tcg/riscv: Introduce prepare_host_addr | Richard Henderson | 1 | -139/+114 |
| 2023-05-05 | tcg/riscv: Rationalize args to tcg_out_qemu_{ld,st} | Richard Henderson | 1 | -42/+24 |
| 2023-05-05 | tcg/riscv: Require TCG_TARGET_REG_BITS == 64 | Richard Henderson | 1 | -169/+63 |
| 2023-04-23 | tcg/riscv: Conditionalize tcg_out_exts_i32_i64 | Richard Henderson | 1 | -1/+3 |
| 2023-04-23 | tcg: Introduce tcg_out_xchg | Richard Henderson | 1 | -0/+5 |
| 2023-04-23 | tcg: Introduce tcg_out_movext | Richard Henderson | 1 | -11/+2 |
| 2023-04-23 | tcg: Split out tcg_out_extrl_i64_i32 | Richard Henderson | 1 | -4/+6 |
| 2023-04-23 | tcg: Split out tcg_out_extu_i32_i64 | Richard Henderson | 1 | -4/+6 |
| 2023-04-23 | tcg: Split out tcg_out_exts_i32_i64 | Richard Henderson | 1 | -1/+6 |
| 2023-04-23 | tcg: Split out tcg_out_ext32u | Richard Henderson | 1 | -1/+1 |
| 2023-04-23 | tcg: Split out tcg_out_ext32s | Richard Henderson | 1 | -1/+1 |
| 2023-04-23 | tcg: Split out tcg_out_ext16u | Richard Henderson | 1 | -5/+2 |
| 2023-04-23 | tcg: Split out tcg_out_ext16s | Richard Henderson | 1 | -6/+3 |
| 2023-04-23 | tcg: Split out tcg_out_ext8u | Richard Henderson | 1 | -5/+2 |
| 2023-04-23 | tcg: Split out tcg_out_ext8s | Richard Henderson | 1 | -6/+3 |
| 2023-02-04 | tcg: Introduce tcg_target_call_oarg_reg | Richard Henderson | 1 | -4/+6 |
| 2023-02-04 | tcg: Introduce tcg_out_addi_ptr | Richard Henderson | 1 | -0/+7 |
| 2023-01-20 | tcg/riscv: Use tcg_pcrel_diff in tcg_out_ldst | Richard Henderson | 1 | -1/+1 |
| 2023-01-17 | tcg/riscv: Implement direct branch for goto_tb | Richard Henderson | 1 | -2/+17 |
| 2023-01-17 | tcg/riscv: Introduce OPC_NOP | Richard Henderson | 1 | -1/+2 |
| 2023-01-17 | tcg: Remove TCG_TARGET_HAS_direct_jump | Richard Henderson | 1 | -1/+0 |
| 2023-01-17 | tcg: Always define tb_target_set_jmp_target | Richard Henderson | 1 | -0/+6 |
| 2023-01-17 | tcg: Split out tcg_out_goto_tb | Richard Henderson | 1 | -9/+11 |
| 2023-01-17 | tcg: Introduce get_jmp_target_addr | Richard Henderson | 1 | -1/+1 |
| 2023-01-17 | tcg: Replace asserts on tcg_jmp_insn_offset | Richard Henderson | 1 | -1/+1 |
| 2023-01-17 | tcg: Split out tcg_out_exit_tb | Richard Henderson | 1 | -10/+12 |
| 2023-01-06 | Merge tag 'pull-riscv-to-apply-20230106' of https://github.com/alistair23/qem... | Peter Maydell | 1 | -22/+46 |
| 2023-01-06 | tcg/riscv: Fix base register for user-only qemu_ld/st | Richard Henderson | 1 | -17/+22 |
| 2023-01-06 | tcg/riscv: Fix reg overlap case in tcg_out_addsub2 | Richard Henderson | 1 | -2/+8 |
| 2023-01-06 | tcg/riscv: Fix range matched by TCG_CT_CONST_M12 | Richard Henderson | 1 | -3/+16 |
| 2023-01-05 | tcg: Add TCGHelperInfo argument to tcg_out_call | Richard Henderson | 1 | -3/+4 |
