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tcg
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arm
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Author
Files
Lines
2010-04-19
tcg/arm: align 64-bit arguments in function calls
Aurelien Jarno
1
-0
/
+1
2010-04-19
tcg/arm: replace integer values by registers enum
Aurelien Jarno
1
-109
/
+124
2010-04-19
tcg/arm: remove store signed functions
Aurelien Jarno
1
-62
/
+10
2010-04-19
tcg/arm: explicitely list clobbered/reserved regs
Aurelien Jarno
2
-5
/
+11
2010-04-19
tcg/arm: remove SAVE_LR code
Aurelien Jarno
1
-43
/
+0
2010-03-28
tcg/arm: Replace qemu_ld32u (left over from previous commit)
Stefan Weil
1
-1
/
+1
2010-03-26
tcg: Disambiguate qemu_ld32u with 32-bit and 64-bit outputs.
Richard Henderson
1
-2
/
+2
2010-03-26
tcg: Allow target-specific implementation of NOR.
Richard Henderson
1
-0
/
+1
2010-03-26
tcg: Allow target-specific implementation of NAND.
Richard Henderson
1
-0
/
+1
2010-03-26
tcg: Allow target-specific implementation of EQV.
Richard Henderson
1
-0
/
+1
2010-03-26
tcg: Name the opcode enumeration.
Richard Henderson
1
-1
/
+1
2010-03-26
remove remaining occurrences AREG[1-9] and TCG_AREG[1-9]
Paolo Bonzini
1
-2
/
+0
2010-03-20
tcg/arm: don't save/restore r7 in prologue/epilogue
Aurelien Jarno
1
-6
/
+6
2010-03-20
tcg/arm: fix load/store definitions for 32-bit targets
Aurelien Jarno
1
-0
/
+14
2010-03-14
tcg/arm: use helpers for divu/remu
Aurelien Jarno
2
-95
/
+0
2010-03-14
tcg: add div/rem 32-bit helpers
Aurelien Jarno
1
-0
/
+1
2010-03-13
tcg/arm: implement andc op
Aurelien Jarno
2
-1
/
+5
2010-03-13
tcg/arm: correctly save/restore registers in prologue/epilogue
Aurelien Jarno
1
-4
/
+7
2010-03-12
Remove TLB from userspace
Paul Brook
1
-0
/
+2
2010-03-02
tcg/arm: merge the two sets of #define for optional ops
Aurelien Jarno
1
-14
/
+5
2010-03-02
tcg/arm: accept immediate arguments for brcond/setcond
Aurelien Jarno
1
-6
/
+20
2010-03-02
Add a missing break
Andrzej Zaborowski
1
-0
/
+1
2010-03-02
tcg/arm: implement setcond2
Aurelien Jarno
1
-0
/
+11
2010-03-02
tcg/arm: implement setcond
Aurelien Jarno
1
-0
/
+9
2010-03-02
tcg/arm: fix div2/divu2
Aurelien Jarno
1
-6
/
+24
2010-02-20
tcg: Add comments for all optional instructions not implemented.
Richard Henderson
1
-0
/
+14
2009-09-26
ARM back-end: Use sxt[bh] instructions for ext{8, 6}s
Laurent Desnogues
1
-0
/
+10
2009-09-25
Suppress some variants of English in comments
Stefan Weil
1
-2
/
+2
2009-08-25
ARM back-end: Fix encode_imm
Laurent Desnogues
1
-0
/
+2
2009-08-22
ARM back-end: Handle all possible immediates for ALU ops
Laurent Desnogues
1
-5
/
+32
2009-08-22
ARM back-end: Add TCG not
Laurent Desnogues
2
-0
/
+6
2009-07-27
rename WORDS_BIGENDIAN to HOST_WORDS_BIGENDIAN
Juan Quintela
1
-1
/
+1
2009-07-18
this patch improves the ARM back-end in the following way:
Laurent Desnogues
2
-7
/
+37
2009-07-17
Userspace guest address offsetting
Paul Brook
2
-2
/
+34
2009-07-17
ARM host fixes
Paul Brook
2
-4
/
+4
2009-03-13
tcg: rename bswap_i32/i64 functions
aurel32
1
-1
/
+1
2009-03-10
tcg-arm: fix qemu_ld64
aurel32
1
-2
/
+7
2009-03-08
Prune unused TCG_AREGs
blueswir1
1
-1
/
+0
2008-12-07
Fix 64-bit targets compilation on ARM host.
balrog
1
-6
/
+6
2008-12-01
arm: Don't potentially overwrite input registers in add2, sub2.
balrog
1
-4
/
+13
2008-12-01
Don't rely on ARM tcg_out_goto() generating just a single insn.
balrog
1
-8
/
+13
2008-12-01
Use libgcc __clear_cache to clean icache, when available.
balrog
1
-0
/
+5
2008-10-05
Add some missing static and const qualifiers, reg_names only used if NDEBUG set
blueswir1
1
-5
/
+8
2008-08-30
Fix some warnings that would be generated by gcc -Wredundant-decls
blueswir1
1
-9
/
+2
2008-05-25
Fix off-by-one unwinding error.
pbrook
1
-1
/
+0
2008-05-24
Relax a constraint for qemu_ld64 on ARM host.
balrog
1
-4
/
+13
2008-05-24
Fix a deadly typo, correct comments.
balrog
1
-4
/
+6
2008-05-24
Fix ARM host TLB.
pbrook
1
-61
/
+44
2008-05-23
Comment non-obvious calculation. Don't clobber r3 in qemu_st64.
balrog
1
-6
/
+33
2008-05-23
A branch insn must not overwrite the branch target before relocation.
balrog
1
-3
/
+14
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