Age | Commit message (Expand) | Author | Files | Lines |
2011-01-12 | tcg arm/mips/ia64: add a comment about retranslation and caches | Aurelien Jarno | 1 | -0/+3 |
2011-01-10 | tcg/arm: improve constant loading | Aurelien Jarno | 1 | -18/+21 |
2011-01-08 | tcg/arm: fix qemu_st64 for big endian targets | Aurelien Jarno | 1 | -1/+1 |
2011-01-08 | tcg/arm: fix branch target change during code retranslation | Aurelien Jarno | 1 | -8/+20 |
2010-06-09 | tcg: Make some tcg-target.c routines static. | Richard Henderson | 1 | -2/+2 |
2010-06-09 | tcg: Add TYPE parameter to tcg_out_mov. | Richard Henderson | 1 | -1/+1 |
2010-04-25 | tcg/arm: fix condition in zero/sign extension functions | Aurelien Jarno | 1 | -6/+6 |
2010-04-19 | tcg/arm: don't try to load constants using pc | Aurelien Jarno | 1 | -7/+0 |
2010-04-19 | tcg/arm: optimize register allocation order | Aurelien Jarno | 1 | -5/+5 |
2010-04-19 | tcg/arm: fix argument alignment in qemu_st64 | Aurelien Jarno | 1 | -9/+10 |
2010-04-19 | tcg/arm: remove useless register tests in qemu_ld/st | Aurelien Jarno | 1 | -20/+10 |
2010-04-19 | tcg/arm: bswap arguments in qemu_ld/st if needed | Aurelien Jarno | 1 | -69/+159 |
2010-04-19 | tcg/arm: use ext* ops in qemu_ld | Aurelien Jarno | 1 | -18/+12 |
2010-04-19 | tcg/arm: remove conditional argument for qemu_ld/st | Aurelien Jarno | 1 | -51/+49 |
2010-04-19 | tcg/arm: add bswap ops | Aurelien Jarno | 2 | -2/+44 |
2010-04-19 | tcg/arm: add ext16u op | Aurelien Jarno | 2 | -20/+50 |
2010-04-19 | tcg/arm: add rotation ops | Aurelien Jarno | 2 | -1/+20 |
2010-04-19 | tcg/arm: use the blx instruction when possible | Aurelien Jarno | 1 | -4/+12 |
2010-04-19 | tcg/arm: sxtb and sxth are available starting with ARMv6 | Aurelien Jarno | 1 | -2/+2 |
2010-04-19 | tcg/arm: add variables to define the allowed instructions set | Aurelien Jarno | 1 | -39/+84 |
2010-04-19 | tcg/arm: align 64-bit arguments in function calls | Aurelien Jarno | 1 | -0/+1 |
2010-04-19 | tcg/arm: replace integer values by registers enum | Aurelien Jarno | 1 | -109/+124 |
2010-04-19 | tcg/arm: remove store signed functions | Aurelien Jarno | 1 | -62/+10 |
2010-04-19 | tcg/arm: explicitely list clobbered/reserved regs | Aurelien Jarno | 2 | -5/+11 |
2010-04-19 | tcg/arm: remove SAVE_LR code | Aurelien Jarno | 1 | -43/+0 |
2010-03-28 | tcg/arm: Replace qemu_ld32u (left over from previous commit) | Stefan Weil | 1 | -1/+1 |
2010-03-26 | tcg: Disambiguate qemu_ld32u with 32-bit and 64-bit outputs. | Richard Henderson | 1 | -2/+2 |
2010-03-26 | tcg: Allow target-specific implementation of NOR. | Richard Henderson | 1 | -0/+1 |
2010-03-26 | tcg: Allow target-specific implementation of NAND. | Richard Henderson | 1 | -0/+1 |
2010-03-26 | tcg: Allow target-specific implementation of EQV. | Richard Henderson | 1 | -0/+1 |
2010-03-26 | tcg: Name the opcode enumeration. | Richard Henderson | 1 | -1/+1 |
2010-03-26 | remove remaining occurrences AREG[1-9] and TCG_AREG[1-9] | Paolo Bonzini | 1 | -2/+0 |
2010-03-20 | tcg/arm: don't save/restore r7 in prologue/epilogue | Aurelien Jarno | 1 | -6/+6 |
2010-03-20 | tcg/arm: fix load/store definitions for 32-bit targets | Aurelien Jarno | 1 | -0/+14 |
2010-03-14 | tcg/arm: use helpers for divu/remu | Aurelien Jarno | 2 | -95/+0 |
2010-03-14 | tcg: add div/rem 32-bit helpers | Aurelien Jarno | 1 | -0/+1 |
2010-03-13 | tcg/arm: implement andc op | Aurelien Jarno | 2 | -1/+5 |
2010-03-13 | tcg/arm: correctly save/restore registers in prologue/epilogue | Aurelien Jarno | 1 | -4/+7 |
2010-03-12 | Remove TLB from userspace | Paul Brook | 1 | -0/+2 |
2010-03-02 | tcg/arm: merge the two sets of #define for optional ops | Aurelien Jarno | 1 | -14/+5 |
2010-03-02 | tcg/arm: accept immediate arguments for brcond/setcond | Aurelien Jarno | 1 | -6/+20 |
2010-03-02 | Add a missing break | Andrzej Zaborowski | 1 | -0/+1 |
2010-03-02 | tcg/arm: implement setcond2 | Aurelien Jarno | 1 | -0/+11 |
2010-03-02 | tcg/arm: implement setcond | Aurelien Jarno | 1 | -0/+9 |
2010-03-02 | tcg/arm: fix div2/divu2 | Aurelien Jarno | 1 | -6/+24 |
2010-02-20 | tcg: Add comments for all optional instructions not implemented. | Richard Henderson | 1 | -0/+14 |
2009-09-26 | ARM back-end: Use sxt[bh] instructions for ext{8, 6}s | Laurent Desnogues | 1 | -0/+10 |
2009-09-25 | Suppress some variants of English in comments | Stefan Weil | 1 | -2/+2 |
2009-08-25 | ARM back-end: Fix encode_imm | Laurent Desnogues | 1 | -0/+2 |
2009-08-22 | ARM back-end: Handle all possible immediates for ALU ops | Laurent Desnogues | 1 | -5/+32 |