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2019-06-10tcg: Create struct CPUTLBRichard Henderson1-7/+3
2019-05-22tcg/aarch64: Allow immediates for vector ORR and BICRichard Henderson1-7/+83
2019-05-22tcg/aarch64: Build vector immediates with two insnsRichard Henderson1-0/+47
2019-05-22tcg/aarch64: Use MVNI in tcg_out_dupi_vecRichard Henderson1-0/+11
2019-05-22tcg/aarch64: Split up is_fimmRichard Henderson1-84/+119
2019-05-22tcg/aarch64: Support vector bitwise select valueRichard Henderson2-2/+24
2019-05-22tcg: Add support for vector compare selectRichard Henderson1-0/+1
2019-05-22tcg: Add support for vector bitwise selectRichard Henderson1-0/+1
2019-05-13tcg/aarch64: Do not advertise minmax for MO_64Richard Henderson1-4/+4
2019-05-13tcg/aarch64: Support vector absolute valueRichard Henderson2-1/+7
2019-05-13tcg: Add support for vector absolute valueRichard Henderson1-0/+1
2019-05-13tcg/aarch64: Support vector variable shift opcodesRichard Henderson3-1/+45
2019-05-13tcg: Add INDEX_op_dupm_vecRichard Henderson1-0/+4
2019-05-13tcg/aarch64: Implement tcg_out_dupm_vecRichard Henderson1-2/+35
2019-05-13tcg: Add tcg_out_dupm_vec to the backend interfaceRichard Henderson1-0/+6
2019-05-13tcg: Manually expand INDEX_op_dup_vecRichard Henderson1-5/+4
2019-05-13tcg: Promote tcg_out_{dup,dupi}_vec to backend interfaceRichard Henderson1-2/+10
2019-05-13tcg: Return bool success from tcg_out_movRichard Henderson1-2/+3
2019-04-24tcg: Restart TB generation after out-of-line ldst overflowRichard Henderson1-6/+10
2019-04-24tcg/aarch64: Support INDEX_op_extract2_{i32,i64}Richard Henderson2-2/+13
2019-04-24tcg: Add INDEX_op_extract2_{i32,i64}Richard Henderson1-0/+2
2019-01-28cputlb: Remove static tlb sizingRichard Henderson1-1/+0
2019-01-28tcg/aarch64: enable dynamic TLB sizingRichard Henderson2-42/+60
2019-01-28tcg: introduce dynamic TLB sizingEmilio G. Cota1-0/+1
2019-01-28tcg/aarch64: Implement vector minmax arithmeticRichard Henderson2-1/+25
2019-01-28tcg/aarch64: Implement vector saturating arithmeticRichard Henderson2-1/+25
2019-01-28tcg: Add opcodes for vector minmax arithmeticRichard Henderson1-0/+1
2019-01-28tcg: Add opcodes for vector saturated arithmeticRichard Henderson1-0/+1
2018-12-17tcg: Add TCG_TARGET_HAS_MEMORY_BSWAPRichard Henderson1-0/+1
2018-12-17tcg/aarch64: Return false on failure from patch_relocRichard Henderson1-16/+21
2018-12-17tcg: Return success from patch_relocRichard Henderson1-1/+2
2018-12-17tcg/aarch64: Fold away "noaddr" branch routinesRichard Henderson1-19/+2
2018-12-17tcg/aarch64: Remove reloc_pc26_atomicRichard Henderson1-12/+0
2018-07-19tcg/aarch64: limit mul_vec sizeAlex Bennée1-1/+2
2018-06-15tcg: Reduce max TB opcode countRichard Henderson1-1/+1
2018-02-08tcg/aarch64: Add vector operationsRichard Henderson3-47/+569
2017-09-17tcg/aarch64: Fully convert tcg_target_op_defRichard Henderson1-131/+151
2017-09-17tcg: Remove tcg_regset_set32Richard Henderson1-16/+17
2017-09-17tcg: Remove tcg_regset_clearRichard Henderson1-1/+1
2017-09-07tcg/aarch64: Use constant pool for moviRichard Henderson2-30/+33
2017-09-07tcg: Rearrange ldst label trackingRichard Henderson2-1/+6
2017-09-07tcg: Move USE_DIRECT_JUMP discriminator to tcg/cpu/tcg-target.hRichard Henderson2-9/+9
2017-09-05tcg: Add tcg target default memory orderingPranith Kumar1-0/+2
2017-07-09tcg/aarch64: Enable indirect jump path using LDR (literal)Pranith Kumar1-14/+28
2017-07-09tcg/aarch64: Use ADRP+ADD to compute target addressPranith Kumar1-6/+30
2017-07-09tcg/aarch64: Introduce and use long branch to registerPranith Kumar1-2/+13
2017-06-19tcg/aarch64: Use ADR in tcg_out_moviRichard Henderson1-1/+6
2017-06-05tcg/aarch64: Implement goto_ptrRichard Henderson2-3/+21
2017-06-05tcg: Introduce goto_ptr opcode and tcg_gen_lookup_and_goto_ptrEmilio G. Cota1-0/+1
2017-03-01aarch64: Change ext type to TCGType to fix warningsPranith Kumar1-2/+2
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