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Age	Commit message (Collapse)	Author	Files	Lines
2024-02-03	tcg/aarch64: Support TCG_COND_TST{EQ,NE}	Richard Henderson	1	-2/+3
	Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-05-30	tcg/aarch64: Support 128-bit load/store	Richard Henderson	1	-0/+2
	With FEAT_LSE2, LDP/STP suffices. Without FEAT_LSE2, use LDXP+STXP 16-byte atomicity is required and LDP/STP otherwise. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-05-30	tcg/aarch64: Simplify constraints on qemu_ld/st	Richard Henderson	1	-2/+0
	Adjust the softmmu tlb to use TMP[0-2], not any of the normally available registers. Since we handle overlap betwen inputs and helper arguments, we can allow any allocatable reg. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-02-02	tcg/aarch64: Split out constraint sets to tcg-target-con-set.h	Richard Henderson	1	-0/+36
	Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>