| Age | Commit message (Expand) | Author | Files | Lines |
|---|---|---|---|---|
| 2008-12-07 | Remove a few dyngen and dyngen related code | aurel32 | 1 | -17/+4 |
| 2008-11-04 | Mention output overlaps. | pbrook | 1 | -0/+5 |
| 2008-11-03 | tcg-ops.h: add rotl/rotli and rotr/rotri TCG instructions | aurel32 | 1 | -1/+9 |
| 2008-10-21 | TCG: add logical operations found on alpha and powerpc processors | aurel32 | 1 | -0/+20 |
| 2008-09-21 | Add concat32_i64 and concat_tl_i64 ops | blueswir1 | 1 | -0/+4 |
| 2008-09-21 | Add concat_i32_i64 op. | pbrook | 1 | -0/+4 |
| 2008-05-25 | update | bellard | 1 | -62/+57 |
| 2008-05-19 | ARM host support for TCG targets. | balrog | 1 | -1/+1 |
| 2008-05-11 | Add TCG native negation op. | pbrook | 1 | -0/+4 |
| 2008-05-11 | Add zero extension (pseudo-)ops. | pbrook | 1 | -1/+4 |
| 2008-03-12 | TCG README fixes (Stuart Brady) | aurel32 | 1 | -4/+2 |
| 2008-02-04 | fixed sign extensions - added explicit side effect op flag - added discard in... | bellard | 1 | -0/+5 |
| 2008-02-01 | typos | bellard | 1 | -4/+4 |
| 2008-02-01 | TCG code generator | bellard | 1 | -0/+420 |
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index : riscv-gnu-toolchain/qemu.git | |
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