aboutsummaryrefslogtreecommitdiff
path: root/tcg/README
AgeCommit message (Expand)AuthorFilesLines
2018-02-08tcg: Add generic vector ops for multiplicationRichard Henderson1-0/+4
2018-02-08tcg: Add generic vector ops for comparisonsRichard Henderson1-0/+4
2018-02-08tcg: Add generic vector ops for constant shiftsRichard Henderson1-0/+29
2018-02-08tcg: Add types and basic operations for host vectorsRichard Henderson1-0/+49
2017-07-31docs: fix broken paths to docs/devel/atomics.txtPhilippe Mathieu-Daudé1-1/+1
2017-06-05tcg: Introduce goto_ptr opcode and tcg_gen_lookup_and_goto_ptrEmilio G. Cota1-0/+8
2017-01-10tcg: Add clz and ctz opcodesRichard Henderson1-0/+8
2017-01-10tcg: Allow an operand to be matching or a constantRichard Henderson1-4/+9
2017-01-10tcg: Add field extraction primitivesRichard Henderson1-2/+18
2016-10-07qemu-tech: move text from qemu-tech to tcg/READMEPaolo Bonzini1-0/+5
2016-09-16Introduce TCGOpcode for memory barrierPranith Kumar1-0/+17
2016-05-18Fix some typos found by codespellStefan Weil1-1/+1
2016-02-23tcg: Rename tcg-target.c to tcg-target.inc.cPeter Maydell1-2/+3
2015-08-24tcg: Split trunc_shr_i32 opcode into extr[lh]_i64_i32Richard Henderson1-4/+10
2015-08-24tcg: update README about size changing opsAurelien Jarno1-3/+15
2015-08-24tcg: rename trunc_shr_i32 into trunc_shr_i64_i32Aurelien Jarno1-1/+1
2014-04-28tcg: Add INDEX_op_trunc_shr_i32Richard Henderson1-0/+5
2014-04-18tcg: Use "unspecified behavior" for shiftsRichard Henderson1-5/+13
2013-10-10tcg: Add qemu_ld_st_i32/64Richard Henderson1-24/+19
2013-03-22Use proper term in TCG README陳韋任 (Wei-Ren Chen)1-5/+9
2013-02-23tcg: Add signed multiword multiplication operationsRichard Henderson1-0/+4
2013-02-23tcg: Add 64-bit multiword arithmetic operationsRichard Henderson1-12/+14
2012-10-28tcg: rework TCG helper flagsAurelien Jarno1-5/+14
2012-10-28tcg: forbid ld/st function to modify globalsAurelien Jarno1-0/+3
2012-10-06tcg: remove obsolete jmp opAurelien Jarno1-6/+1
2012-09-26tcg: Adjust descriptions of *cond opcodesRichard Henderson1-5/+5
2012-09-22tcg/README: document tcg_gen_goto_tb restrictionsMax Filippov1-1/+2
2012-09-21tcg: Introduce movcondRichard Henderson1-0/+6
2011-07-16tcg/README: Expand advice on number of TCG ops per target insnPeter Maydell1-1/+9
2011-01-20tcg: README, name deposit second argument len/LENEdgar E. Iglesias1-2/+2
2011-01-20tcg: Define "deposit" as an optional operation.Richard Henderson1-0/+14
2011-01-09tcg: fix typo in readmeMike Frysinger1-1/+1
2011-01-09tcg/README: Spelling fixesStefan Weil1-4/+4
2010-04-10tcg/README: improve description of bswap*Aurelien Jarno1-4/+4
2010-03-26tcg: Disambiguate qemu_ld32u with 32-bit and 64-bit outputs.Richard Henderson1-3/+7
2010-03-26tcg: Allow target-specific implementation of EQV.Richard Henderson1-1/+1
2010-03-13tcg: update README with const and pure helpersAurelien Jarno1-4/+7
2010-02-06tcg: generic support for conditional setRichard Henderson1-0/+13
2010-02-06tcg: document double-word support opcodes.Richard Henderson1-0/+23
2009-03-28tcg/README: fix description of bswap32_i32/i64aurel321-1/+1
2009-03-13tcg: update README wrt recent bswap changesaurel321-6/+7
2009-01-03TCG: Fix documentation of qemu_ld/st opsaurel321-11/+11
2008-12-07Remove a few dyngen and dyngen related codeaurel321-17/+4
2008-11-04Mention output overlaps.pbrook1-0/+5
2008-11-03tcg-ops.h: add rotl/rotli and rotr/rotri TCG instructionsaurel321-1/+9
2008-10-21TCG: add logical operations found on alpha and powerpc processorsaurel321-0/+20
2008-09-21Add concat32_i64 and concat_tl_i64 opsblueswir11-0/+4
2008-09-21Add concat_i32_i64 op.pbrook1-0/+4
2008-05-25updatebellard1-62/+57
2008-05-19ARM host support for TCG targets.balrog1-1/+1