riscv-gnu-toolchain/qemu.git - Unnamed repository; edit this file 'description' to name the repository.

Age	Commit message (Expand)	Author	Files	Lines
2021-10-13	monitor: Reduce hmp_info_sev() declaration	Philippe Mathieu-Daudé	2	-2/+2
2021-10-13	target/i386/sev: Move qmp_query_sev() & hmp_info_sev() to sev.c	Philippe Mathieu-Daudé	4	-40/+45
2021-10-13	target/i386/sev: Move qmp_query_sev_launch_measure() to sev.c	Philippe Mathieu-Daudé	4	-21/+20
2021-10-13	target/i386/sev: Move qmp_query_sev_capabilities() to sev.c	Philippe Mathieu-Daudé	4	-9/+7
2021-10-13	target/i386/sev: Move qmp_sev_inject_launch_secret() to sev.c	Philippe Mathieu-Daudé	3	-34/+34
2021-10-13	target/i386/sev: Move qmp_query_sev_attestation_report() to sev.c	Philippe Mathieu-Daudé	4	-12/+13
2021-10-13	target/i386/sev: Remove stubs by using code elision	Philippe Mathieu-Daudé	4	-49/+19
2021-10-13	target/i386/sev: Declare system-specific functions in 'sev.h'	Philippe Mathieu-Daudé	4	-4/+12
2021-10-13	target/i386/sev: Rename sev_i386.h -> sev.h	Philippe Mathieu-Daudé	7	-6/+6
2021-10-13	target/i386/sev: Restrict SEV to system emulation	Philippe Mathieu-Daudé	3	-44/+63
2021-10-13	target/i386/sev: Use g_autofree in sev_launch_get_measure()	Philippe Mathieu-Daudé	1	-9/+4
2021-10-13	target/i386/sev: sev_get_attestation_report use g_autofree	Dr. David Alan Gilbert	1	-8/+3
2021-10-13	target/i386/sev: Mark unreachable code with g_assert_not_reached()	Philippe Mathieu-Daudé	1	-2/+2
2021-10-13	target/i386/sev: Remove sev_get_me_mask()	Philippe Mathieu-Daudé	3	-15/+0
2021-10-13	target/i386/sev_i386.h: Remove unused headers	Philippe Mathieu-Daudé	2	-4/+1
2021-10-13	target/i386/cpu: Add missing 'qapi/error.h' header	Philippe Mathieu-Daudé	1	-0/+1
2021-10-13	target/i386/monitor: Return QMP error when SEV is not enabled for guest	Philippe Mathieu-Daudé	1	-0/+5
2021-10-13	target/i386/sev: Prefix QMP errors with 'SEV'	Philippe Mathieu-Daudé	2	-10/+12
2021-10-13	target/i386/kvm: Restrict SEV stubs to x86 architecture	Philippe Mathieu-Daudé	2	-0/+24
2021-10-13	target/i386/kvm: Introduce i386_softmmu_kvm Meson source set	Philippe Mathieu-Daudé	1	-1/+5
2021-10-12	target/s390x: move tcg_gen_insn_start to s390x_tr_insn_start	Richard Henderson	1	-2/+8
2021-10-07	target/riscv: Set mstatus_hs.[SD\|FS] bits if Clean and V=1 in mark_fs_dirty()	Frank Chang	2	-13/+21
2021-10-07	target/riscv: Remove RVB (replaced by Zb[abcs])	Philipp Tomsich	3	-33/+0
2021-10-07	target/riscv: Add zext.h instructions to Zbb, removing pack/packu/packh	Philipp Tomsich	2	-77/+21
2021-10-07	target/riscv: Add rev8 instruction, removing grev/grevi	Philipp Tomsich	4	-79/+15
2021-10-07	target/riscv: Add a REQUIRE_32BIT macro	Philipp Tomsich	1	-0/+6
2021-10-07	target/riscv: Add orc.b instruction for Zbb, removing gorc/gorci	Philipp Tomsich	4	-55/+18
2021-10-07	target/riscv: Reassign instructions to the Zbb-extension	Philipp Tomsich	2	-41/+50
2021-10-07	target/riscv: Add instructions of the Zbc-extension	Philipp Tomsich	4	-1/+65
2021-10-07	target/riscv: Reassign instructions to the Zbs-extension	Philipp Tomsich	2	-18/+24
2021-10-07	target/riscv: Remove shift-one instructions (proposed Zbo in pre-0.93 draft-B)	Philipp Tomsich	2	-78/+0
2021-10-07	target/riscv: Remove the W-form instructions from Zbs	Philipp Tomsich	2	-63/+0
2021-10-07	target/riscv: Reassign instructions to the Zba-extension	Philipp Tomsich	2	-13/+23
2021-10-07	target/riscv: Add x-zba, x-zbb, x-zbc and x-zbs properties	Philipp Tomsich	2	-0/+8
2021-10-07	target/riscv: clwz must ignore high bits (use shift-left & changed logic)	Philipp Tomsich	1	-3/+5
2021-10-07	target/riscv: fix clzw implementation to operate on arg1	Philipp Tomsich	1	-1/+1
2021-10-07	target/riscv: Introduce temporary in gen_add_uw()	Philipp Tomsich	1	-2/+4
2021-10-06	Merge remote-tracking branch 'remotes/quic/tags/pull-hex-20211006' into staging	Richard Henderson	7	-58/+78
2021-10-06	target/hexagon: Use tcg_constant_*	Philippe Mathieu-Daudé	5	-53/+25
2021-10-06	target/hexagon: Remove unused TCG temporary from predicated loads	Philippe Mathieu-Daudé	1	-2/+0
2021-10-06	Hexagon (target/hexagon) probe the stores in a packet at start of commit	Taylor Simpson	3	-3/+53
2021-10-05	tcg: Rename TCGMemOpIdx to MemOpIdx	Richard Henderson	7	-26/+26
2021-10-05	tcg: Expand MO_SIZE to 3 bits	Richard Henderson	2	-2/+2
2021-10-05	target/xtensa: list cores in a text file	Paolo Bonzini	3	-2/+14
2021-10-05	hexagon: use env keyword argument to pass PYTHONPATH	Paolo Bonzini	1	-1/+2
2021-10-05	sev/i386: Introduce sev_add_kernel_loader_hashes for measured linux boot	Dov Murik	3	-0/+154
2021-10-04	target/sh4: Use lookup_symbol in sh4_tr_disas_log	Richard Henderson	1	-1/+1
2021-10-01	i386: Change the default Hyper-V version to match WS2016	Vitaly Kuznetsov	1	-3/+3
2021-10-01	i386: Make Hyper-V version id configurable	Vitaly Kuznetsov	3	-15/+33
2021-10-01	i386: Implement pseudo 'hv-avic' ('hv-apicv') enlightenment	Vitaly Kuznetsov	4	-1/+15