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2017-10-20s390x/tcg: low-address protection supportDavid Hildenbrand3-45/+62
2017-10-20s390x: refactor error handling for MSCH handlerHalil Pasic1-19/+4
2017-10-20s390x: refactor error handling for HSCH handlerHalil Pasic1-19/+4
2017-10-20s390x: refactor error handling for CSCH handlerHalil Pasic1-10/+4
2017-10-20s390x: refactor error handling for XSCH handlerHalil Pasic1-19/+4
2017-10-20s390x: improve error handling for SSCH and RSCHHalil Pasic1-46/+7
2017-10-20s390x: move s390x_new_cpu() into board codeIgor Mammedov2-21/+0
2017-10-20s390x: fix cpu object referrence leak in s390x_new_cpu()Igor Mammedov1-1/+1
2017-10-20target/s390x: special handling when starting a CPU with WAIT PSWDavid Hildenbrand2-3/+14
2017-10-20s390x/tcg: refactor stfl(e) to use s390_get_feat_block()David Hildenbrand2-39/+29
2017-10-20s390x/tcg: unlock NMIDavid Hildenbrand1-5/+0
2017-10-20s390x/cpumodel: allow to enable SENSE RUNNING STATUS for qemuDavid Hildenbrand1-0/+1
2017-10-20s390x/tcg: switch to new SIGP handling codeDavid Hildenbrand4-40/+11
2017-10-20s390x/tcg: flush the tlb on SIGP SET PREFIXDavid Hildenbrand1-0/+1
2017-10-20s390x/tcg: implement STOP and RESET interrupts for TCGDavid Hildenbrand6-6/+51
2017-10-20s390x/tcg: implement SIGP CONDITIONAL EMERGENCY SIGNALDavid Hildenbrand2-0/+38
2017-10-20s390x/tcg: implement SIGP EMERGENCY SIGNALDavid Hildenbrand1-0/+15
2017-10-20s390x/tcg: implement SIGP EXTERNAL CALLDavid Hildenbrand1-2/+23
2017-10-20s390x/tcg: implement SIGP SENSEDavid Hildenbrand1-0/+29
2017-10-20s390x/tcg: implement SIGP SENSE RUNNING STATUSDavid Hildenbrand2-0/+27
2017-10-20s390x/kvm: factor out actual handling of STOP interruptsDavid Hildenbrand3-8/+16
2017-10-20s390x/kvm: factor out SIGP code into sigp.cDavid Hildenbrand9-359/+385
2017-10-20s390x/kvm: drop two debug printsDavid Hildenbrand1-2/+0
2017-10-20s390x/kvm: factor out storing of adtl CPU statusDavid Hildenbrand3-29/+31
2017-10-20s390x/kvm: factor out storing of CPU statusDavid Hildenbrand3-66/+65
2017-10-20s390x/kvm: generalize SIGP stop and restart interrupt injectionDavid Hildenbrand5-12/+53
2017-10-20s390x/kvm: pass ipb directly into handle_sigp()David Hildenbrand1-3/+3
2017-10-20target/s390x: interpret PSW_MASK_WAIT only for TCGDavid Hildenbrand1-1/+2
2017-10-20s390x/tcg: handle WAIT PSWs during interrupt injectionDavid Hildenbrand1-0/+6
2017-10-20target/s390x: factor out handling of WAIT PSW into s390_handle_wait()David Hildenbrand3-19/+23
2017-10-20s390x/tcg: a CPU cannot switch state due to an interruptDavid Hildenbrand1-1/+0
2017-10-20s390x/tcg: STOPPED cpus can never wake upDavid Hildenbrand1-0/+6
2017-10-20s390x/tcg: take care of external interrupt subclassesDavid Hildenbrand4-13/+50
2017-10-20s390x/tcg: rework checking for deliverable interruptsDavid Hildenbrand4-17/+62
2017-10-20s390x/tcg: injection of emergency signals and external callsDavid Hildenbrand4-2/+50
2017-10-20s390x/tcg: cleanup service interrupt injectionDavid Hildenbrand5-38/+10
2017-10-20s390x/tcg: turn INTERRUPT_EXT into a maskDavid Hildenbrand5-47/+61
2017-10-20S390: use g_new() family of functionsMarc-André Lureau2-7/+7
2017-10-19Merge remote-tracking branch 'remotes/bonzini/tags/for-upstream' into stagingPeter Maydell3-110/+149
2017-10-19Merge remote-tracking branch 'remotes/riku/tags/pull-linux-user-20171018' int...Peter Maydell3-3/+15
2017-10-17ppc: spapr: use generic cpu_model parsingIgor Mammedov3-5/+9
2017-10-17ppc: move ppc_cpu_lookup_alias() before its first userIgor Mammedov1-13/+13
2017-10-17ppc: spapr: register 'host' core type along with the rest of core typesIgor Mammedov1-11/+0
2017-10-17ppc: spapr: use cpu type name directlyIgor Mammedov1-1/+1
2017-10-17ppc: move '-cpu foo,compat=xxx' parsing into ppc_cpu_parse_featurestr()Igor Mammedov2-0/+58
2017-10-17target/ppc: Fix carry flag setting for shift algebraic instructionsSandipan Das2-8/+20
2017-10-17target/ppc: Add POWER9 DD2.0 model informationDavid Gibson2-2/+5
2017-10-17target/ppc: Remove unused PPC 460 and 460F definitionsThomas Huth1-217/+0
2017-10-16target/i386: trap on instructions longer than >15 bytesPaolo Bonzini1-7/+22
2017-10-16target/i386: introduce x86_ld*_codePaolo Bonzini1-103/+125