riscv-gnu-toolchain/qemu.git - Unnamed repository; edit this file 'description' to name the repository.

Age	Commit message (Expand)	Author	Files	Lines
2023-08-24	target/tricore: Replace gen_cond_w with tcg_gen_negsetcond_tl	Richard Henderson	1	-10/+6
2023-08-24	target/sparc: Use tcg_gen_movcond_i64 in gen_edge	Richard Henderson	1	-13/+4
2023-08-24	target/ppc: Use tcg_gen_negsetcond_*	Richard Henderson	2	-7/+7
2023-08-24	target/openrisc: Use tcg_gen_negsetcond_*	Richard Henderson	1	-4/+2
2023-08-24	target/m68k: Use tcg_gen_negsetcond_*	Richard Henderson	1	-14/+10
2023-08-24	target/arm: Use tcg_gen_negsetcond_*	Richard Henderson	2	-21/+13
2023-08-24	target/alpha: Use tcg_gen_movcond_i64 in gen_fold_mzero	Richard Henderson	1	-4/+3
2023-08-24	target/m68k: Use tcg_gen_deposit_i32 in gen_partset_reg	Richard Henderson	1	-9/+2
2023-08-24	include/exec: Replace target_ulong with abi_ptr in cpu_[st\|ld]*()	Anton Johansson	2	-4/+4
2023-08-24	sysemu/hvf: Use vaddr for hvf_arch_[insert\|remove]_hw_breakpoint	Anton Johansson	2	-4/+4
2023-08-24	sysemu/kvm: Use vaddr for kvm_arch_[insert\|remove]_hw_breakpoint	Anton Johansson	4	-20/+13
2023-08-24	Merge tag 'pull-target-arm-20230824' of https://git.linaro.org/people/pmaydel...	Stefan Hajnoczi	15	-171/+367
2023-08-24	Merge tag 'pull-loongarch-20230824' of https://gitlab.com/gaosong/qemu into s...	Stefan Hajnoczi	22	-1084/+1528
2023-08-24	target/loongarch: Split fcc register to fcc0-7 in gdbstub	Jiajie Chen	1	-9/+7
2023-08-24	target/loongarch: cpu: Implement get_arch_id callback	Bibo Mao	2	-0/+9
2023-08-24	target/loongarch: Add avail_IOCSR to check iocsr instructions	Song Gao	2	-9/+9
2023-08-24	target/loongarch: Add avail_LSX to check LSX instructions	Song Gao	2	-661/+823
2023-08-24	target/loongarch: Add avail_LAM to check atomic instructions	Song Gao	2	-36/+37
2023-08-24	target/loongarch: Add avail_LSPW to check LSPW instructions	Song Gao	2	-0/+9
2023-08-24	target/loongarch: Add avail_FP/FP_SP/FP_DP to check fpu instructions	Song Gao	7	-86/+159
2023-08-24	target/loongarch: Add LoongArch32 cpu la132	Jiajie Chen	1	-0/+30
2023-08-24	target/loongarch: Add avail_64 to check la64-only instructions	Song Gao	10	-123/+152
2023-08-24	target/loongarch: Add a check parameter to the TRANS macro	Song Gao	14	-944/+946
2023-08-24	target/loongarch: Sign extend results in VA32 mode	Jiajie Chen	1	-0/+3
2023-08-24	target/loongarch: Truncate high 32 bits of address in VA32 mode	Jiajie Chen	2	-2/+20
2023-08-24	target/loongarch: Extract set_pc() helper	Jiajie Chen	4	-11/+16
2023-08-24	target/loongarch: Extract make_address_pc() helper	Jiajie Chen	3	-3/+8
2023-08-24	target/loongarch: Extract make_address_i() helper	Jiajie Chen	6	-57/+29
2023-08-24	target/loongarch: Extract make_address_x() helper	Jiajie Chen	4	-20/+22
2023-08-24	target/loongarch: Add LA64 & VA32 to DisasContext	Jiajie Chen	3	-0/+18
2023-08-24	target/loongarch: Support LoongArch32 VPPN	Jiajie Chen	2	-7/+22
2023-08-24	target/loongarch: Support LoongArch32 DMW	Jiajie Chen	2	-7/+26
2023-08-24	target/loongarch: Support LoongArch32 TLB entry	Jiajie Chen	2	-9/+17
2023-08-24	target/loongarch: Add GDB support for loongarch32 mode	Jiajie Chen	2	-7/+35
2023-08-24	target/loongarch: Add new object class for loongarch32 cpus	Jiajie Chen	2	-0/+12
2023-08-24	target/loongarch: Add function to check current arch	Jiajie Chen	1	-0/+10
2023-08-24	target/loongarch: Extract 64-bit specifics to loongarch64_cpu_class_init	Philippe Mathieu-Daudé	1	-8/+15
2023-08-24	target/loongarch: Introduce abstract TYPE_LOONGARCH64_CPU	Philippe Mathieu-Daudé	2	-3/+10
2023-08-24	target/loongarch: Fix loongarch_la464_initfn() misses setting LSPW	Song Gao	1	-0/+1
2023-08-24	target/loongarch: Remove duplicated disas_set_info assignment	Philippe Mathieu-Daudé	1	-1/+0
2023-08-24	target/loongarch: Log I/O write accesses to CSR registers	Philippe Mathieu-Daudé	1	-0/+2
2023-08-23	target/s390x: Fix the "ignored match" case in VSTRS	Ilya Leoshkevich	1	-37/+17
2023-08-23	target/s390x: Use a 16-bit immediate in VREP	Ilya Leoshkevich	1	-2/+2
2023-08-23	target/s390x: Fix VSTL with a large length	Ilya Leoshkevich	1	-1/+1
2023-08-23	target/s390x: Check reserved bits of VFMIN/VFMAX's M5	Ilya Leoshkevich	1	-1/+1
2023-08-23	s390x: Convert DPRINTF to trace events	Cédric Le Goater	2	-22/+18
2023-08-22	target/arm: Fix 64-bit SSRA	Richard Henderson	1	-1/+1
2023-08-22	target/arm: Fix SME ST1Q	Richard Henderson	1	-1/+1
2023-08-22	target/arm/helper: Implement CNTHCTL_EL2.CNT[VP]MASK	Jean-Philippe Brucker	4	-14/+68
2023-08-22	target/arm/helper: Check SCR_EL3.{NSE, NS} encoding for AT instructions	Jean-Philippe Brucker	1	-11/+27