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Author
Files
Lines
2018-01-31
target/hppa: Implement PROBE for system mode
Richard Henderson
3
-17
/
+40
2018-01-31
target/hppa: Fix 32-bit operand masks for 0E FCVT
Richard Henderson
1
-7
/
+7
2018-01-31
target/hppa: Enable MTTCG
Richard Henderson
1
-0
/
+6
2018-01-31
target/hppa: Implement STWA
Richard Henderson
1
-1
/
+18
2018-01-31
target/hppa: Implement a pause instruction
Richard Henderson
1
-0
/
+36
2018-01-31
target/hppa: Implement LDSID for system mode
Helge Deller
1
-1
/
+13
2018-01-31
target/hppa: Fix comment
Helge Deller
1
-1
/
+1
2018-01-31
target/hppa: Increase number of temp regs
Richard Henderson
1
-1
/
+1
2018-01-31
target/hppa: Only use EXCP_DTLB_MISS
Richard Henderson
1
-1
/
+3
2018-01-31
target/hppa: Implement B,GATE insn
Richard Henderson
3
-0
/
+57
2018-01-31
target/hppa: Add migration for the cpu
Richard Henderson
4
-0
/
+184
2018-01-31
target/hppa: Add system registers to gdbstub
Richard Henderson
1
-0
/
+156
2018-01-31
target/hppa: Optimize for flat addressing space
Richard Henderson
2
-10
/
+30
2018-01-31
target/hppa: Implement halt and reset instructions
Helge Deller
3
-1
/
+39
2018-01-30
target/hppa: Implement SYNCDMA insn
Richard Henderson
1
-1
/
+2
2018-01-30
target/hppa: Implement LCI
Richard Henderson
1
-0
/
+20
2018-01-30
target/hppa: Implement LPA
Richard Henderson
5
-5
/
+58
2018-01-30
target/hppa: Implement LDWA
Richard Henderson
1
-0
/
+38
2018-01-30
target/hppa: Implement P*TLB and P*TLBE insns
Richard Henderson
3
-0
/
+79
2018-01-30
target/hppa: Implement I*TLBA and I*TLBP insns
Richard Henderson
3
-4
/
+132
2018-01-30
target/hppa: Log unimplemented instructions
Richard Henderson
1
-0
/
+2
2018-01-30
target/hppa: Implement the interval timer
Richard Henderson
6
-4
/
+67
2018-01-30
target/hppa: Implement external interrupts
Richard Henderson
5
-1
/
+83
2018-01-30
target/hppa: Implement tlb_fill
Richard Henderson
3
-10
/
+197
2018-01-30
target/hppa: Implement IASQ
Richard Henderson
6
-27
/
+179
2018-01-30
target/hppa: Avoid privilege level decrease during branches
Richard Henderson
1
-5
/
+47
2018-01-30
target/hppa: Use space registers in data operations
Richard Henderson
2
-147
/
+201
2018-01-30
target/hppa: Implement unaligned access trap
Richard Henderson
1
-1
/
+18
2018-01-30
target/hppa: Fill in hppa_cpu_do_interrupt/hppa_cpu_exec_interrupt
Richard Henderson
5
-66
/
+192
2018-01-30
target/hppa: Implement rfi
Richard Henderson
4
-2
/
+55
2018-01-30
target/hppa: Adjust insn mask for mfctl,w
Richard Henderson
1
-1
/
+1
2018-01-30
target/hppa: Add control registers
Richard Henderson
4
-35
/
+72
2018-01-30
target/hppa: Add space registers
Richard Henderson
3
-11
/
+77
2018-01-30
target/hppa: Implement the system mask instructions
Richard Henderson
3
-1
/
+113
2018-01-30
target/hppa: Implement mmu_idx from IA privilege level
Richard Henderson
3
-26
/
+50
2018-01-30
target/hppa: Split address size from register size
Richard Henderson
6
-414
/
+683
2018-01-30
target/hppa: Define hardware exception types
Richard Henderson
5
-30
/
+88
2018-01-30
target/hppa: Disable gateway page emulation for system mode
Richard Henderson
1
-10
/
+17
2018-01-30
target/hppa: Define the rest of the PSW
Richard Henderson
2
-14
/
+86
2018-01-30
target/hppa: Skeleton support for hppa-softmmu
Helge Deller
6
-13
/
+72
2018-01-29
target/ppc/kvm: Add cap_ppc_safe_[cache/bounds_check/indirect_branch]
Suraj Jitindar Singh
2
-0
/
+76
2018-01-26
Merge remote-tracking branch 'remotes/vivier/tags/m68k-for-2.12-pull-request'...
Peter Maydell
57
-186
/
+1145
2018-01-25
target/m68k: add HMP command "info tlb"
Laurent Vivier
3
-0
/
+235
2018-01-25
target/m68k: add pflush/ptest
Laurent Vivier
6
-0
/
+113
2018-01-25
target/m68k: add moves
Laurent Vivier
5
-7
/
+98
2018-01-25
target/m68k: add index parameter to gen_load()/gen_store() and Co.
Laurent Vivier
1
-59
/
+66
2018-01-25
target/m68k: add Transparent Translation
Laurent Vivier
4
-0
/
+104
2018-01-25
target/m68k: add MC68040 MMU
Laurent Vivier
6
-16
/
+423
2018-01-25
accel/tcg: add size paremeter in tlb_fill()
Laurent Vivier
53
-105
/
+108
2018-01-25
target/m68k: fix TCG variable double free
Laurent Vivier
1
-1
/
+0
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