| Age | Commit message (Expand) | Author | Files | Lines |
|---|
| 2021-06-02 | docs: fix references to docs/devel/tracing.rst | Stefano Garzarella | 8 | -8/+8 |
| 2021-05-28 | Merge remote-tracking branch 'remotes/rth-gitlab/tags/pull-tcg-20210526' into... | Peter Maydell | 25 | -79/+229 |
| 2021-05-27 | Merge remote-tracking branch 'remotes/vivier/tags/m68k-for-6.1-pull-request' ... | Peter Maydell | 2 | -8/+51 |
| 2021-05-26 | hw/core: Constify TCGCPUOps | Richard Henderson | 21 | -22/+22 |
| 2021-05-26 | target/mips: Fold jazz behaviour into mips_cpu_do_transaction_failed | Richard Henderson | 2 | -1/+5 |
| 2021-05-26 | cpu: Move CPUClass::get_paging_enabled to SysemuCPUOps | Philippe Mathieu-Daudé | 1 | -1/+3 |
| 2021-05-26 | cpu: Move CPUClass::get_memory_mapping to SysemuCPUOps | Philippe Mathieu-Daudé | 1 | -1/+1 |
| 2021-05-26 | cpu: Move CPUClass::get_phys_page_debug to SysemuCPUOps | Philippe Mathieu-Daudé | 19 | -19/+19 |
| 2021-05-26 | cpu: Move CPUClass::asidx_from_attrs to SysemuCPUOps | Philippe Mathieu-Daudé | 2 | -2/+2 |
| 2021-05-26 | cpu: Move CPUClass::write_elf* to SysemuCPUOps | Philippe Mathieu-Daudé | 5 | -13/+11 |
| 2021-05-26 | cpu: Move CPUClass::get_crash_info to SysemuCPUOps | Philippe Mathieu-Daudé | 2 | -2/+2 |
| 2021-05-26 | cpu: Move CPUClass::virtio_is_big_endian to SysemuCPUOps | Philippe Mathieu-Daudé | 2 | -4/+2 |
| 2021-05-26 | cpu: Move CPUClass::vmsd to SysemuCPUOps | Philippe Mathieu-Daudé | 7 | -7/+7 |
| 2021-05-26 | cpu: Introduce SysemuCPUOps structure | Philippe Mathieu-Daudé | 19 | -0/+146 |
| 2021-05-26 | cpu: Move AVR target vmsd field from CPUClass to DeviceClass | Philippe Mathieu-Daudé | 2 | -3/+3 |
| 2021-05-26 | cpu: Rename CPUClass vmsd -> legacy_vmsd | Philippe Mathieu-Daudé | 8 | -9/+8 |
| 2021-05-26 | cpu: Assert DeviceClass::vmsd is NULL on user emulation | Philippe Mathieu-Daudé | 2 | -3/+6 |
| 2021-05-26 | target/m68k: implement m68k "any instruction" trace mode | Mark Cave-Ayland | 2 | -7/+28 |
| 2021-05-26 | target/m68k: introduce gen_singlestep_exception() function | Mark Cave-Ayland | 1 | -4/+13 |
| 2021-05-26 | target/m68k: call gen_raise_exception() directly if single-stepping in gen_jm... | Mark Cave-Ayland | 1 | -1/+3 |
| 2021-05-26 | target/m68k: introduce is_singlestepping() function | Mark Cave-Ayland | 1 | -4/+15 |
| 2021-05-26 | i386/cpu: Expose AVX_VNNI instruction to guest | Yang Zhong | 2 | -2/+4 |
| 2021-05-25 | target/arm: Enable SVE2 and related extensions | Richard Henderson | 3 | -0/+16 |
| 2021-05-25 | target/arm: Implement integer matrix multiply accumulate | Richard Henderson | 7 | -0/+169 |
| 2021-05-25 | target/arm: Implement aarch32 VSUDOT, VUSDOT | Richard Henderson | 3 | -0/+38 |
| 2021-05-25 | target/arm: Split decode of VSDOT and VUDOT | Richard Henderson | 2 | -11/+28 |
| 2021-05-25 | target/arm: Split out do_neon_ddda | Richard Henderson | 1 | -52/+38 |
| 2021-05-25 | target/arm: Fix decode for VDOT (indexed) | Richard Henderson | 2 | -3/+3 |
| 2021-05-25 | target/arm: Remove unused fpst from VDOT_scalar | Richard Henderson | 1 | -3/+0 |
| 2021-05-25 | target/arm: Split out do_neon_ddda_fpst | Richard Henderson | 1 | -55/+43 |
| 2021-05-25 | target/arm: Implement aarch64 SUDOT, USDOT | Richard Henderson | 2 | -0/+30 |
| 2021-05-25 | target/arm: Implement SVE2 fp multiply-add long | Stephen Long | 4 | -0/+141 |
| 2021-05-25 | target/arm: Move endian adjustment macros to vec_internal.h | Richard Henderson | 3 | -28/+24 |
| 2021-05-25 | target/arm: Implement SVE2 bitwise shift immediate | Stephen Long | 4 | -0/+133 |
| 2021-05-25 | target/arm: Implement 128-bit ZIP, UZP, TRN | Richard Henderson | 4 | -8/+90 |
| 2021-05-25 | target/arm: Implement SVE2 LD1RO | Richard Henderson | 2 | -0/+97 |
| 2021-05-25 | target/arm: Tidy do_ldrq | Richard Henderson | 1 | -9/+4 |
| 2021-05-25 | target/arm: Share table of sve load functions | Richard Henderson | 1 | -128/+126 |
| 2021-05-25 | target/arm: Implement SVE2 FLOGB | Stephen Long | 4 | -0/+119 |
| 2021-05-25 | target/arm: Implement SVE2 FCVTXNT, FCVTX | Stephen Long | 2 | -10/+41 |
| 2021-05-25 | target/arm: Implement SVE2 FCVTLT | Stephen Long | 4 | -0/+46 |
| 2021-05-25 | target/arm: Implement SVE2 FCVTNT | Richard Henderson | 4 | -0/+45 |
| 2021-05-25 | target/arm: Implement SVE2 TBL, TBX | Stephen Long | 4 | -19/+119 |
| 2021-05-25 | target/arm: Implement SVE2 crypto constructive binary operations | Richard Henderson | 3 | -0/+25 |
| 2021-05-25 | target/arm: Implement SVE2 crypto destructive binary operations | Richard Henderson | 3 | -0/+50 |
| 2021-05-25 | target/arm: Implement SVE2 crypto unary operations | Richard Henderson | 2 | -0/+17 |
| 2021-05-25 | target/arm: Implement SVE mixed sign dot product | Richard Henderson | 4 | -0/+22 |
| 2021-05-25 | target/arm: Implement SVE mixed sign dot product (indexed) | Richard Henderson | 5 | -0/+31 |
| 2021-05-25 | target/arm: Macroize helper_gvec_{s,u}dot_idx_{b,h} | Richard Henderson | 1 | -131/+29 |
| 2021-05-25 | target/arm: Macroize helper_gvec_{s,u}dot_{b,h} | Richard Henderson | 1 | -64/+22 |
