index
:
riscv-gnu-toolchain/qemu.git
block
master
stable-0.10
stable-0.11
stable-0.12
stable-0.13
stable-0.14
stable-0.15
stable-1.0
stable-1.1
stable-1.2
stable-1.3
stable-1.4
stable-1.5
stable-1.6
stable-1.7
stable-2.0
stable-2.1
stable-2.10
stable-2.11
stable-2.12
stable-2.2
stable-2.3
stable-2.4
stable-2.5
stable-2.6
stable-2.7
stable-2.8
stable-2.9
stable-3.0
stable-3.1
stable-4.0
stable-4.1
stable-4.2
stable-5.0
stable-6.0
stable-6.1
stable-7.2
stable-8.0
stable-8.1
stable-8.2
stable-9.0
stable-9.1
stable-9.2
staging
staging-7.2
staging-8.0
staging-8.1
staging-8.2
staging-9.0
staging-9.1
staging-9.2
Unnamed repository; edit this file 'description' to name the repository.
root
about
summary
refs
log
tree
commit
diff
log msg
author
committer
range
path:
root
/
target
Age
Commit message (
Expand
)
Author
Files
Lines
2021-03-06
KVM: x86: do not fail if software breakpoint has already been removed
Paolo Bonzini
1
-2
/
+7
2021-03-02
Merge remote-tracking branch 'remotes/bonzini-gitlab/tags/for-upstream' into ...
Peter Maydell
3
-3
/
+6
2021-02-25
tcg/i386: rdpmc: fix the the condtions
Zheng Zhan Liang
1
-1
/
+2
2021-02-25
target/i386: Add bus lock debug exception support
Chenyi Qiang
2
-1
/
+3
2021-02-25
target/i386: update to show preferred boolean syntax for -cpu
Daniel P. Berrangé
1
-1
/
+1
2021-02-22
target/cris: Plug leakage of TCG temporaries
Stefan Sandstrom
2
-59
/
+135
2021-02-22
target/cris: Let cris_mmu_translate() use MMUAccessType access_type
Philippe Mathieu-Daudé
2
-13
/
+13
2021-02-22
target/cris: Use MMUAccessType enum type when possible
Philippe Mathieu-Daudé
2
-9
/
+8
2021-02-21
Merge remote-tracking branch 'remotes/philmd-gitlab/tags/mips-20210221' into ...
Peter Maydell
7
-122
/
+123
2021-02-21
target/mips: Use GPR move functions in gen_HILO1_tx79()
Philippe Mathieu-Daudé
1
-17
/
+4
2021-02-21
target/mips: Introduce gen_load_gpr_hi() / gen_store_gpr_hi() helpers
Philippe Mathieu-Daudé
2
-0
/
+22
2021-02-21
target/mips: Rename 128-bit upper halve GPR registers
Philippe Mathieu-Daudé
1
-1
/
+3
2021-02-21
target/mips: Promote 128-bit multimedia registers as global ones
Philippe Mathieu-Daudé
3
-27
/
+34
2021-02-21
target/mips: Make cpu_HI/LO registers public
Philippe Mathieu-Daudé
2
-1
/
+2
2021-02-21
target/mips: Include missing "tcg/tcg.h" header
Philippe Mathieu-Daudé
1
-0
/
+1
2021-02-21
target/mips: Remove unused 'rw' argument from page_table_walk_refill()
Philippe Mathieu-Daudé
1
-3
/
+3
2021-02-21
target/mips: Let CPUMIPSTLBContext::map_address() take MMUAccessType
Philippe Mathieu-Daudé
2
-10
/
+10
2021-02-21
target/mips: Let get_seg*_physical_address() take MMUAccessType arg
Philippe Mathieu-Daudé
1
-5
/
+6
2021-02-21
target/mips: Let get_physical_address() take MMUAccessType argument
Philippe Mathieu-Daudé
1
-10
/
+10
2021-02-21
target/mips: Let raise_mmu_exception() take MMUAccessType argument
Philippe Mathieu-Daudé
1
-5
/
+5
2021-02-21
target/mips: Let cpu_mips_translate_address() take MMUAccessType arg
Philippe Mathieu-Daudé
2
-4
/
+4
2021-02-21
target/mips: Let do_translate_address() take MMUAccessType argument
Philippe Mathieu-Daudé
1
-3
/
+4
2021-02-21
target/mips: Replace magic value by MMU_DATA_LOAD definition
Philippe Mathieu-Daudé
2
-2
/
+2
2021-02-21
target/mips: Remove unused MMU definitions
Philippe Mathieu-Daudé
1
-16
/
+0
2021-02-21
target/mips: Remove access_type argument from get_physical_address()
Philippe Mathieu-Daudé
1
-13
/
+9
2021-02-21
target/mips: Remove access_type arg from get_segctl_physical_address()
Philippe Mathieu-Daudé
1
-10
/
+10
2021-02-21
target/mips: Remove access_type argument from get_seg_physical_address
Philippe Mathieu-Daudé
1
-3
/
+3
2021-02-21
target/mips: Remove access_type argument from map_address() handler
Philippe Mathieu-Daudé
2
-12
/
+11
2021-02-21
target/mips: fetch code with translator_ld
Philippe Mathieu-Daudé
1
-10
/
+10
2021-02-20
target/avr/cpu: Use device_class_set_parent_realize()
Philippe Mathieu-Daudé
1
-3
/
+1
2021-02-18
i386: Add the support for AMD EPYC 3rd generation processors
Babu Moger
2
-1
/
+110
2021-02-18
Hexagon build infrastructure
Taylor Simpson
2
-0
/
+192
2021-02-18
Hexagon (target/hexagon) translation
Taylor Simpson
2
-0
/
+841
2021-02-18
Hexagon (target/hexagon) TCG for floating point instructions
Taylor Simpson
1
-0
/
+121
2021-02-18
Hexagon (target/hexagon) TCG for instructions with multiple definitions
Taylor Simpson
1
-0
/
+198
2021-02-18
Hexagon (target/hexagon) TCG generation
Taylor Simpson
2
-0
/
+356
2021-02-18
Hexagon (target/hexagon) instruction classes
Taylor Simpson
3
-0
/
+174
2021-02-18
Hexagon (target/hexagon) macros
Taylor Simpson
1
-0
/
+592
2021-02-18
Hexagon (target/hexagon) opcode data structures
Taylor Simpson
2
-0
/
+200
2021-02-18
Hexagon (target/hexagon) generater phase 4 - decode tree
Taylor Simpson
1
-0
/
+351
2021-02-18
Hexagon (target/hexagon) generator phase 3 - C preprocessor for decode tree
Taylor Simpson
1
-0
/
+188
2021-02-18
Hexagon (target/hexagon) generator phase 2 - generate header files
Taylor Simpson
10
-0
/
+1565
2021-02-18
Hexagon (target/hexagon) generator phase 1 - C preprocessor for semantics
Taylor Simpson
1
-0
/
+88
2021-02-18
Hexagon (target/hexagon/imported) arch import
Taylor Simpson
14
-0
/
+9236
2021-02-18
Hexagon (target/hexagon/fma_emu.[ch]) utility functions
Taylor Simpson
2
-0
/
+738
2021-02-18
Hexagon (target/hexagon/conv_emu.[ch]) utility functions
Taylor Simpson
2
-0
/
+208
2021-02-18
Hexagon (target/hexagon/arch.[ch]) utility functions
Taylor Simpson
2
-0
/
+334
2021-02-18
Hexagon (target/hexagon) instruction printing
Taylor Simpson
2
-0
/
+173
2021-02-18
Hexagon (target/hexagon) instruction/packet decode
Taylor Simpson
2
-0
/
+989
2021-02-18
Hexagon (target/hexagon) instruction attributes
Taylor Simpson
2
-0
/
+132
[next]