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2018-06-01WHPX: fix some compiler warningsLucian Petrut1-14/+35
2018-06-01WHPX: dynamically load WHP librariesLucian Petrut1-68/+144
2018-06-01nios2: do not include exec-all.h from cpu.hPaolo Bonzini2-1/+1
2018-06-01target: Do not include "exec/exec-all.h" if it is not necessaryPhilippe Mathieu-Daudé33-33/+0
2018-05-31target/hppa: Include "qemu/log.h" to use qemu_log()Philippe Mathieu-Daudé1-0/+1
2018-05-31target/ppc: Include "exec/exec-all.h" which provides tlb_flush()Philippe Mathieu-Daudé1-0/+1
2018-05-31target/xtensa: Include "qemu/timer.h" to use NANOSECONDS_PER_SECONDPhilippe Mathieu-Daudé1-0/+1
2018-05-31target/i386: Do not include "exec/ioport.h" if it is not necessaryPhilippe Mathieu-Daudé4-4/+0
2018-05-31target: Do not include "exec/address-spaces.h" if it is not necessaryPhilippe Mathieu-Daudé5-5/+0
2018-05-24Merge remote-tracking branch 'remotes/mst/tags/for_upstream' into stagingPeter Maydell4-13/+3
2018-05-24Merge remote-tracking branch 'remotes/mwalle/tags/lm32-queue/20180521' into s...Peter Maydell1-0/+4
2018-05-23x86/cpu: use standard-headers/asm-x86.kvm_para.hMichael S. Tsirkin4-13/+3
2018-05-21i386: define the AMD 'virt-ssbd' CPUID feature bit (CVE-2018-3639)Konrad Rzeszutek Wilk1-1/+1
2018-05-21i386: Define the Virt SSBD MSR and handling of it (CVE-2018-3639)Konrad Rzeszutek Wilk3-2/+36
2018-05-21i386: define the 'ssbd' CPUID feature bit (CVE-2018-3639)Daniel P. Berrangé2-1/+2
2018-05-21lm32: take BQL before writing IP/IM registerMichael Walle1-0/+4
2018-05-21Merge remote-tracking branch 'remotes/mjt/tags/trivial-patches-fetch' into st...Peter Maydell10-188/+64
2018-05-20Remove unnecessary variables for function return valueLaurent Vivier8-186/+62
2018-05-20tcg: fix s/compliment/complement/ typosEmilio G. Cota2-2/+2
2018-05-18target/xtensa: Honor CPU_DUMP_FPURichard Henderson1-1/+2
2018-05-18target/unicore32: Honor CPU_DUMP_FPURichard Henderson1-1/+3
2018-05-18target/sparc: Honor CPU_DUMP_FPURichard Henderson1-7/+10
2018-05-18target/s390x: Honor CPU_DUMP_FPURichard Henderson1-11/+12
2018-05-18target/riscv: Honor CPU_DUMP_FPURichard Henderson1-5/+7
2018-05-18target/ppc: Honor CPU_DUMP_FPURichard Henderson1-7/+13
2018-05-18target/mips: Honor CPU_DUMP_FPURichard Henderson1-1/+2
2018-05-18target/alpha: Honor CPU_DUMP_FPURichard Henderson1-9/+8
2018-05-18target/arm: Implement SVE Permute - Extract GroupRichard Henderson4-0/+124
2018-05-18target/arm: Implement SVE Integer Wide Immediate - Predicated GroupRichard Henderson4-1/+224
2018-05-18target/arm: Implement SVE Bitwise Immediate GroupRichard Henderson2-0/+66
2018-05-18target/arm: Implement SVE Element Count GroupRichard Henderson4-1/+465
2018-05-18target/arm: Implement SVE floating-point trig select coefficientRichard Henderson4-0/+72
2018-05-18target/arm: Implement SVE floating-point exponential acceleratorRichard Henderson4-0/+125
2018-05-18target/arm: Implement SVE Compute Vector Address GroupRichard Henderson4-0/+93
2018-05-18target/arm: Implement SVE Bitwise Shift - Unpredicated GroupRichard Henderson4-0/+153
2018-05-18target/arm: Implement SVE Stack Allocation GroupRichard Henderson2-0/+39
2018-05-18target/arm: Implement SVE Index Generation GroupRichard Henderson4-0/+138
2018-05-18target/arm: Implement SVE Integer Arithmetic - Unpredicated GroupRichard Henderson2-0/+47
2018-05-18target/arm: Implement SVE Integer Multiply-Add GroupRichard Henderson4-0/+126
2018-05-18target/arm: Implement SVE Integer Arithmetic - Unary Predicated GroupRichard Henderson4-0/+323
2018-05-18target/arm: Implement SVE bitwise shift by wide elements (predicated)Richard Henderson4-0/+86
2018-05-18target/arm: Implement SVE bitwise shift by vector (predicated)Richard Henderson4-0/+64
2018-05-18target/arm: Implement SVE bitwise shift by immediate (predicated)Richard Henderson4-0/+445
2018-05-18target/arm: Implement SVE Integer Reduction GroupRichard Henderson4-0/+225
2018-05-18target/arm: Implement SVE Integer Binary Arithmetic - Predicated GroupRichard Henderson4-0/+449
2018-05-18target/arm: Implement SVE Predicate Misc GroupRichard Henderson5-0/+331
2018-05-18target/arm: Implement SVE Predicate Logical Operations GroupRichard Henderson5-1/+429
2018-05-18target/arm: Implement SVE predicate testRichard Henderson6-1/+171
2018-05-18target/arm: Implement SVE load vector/predicateRichard Henderson2-0/+147
2018-05-18target/arm: Implement SVE Bitwise Logical - Unpredicated GroupRichard Henderson1-8/+47