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2019-06-10target/lm32: Use env_cpu, env_archcpuRichard Henderson4-22/+10
2019-06-10target/i386: Use env_cpu, env_archcpuRichard Henderson10-54/+43
2019-06-10target/hppa: Use env_cpu, env_archcpuRichard Henderson5-20/+10
2019-06-10target/cris: Use env_cpu, env_archcpuRichard Henderson4-15/+5
2019-06-10target/cris: Reindent op_helper.cRichard Henderson1-450/+429
2019-06-10target/cris: Reindent mmu.cRichard Henderson1-267/+262
2019-06-10target/arm: Use env_cpu, env_archcpuRichard Henderson9-84/+78
2019-06-10target/alpha: Use env_cpu, env_archcpuRichard Henderson3-14/+7
2019-06-10cpu: Replace ENV_GET_CPU with env_cpuRichard Henderson34-124/+90
2019-06-10cpu: Define ArchCPURichard Henderson21-0/+21
2019-06-10cpu: Define CPUArchState with typedefRichard Henderson21-53/+43
2019-06-10tcg: Create struct CPUTLBRichard Henderson1-1/+1
2019-06-10tcg: Split out target/arch/cpu-param.hRichard Henderson44-332/+523
2019-06-07s390x/tcg: Use tcg_gen_gvec_bitsel for VECTOR SELECTRichard Henderson1-32/+6
2019-06-07s390x: Bump the "qemu" CPU model up to a stripped-down z13David Hildenbrand2-6/+9
2019-06-07s390x/tcg: We support the Vector FacilityDavid Hildenbrand1-0/+1
2019-06-07s390x/tcg: Allow linux-user to use vector instructionsDavid Hildenbrand1-0/+3
2019-06-07s390x/tcg: Implement VECTOR FP TEST DATA CLASS IMMEDIATEDavid Hildenbrand4-0/+62
2019-06-07s390x/tcg: Implement VECTOR FP SUBTRACTDavid Hildenbrand4-0/+24
2019-06-07s390x/tcg: Implement VECTOR FP SQUARE ROOTDavid Hildenbrand4-0/+40
2019-06-07s390x/tcg: Implement VECTOR FP PERFORM SIGN OPERATIONDavid Hildenbrand2-0/+54
2019-06-07s390x/tcg: Implement VECTOR FP MULTIPLY AND (ADD|SUBTRACT)David Hildenbrand4-0/+79
2019-06-07s390x/tcg: Implement VECTOR FP MULTIPLYDavid Hildenbrand4-0/+24
2019-06-07s390x/tcg: Implement VECTOR LOAD ROUNDEDDavid Hildenbrand4-0/+50
2019-06-07s390x/tcg: Implement VECTOR LOAD LENGTHENEDDavid Hildenbrand4-0/+58
2019-06-07s390x/tcg: Implement VECTOR LOAD FP INTEGERDavid Hildenbrand4-0/+30
2019-06-07s390x/tcg: Implement VECTOR FP DIVIDEDavid Hildenbrand4-0/+24
2019-06-07s390x/tcg: Implement VECTOR FP CONVERT TO LOGICAL 64-BITDavid Hildenbrand4-0/+30
2019-06-07s390x/tcg: Implement VECTOR FP CONVERT TO FIXED 64-BITDavid Hildenbrand4-0/+30
2019-06-07s390x/tcg: Implement VECTOR FP CONVERT FROM LOGICAL 64-BITDavid Hildenbrand4-0/+30
2019-06-07s390x/tcg: Implement VECTOR FP CONVERT FROM FIXED 64-BITDavid Hildenbrand4-0/+76
2019-06-07s390x/tcg: Implement VECTOR FP COMPARE (EQUAL|HIGH|HIGH OR EQUAL)David Hildenbrand4-0/+173
2019-06-07s390x/tcg: Implement VECTOR FP COMPARE (AND SIGNAL) SCALARDavid Hildenbrand4-0/+59
2019-06-07s390x/tcg: Implement VECTOR FP ADDDavid Hildenbrand5-0/+158
2019-06-07s390x/tcg: Export float_comp_to_cc() and float(32|64|128)_dcmask()David Hildenbrand2-2/+6
2019-06-07s390x/tcg: Introduce tcg_s390_vector_exception()David Hildenbrand3-0/+18
2019-06-07s390x/tcg: Store only the necessary amount of doublewords for STFLEDavid Hildenbrand1-1/+7
2019-06-07s390x/tcg: Fix max_byte detection for stfleDavid Hildenbrand1-1/+2
2019-06-07s390x: Use uint64_t for vector registersDavid Hildenbrand8-95/+95
2019-06-07s390x: Align vector registers to 16 bytesDavid Hildenbrand1-1/+1
2019-06-07s390x/tcg: Implement VECTOR STRING RANGE COMPAREDavid Hildenbrand5-0/+237
2019-06-07s390x/tcg: Implement VECTOR ISOLATE STRINGDavid Hildenbrand4-0/+87
2019-06-07s390x/tcg: Implement VECTOR FIND ELEMENT NOT EQUALDavid Hildenbrand5-0/+132
2019-06-07s390x/tcg: Implement VECTOR FIND ELEMENT EQUALDavid Hildenbrand4-0/+96
2019-06-07s390x/tcg: Implement VECTOR FIND ANY ELEMENT EQUALDavid Hildenbrand5-1/+198
2019-06-07target/mips: Unroll loops in helpers for MSA logic instructionsAleksandar Markovic1-4/+40
2019-06-07target/mips: Outline places for future MSA helpersAleksandar Markovic1-0/+461
2019-06-06target/mips: Fix block-comment-related issues in msa_helper.cAleksandar Markovic1-15/+27
2019-06-06target/mips: Fix space-related format issues in msa_helper.cAleksandar Markovic1-14/+14
2019-06-03i386: Enable IA32_MISC_ENABLE MWAIT bit when exposing mwait/monitorWanpeng Li2-0/+4