riscv-gnu-toolchain/qemu.git - Unnamed repository; edit this file 'description' to name the repository.

Age	Commit message (Expand)	Author	Files	Lines
2022-04-22	target/arm: Change CPUArchState.thumb to bool	Richard Henderson	3	-5/+5
2022-04-22	target/arm: Change DisasContext.thumb to bool	Richard Henderson	2	-2/+2
2022-04-22	target/arm: Extend store_cpu_offset to take field size	Richard Henderson	2	-9/+25
2022-04-22	target/arm: Change CPUArchState.aarch64 to bool	Richard Henderson	5	-6/+6
2022-04-22	target/arm: Change DisasContext.aarch64 to bool	Richard Henderson	3	-3/+3
2022-04-22	target/arm: Update SCTLR bits to ARMv9.2	Richard Henderson	1	-0/+14
2022-04-22	target/arm: Update SCR_EL3 bits to ARMv8.8	Richard Henderson	1	-0/+12
2022-04-22	target/arm: Update ISAR fields for ARMv8.8	Richard Henderson	1	-0/+24
2022-04-22	target/arm/cpu.c: ignore VIRQ and VFIQ if no EL2	Peter Maydell	1	-2/+10
2022-04-21	Merge tag 'pull-riscv-to-apply-20220422-1' of github.com:alistair23/qemu into...	Richard Henderson	13	-117/+1061
2022-04-22	target/riscv: cpu: Enable native debug feature	Bin Meng	1	-1/+1
2022-04-22	target/riscv: machine: Add debug state description	Bin Meng	1	-0/+32
2022-04-22	target/riscv: csr: Hook debug CSR read/write	Bin Meng	4	-0/+90
2022-04-22	target/riscv: cpu: Add a config option for native debug	Bin Meng	2	-1/+8
2022-04-22	target/riscv: debug: Implement debug related TCGCPUOps	Bin Meng	3	-0/+82
2022-04-22	hw/intc: Make RISC-V ACLINT mtime MMIO register writable	Frank Chang	2	-6/+6
2022-04-22	target/riscv/pmp: fix NAPOT range computation overflow	Nicolas Pitre	1	-11/+3
2022-04-22	target/riscv: Use cpu_loop_exit_restore directly from mmu faults	Richard Henderson	1	-3/+3
2022-04-22	target/riscv: fix start byte for vmv<nf>r.v when vstart != 0	Weiwei Li	1	-3/+5
2022-04-22	target/riscv: Add isa extenstion strings to the device tree	Atish Patra	1	-0/+60
2022-04-22	target/riscv: misa to ISA string conversion fix	Tsukasa OI	1	-5/+5
2022-04-22	target/riscv: optimize helper for vmv<nr>r.v	Weiwei Li	3	-33/+18
2022-04-22	target/riscv: optimize condition assign for scale < 0	Weiwei Li	1	-5/+3
2022-04-22	target/riscv: Add initial support for the Sdtrig extension	Bin Meng	4	-0/+453
2022-04-22	target/riscv: Allow software access to MIP SEIP	Alistair Francis	3	-3/+23
2022-04-22	target/riscv: cpu: Fixup indentation	Alistair Francis	1	-10/+10
2022-04-22	target/riscv: Enable privileged spec version 1.12	Atish Patra	2	-3/+10
2022-04-22	target/riscv: Add envcfg CSRs support	Atish Patra	4	-0/+174
2022-04-22	target/riscv: Add support for mconfigptr	Atish Patra	2	-0/+3
2022-04-22	target/riscv: Introduce privilege version field in the CSR ops.	Atish Patra	2	-35/+70
2022-04-22	target/riscv: Add the privileged spec version 1.12.0	Atish Patra	1	-0/+1
2022-04-22	target/riscv: Define simpler privileged spec version numbering	Atish Patra	1	-2/+5
2022-04-21	Merge tag 'pull-rx-20220421' of https://gitlab.com/rth7680/qemu into staging	Richard Henderson	3	-32/+39
2022-04-21	target/rx: update PC correctly in wait instruction	Tomoaki Kawada	1	-1/+1
2022-04-21	target/rx: set PSW.I when executing wait instruction	Tomoaki Kawada	1	-0/+1
2022-04-21	target/rx: Swap stack pointers on clrpsw/setpsw instruction	Richard Henderson	1	-1/+6
2022-04-21	target/rx: Move DISAS_UPDATE check for write to PSW	Richard Henderson	1	-10/+4
2022-04-21	target/rx: Store PSW.U in tb->flags	Richard Henderson	2	-19/+24
2022-04-21	target/rx: Put tb_flags into DisasContext	Richard Henderson	1	-1/+3
2022-04-21	Merge tag 'misc-pull-request' of gitlab.com:marcandre.lureau/qemu into staging	Richard Henderson	34	-149/+160
2022-04-21	compiler.h: replace QEMU_NORETURN with G_NORETURN	Marc-André Lureau	34	-149/+160
2022-04-20	Merge tag 'pull-ppc-20220420-2' of https://gitlab.com/danielhb/qemu into staging	Richard Henderson	7	-2/+70
2022-04-20	Merge tag 'pull-tcg-20220420' of https://gitlab.com/rth7680/qemu into staging	Richard Henderson	3	-3/+0
2022-04-20	target/ppc: Add two missing register callbacks on POWER10	Frederic Barrat	1	-0/+2
2022-04-20	target/ppc: implement xscvqp[su]qz	Matheus Ferst	4	-0/+27
2022-04-20	target/ppc: implement xscv[su]qqp	Matheus Ferst	4	-0/+39
2022-04-20	target/ppc: Improve KVM hypercall trace	Fabiano Rosas	2	-2/+2
2022-04-20	Merge tag 'pull-log-20220420' of https://gitlab.com/rth7680/qemu into staging	Richard Henderson	22	-88/+99
2022-04-20	Don't include sysemu/tcg.h if it is not necessary	Thomas Huth	3	-3/+0
2022-04-20	target/nios2: Remove log_cpu_state from reset	Richard Henderson	1	-5/+0