riscv-gnu-toolchain/qemu.git - Unnamed repository; edit this file 'description' to name the repository.

Age	Commit message (Expand)	Author	Files	Lines
2017-02-24	Merge remote-tracking branch 'remotes/dgibson/tags/ppc-for-2.9-20170222' into...	Peter Maydell	13	-35/+615
2017-02-23	Merge remote-tracking branch 'remotes/yongbok/tags/mips-20170222' into staging	Peter Maydell	2	-0/+11
2017-02-22	hw/ppc/spapr: Check for valid page size when hot plugging memory	Thomas Huth	2	-4/+35
2017-02-22	target-ppc: fix Book-E TLB matching	Alex Zuepke	1	-1/+1
2017-02-22	target/ppc/POWER9: Direct all instr and data storage interrupts to the hypv	Suraj Jitindar Singh	1	-2/+18
2017-02-22	target/ppc/POWER9: Adapt LPCR handling for POWER9	Suraj Jitindar Singh	3	-6/+44
2017-02-22	target/ppc/POWER9: Add ISAv3.00 MMU definition	Suraj Jitindar Singh	3	-3/+7
2017-02-22	target/ppc: Fix LPCR DPFD mask define	Suraj Jitindar Singh	1	-1/+1
2017-02-22	target-ppc: Add xscvqpudz and xscvqpuwz instructions	Bharata B Rao	4	-0/+8
2017-02-22	target-ppc: Implement round to odd variants of quad FP instructions	Bharata B Rao	2	-23/+21
2017-02-22	target-ppc: add wait instruction	Nikunj A Dadhania	1	-0/+1
2017-02-22	target-ppc: add slbsync implementation	Nikunj A Dadhania	1	-0/+12
2017-02-22	target-ppc: add slbieg instruction	Nikunj A Dadhania	3	-2/+29
2017-02-22	target-ppc: generate exception for copy/paste	Nikunj A Dadhania	1	-0/+15
2017-02-22	target-ppc: implement store atomic instruction	Balamuruhan S	1	-0/+52
2017-02-22	target-ppc: implement load atomic instruction	Balamuruhan S	2	-0/+61
2017-02-22	target-ppc: Add xsmaxjdp and xsminjdp instructions	Bharata B Rao	4	-0/+61
2017-02-22	target-ppc: Add xsmaxcdp and xsmincdp instructions	Bharata B Rao	4	-0/+44
2017-02-22	ppc: implement xssubqp instruction	Jose Ricardo Ziviani	4	-0/+37
2017-02-22	ppc: implement xssqrtqp instruction	Jose Ricardo Ziviani	4	-0/+41
2017-02-22	ppc: implement xsrqpxp instruction	Jose Ricardo Ziviani	4	-0/+59
2017-02-22	ppc: implement xsrqpi[x] instruction	Jose Ricardo Ziviani	5	-0/+75
2017-02-21	target-mips: Provide function to test if a CPU supports an ISA	Paul Burton	2	-0/+11
2017-02-21	monitor: Fix crashes when using HMP commands without CPU	Thomas Huth	5	-1/+32
2017-02-16	target-i386: correctly propagate retaddr into SVM helpers	Paolo Bonzini	6	-57/+55
2017-02-16	report guest crash information in GUEST_PANICKED event	Anton Nefedov	2	-2/+3
2017-02-16	i386/cpu: add crash-information QOM property	Anton Nefedov	1	-0/+50
2017-02-14	Merge remote-tracking branch 'remotes/rth/tags/pull-or-20170214' into staging	Peter Maydell	14	-939/+857
2017-02-14	target/openrisc: Optimize for r0 being zero	Richard Henderson	3	-23/+66
2017-02-14	target/openrisc: Tidy handling of delayed branches	Richard Henderson	5	-35/+25
2017-02-14	target/openrisc: Tidy ppc/npc implementation	Richard Henderson	6	-55/+39
2017-02-14	target/openrisc: Optimize l.jal to next	Richard Henderson	1	-1/+5
2017-02-14	target/openrisc: Fix madd	Richard Henderson	4	-61/+30
2017-02-14	target/openrisc: Implement muld, muldu, macu, msbu	Richard Henderson	1	-0/+108
2017-02-14	target/openrisc: Represent MACHI:MACLO as a single unit	Richard Henderson	4	-61/+80
2017-02-14	target/openrisc: Implement msync	Richard Henderson	1	-0/+1
2017-02-14	target/openrisc: Enable trap, csync, msync, psync for user mode	Richard Henderson	1	-32/+0
2017-02-14	target/openrisc: Set flags on helpers	Richard Henderson	1	-12/+12
2017-02-14	target/openrisc: Use movcond where appropriate	Richard Henderson	1	-14/+14
2017-02-14	target/openrisc: Keep SR_CY and SR_OV in a separate variables	Richard Henderson	4	-89/+78
2017-02-14	target/openrisc: Keep SR_F in a separate variable	Richard Henderson	7	-74/+96
2017-02-14	target/openrisc: Invert the decoding in dec_calc	Richard Henderson	1	-207/+95
2017-02-14	target/openrisc: Put SR[OVE] in TB flags	Richard Henderson	3	-12/+18
2017-02-14	target/openrisc: Streamline arithmetic and OVE	Richard Henderson	5	-314/+191
2017-02-14	target/openrisc: Rationalize immediate extraction	Richard Henderson	1	-58/+40
2017-02-14	target/openrisc: Tidy insn dumping	Richard Henderson	1	-24/+12
2017-02-14	target/openrisc: Implement lwa, swa	Richard Henderson	7	-8/+81
2017-02-14	target/openrisc: Fix exception handling status registers	Stafford Horne	1	-0/+7
2017-02-14	target/openrisc: Rename the cpu from or32 to or1k	Richard Henderson	1	-1/+1
2017-02-13	migration: consolidate VMStateField.start	Halil Pasic	1	-1/+1