riscv-gnu-toolchain/qemu.git - Unnamed repository; edit this file 'description' to name the repository.

Age	Commit message (Expand)	Author	Files	Lines
2021-02-11	m68k: add MSP detection support for stack pointer swap helpers	Lucien Murray-Pitts	3	-2/+11
2021-02-11	m68k: MOVEC insn. should generate exception if wrong CR is accessed	Lucien Murray-Pitts	4	-46/+146
2021-02-11	m68k: add missing BUSCR/PCR CR defines, and BUSCR/PCR/CAAR CR to m68k_move_to...	Lucien Murray-Pitts	2	-0/+14
2021-02-11	m68k: improve comments on m68k_move_to/from helpers	Lucien Murray-Pitts	1	-9/+30
2021-02-11	m68k: cascade m68k_features by m680xx_cpu_initfn() to improve readability	Lucien Murray-Pitts	2	-34/+39
2021-02-11	m68k: improve cpu instantiation comments	Lucien Murray-Pitts	2	-20/+73
2021-02-05	accel: replace struct CpusAccel with AccelOpsClass	Claudio Fontana	17	-46/+86
2021-02-05	accel: extend AccelState and AccelClass to user-mode	Claudio Fontana	5	-5/+5
2021-02-05	cpu: tcg_ops: move to tcg-cpu-ops.h, keep a pointer in CPUClass	Claudio Fontana	28	-180/+416
2021-02-05	cpu: move debug_check_watchpoint to tcg_ops	Claudio Fontana	1	-2/+2
2021-02-05	cpu: move adjust_watchpoint_address to tcg_ops	Claudio Fontana	1	-1/+1
2021-02-05	cpu: move do_unaligned_access to tcg_ops	Claudio Fontana	13	-13/+16
2021-02-05	cpu: move cc->transaction_failed to tcg_ops	Claudio Fontana	10	-12/+14
2021-02-05	cpu: move cc->do_interrupt to tcg_ops	Claudio Fontana	25	-38/+37
2021-02-05	target/arm: do not use cc->do_interrupt for KVM directly	Claudio Fontana	2	-4/+6
2021-02-05	cpu: Move debug_excp_handler to tcg_ops	Eduardo Habkost	5	-5/+5
2021-02-05	cpu: Move tlb_fill to tcg_ops	Eduardo Habkost	23	-23/+23
2021-02-05	cpu: Move cpu_exec_* to tcg_ops	Eduardo Habkost	23	-30/+42
2021-02-05	cpu: Move synchronize_from_tb() to tcg_ops	Eduardo Habkost	11	-11/+15
2021-02-05	target/riscv: remove CONFIG_TCG, as it is always TCG	Claudio Fontana	1	-2/+1
2021-02-05	cpu: Introduce TCGCpuOperations struct	Eduardo Habkost	23	-28/+28
2021-01-29	Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20210129-...	Peter Maydell	3	-9/+21
2021-01-29	target/arm: Replace magic value by MMU_DATA_LOAD definition	Philippe Mathieu-Daudé	1	-1/+1
2021-01-29	target/arm: Conditionalize DBGDIDR	Richard Henderson	1	-6/+15
2021-01-29	target/arm: Implement ID_PFR2	Richard Henderson	3	-2/+5
2021-01-29	Merge remote-tracking branch 'remotes/vivier2/tags/trivial-branch-for-6.0-pul...	Peter Maydell	1	-6/+6
2021-01-29	target/rx: Fix compiler errors for build with sanitizers	Stefan Weil	1	-6/+6
2021-01-28	qapi: Use QAPI_LIST_APPEND in trivial cases	Eric Blake	1	-16/+8
2021-01-27	target/microblaze: Add security attributes on memory transactions	Joe Komlodi	3	-5/+26
2021-01-27	target/microblaze: use MMUAccessType instead of int in mmu_translate	Joe Komlodi	2	-2/+2
2021-01-27	target/microblaze: Add use-non-secure property	Joe Komlodi	2	-0/+57
2021-01-23	Merge remote-tracking branch 'remotes/bonzini-gitlab/tags/for-upstream' into ...	Peter Maydell	1	-0/+1
2021-01-21	x86/cpu: Use max host physical address if -cpu max option is applied	Yang Weijiang	1	-0/+1
2021-01-21	s390x: Use strpadcpy for copying vm name	Miroslav Rezanina	2	-9/+10
2021-01-21	s390x/tcg: Ignore register content if b1/b2 is zero when handling EXECUTE	David Hildenbrand	1	-2/+2
2021-01-21	s390x/tcg: Don't ignore content in r0 when not specified via "b" or "x"	David Hildenbrand	2	-10/+13
2021-01-21	s390x/tcg: Fix RISBHG	David Hildenbrand	1	-10/+8
2021-01-21	s390x/tcg: Fix ALGSI	David Hildenbrand	1	-1/+1
2021-01-19	target/arm/m_helper: Silence GCC 10 maybe-uninitialized error	Philippe Mathieu-Daudé	1	-1/+1
2021-01-19	target/arm: Update REV, PUNPK for pred_desc	Richard Henderson	2	-13/+8
2021-01-19	target/arm: Update ZIP, UZP, TRN for pred_desc	Richard Henderson	2	-17/+13
2021-01-19	target/arm: Update PFIRST, PNEXT for pred_desc	Richard Henderson	2	-6/+7
2021-01-19	target/arm: Introduce PREDDESC field definitions	Richard Henderson	1	-0/+9
2021-01-19	target/arm: refactor vae1_tlbmask()	Rémi Denis-Courmont	1	-14/+11
2021-01-19	target/arm: enable Secure EL2 in max CPU	Rémi Denis-Courmont	1	-0/+1
2021-01-19	target/arm: Implement SCR_EL2.EEL2	Rémi Denis-Courmont	4	-8/+36
2021-01-19	target/arm: revector to run-time pick target EL	Rémi Denis-Courmont	1	-2/+21
2021-01-19	target/arm: set HPFAR_EL2.NS on secure stage 2 faults	Rémi Denis-Courmont	4	-0/+13
2021-01-19	target/arm: secure stage 2 translation regime	Rémi Denis-Courmont	3	-25/+81
2021-01-19	target/arm: generalize 2-stage page-walk condition	Rémi Denis-Courmont	1	-7/+6