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2021-02-15target/ppc: Drop use of gdb_get_float64() and ldfq_p()Peter Maydell2-6/+6
2021-02-15target/m68k: Drop use of gdb_get_float64() and ldfq_p()Peter Maydell1-3/+2
2021-02-15target/sh4: Drop use of gdb_get_float32() and ldfl_p()Peter Maydell1-4/+4
2021-02-13Merge remote-tracking branch 'remotes/vivier/tags/m68k-for-6.0-pull-request' ...Peter Maydell4-107/+309
2021-02-11m68k: add MSP detection support for stack pointer swap helpersLucien Murray-Pitts3-2/+11
2021-02-11m68k: MOVEC insn. should generate exception if wrong CR is accessedLucien Murray-Pitts4-46/+146
2021-02-11m68k: add missing BUSCR/PCR CR defines, and BUSCR/PCR/CAAR CR to m68k_move_to...Lucien Murray-Pitts2-0/+14
2021-02-11m68k: improve comments on m68k_move_to/from helpersLucien Murray-Pitts1-9/+30
2021-02-11m68k: cascade m68k_features by m680xx_cpu_initfn() to improve readabilityLucien Murray-Pitts2-34/+39
2021-02-11m68k: improve cpu instantiation commentsLucien Murray-Pitts2-20/+73
2021-02-11target/arm: Correctly initialize MDCR_EL2.HPMNDaniel Müller1-5/+4
2021-02-11target/arm: Set ID_PFR0.DIT to 1 for "max" 32-bit CPURebecca Cran1-0/+4
2021-02-11target/arm: Set ID_AA64PFR0.DIT and ID_PFR0.DIT to 1 for "max" AA64 CPURebecca Cran1-0/+5
2021-02-11target/arm: Support AA32 DIT by moving PSTATE_SS from cpsr into env->pstateRebecca Cran3-18/+42
2021-02-11target/arm: Add support for FEAT_DIT, Data Independent TimingRebecca Cran4-0/+52
2021-02-11target/arm: Fix SCR RES1 handlingMike Nawrocki2-2/+19
2021-02-11target/arm: Don't migrate CPUARMState.featuresAaron Lindsay1-1/+1
2021-02-10target/ppc: Add E500 L2CSR0 write helperBin Meng2-0/+22
2021-02-10target/ppc: Remove unused MMU definitionsPhilippe Mathieu-Daudé1-3/+0
2021-02-08target/i386: Expose VMX entry/exit load pkrs control bitsChenyi Qiang2-2/+4
2021-02-08target/i386: Add support for save/load IA32_PKRS MSRChenyi Qiang1-0/+13
2021-02-08target/i86: implement PKSPaolo Bonzini6-18/+64
2021-02-08target/i386: Fix decoding of certain BMI instructionsDavid Greenaway1-1/+1
2021-02-08x86/cpu: Populate SVM CPUID feature bitsWei Huang2-13/+17
2021-02-08target/i386: do not set LM for 32-bit emulation "-cpu host/max"Paolo Bonzini1-0/+5
2021-02-08spapr: Add PEF based confidential guest supportDavid Gibson2-24/+0
2021-02-08confidential guest support: Move SEV initialization into arch specific codeDavid Gibson2-1/+26
2021-02-08confidential guest support: Introduce cgs "ready" flagDavid Gibson1-0/+2
2021-02-08sev: Add Error ** to sev_kvm_init()David Gibson1-16/+15
2021-02-08confidential guest support: Rework the "memory-encryption" propertyDavid Gibson1-30/+2
2021-02-08sev: Remove false abstraction of flash encryptionDavid Gibson2-10/+19
2021-02-08confidential guest support: Introduce new confidential guest support classDavid Gibson1-2/+3
2021-02-05accel: replace struct CpusAccel with AccelOpsClassClaudio Fontana17-46/+86
2021-02-05accel: extend AccelState and AccelClass to user-modeClaudio Fontana5-5/+5
2021-02-05cpu: tcg_ops: move to tcg-cpu-ops.h, keep a pointer in CPUClassClaudio Fontana28-180/+416
2021-02-05cpu: move debug_check_watchpoint to tcg_opsClaudio Fontana1-2/+2
2021-02-05cpu: move adjust_watchpoint_address to tcg_opsClaudio Fontana1-1/+1
2021-02-05cpu: move do_unaligned_access to tcg_opsClaudio Fontana13-13/+16
2021-02-05cpu: move cc->transaction_failed to tcg_opsClaudio Fontana10-12/+14
2021-02-05cpu: move cc->do_interrupt to tcg_opsClaudio Fontana25-38/+37
2021-02-05target/arm: do not use cc->do_interrupt for KVM directlyClaudio Fontana2-4/+6
2021-02-05cpu: Move debug_excp_handler to tcg_opsEduardo Habkost5-5/+5
2021-02-05cpu: Move tlb_fill to tcg_opsEduardo Habkost23-23/+23
2021-02-05cpu: Move cpu_exec_* to tcg_opsEduardo Habkost23-30/+42
2021-02-05cpu: Move synchronize_from_tb() to tcg_opsEduardo Habkost11-11/+15
2021-02-05target/riscv: remove CONFIG_TCG, as it is always TCGClaudio Fontana1-2/+1
2021-02-05cpu: Introduce TCGCpuOperations structEduardo Habkost23-28/+28
2021-01-29Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20210129-...Peter Maydell3-9/+21
2021-01-29target/arm: Replace magic value by MMU_DATA_LOAD definitionPhilippe Mathieu-Daudé1-1/+1
2021-01-29target/arm: Conditionalize DBGDIDRRichard Henderson1-6/+15
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