| Age | Commit message (Expand) | Author | Files | Lines |
|---|
| 2020-11-09 | target/riscv: Remove the HS_TWO_STAGE flag | Alistair Francis | 4 | -51/+25 |
| 2020-11-09 | target/riscv: Set the virtualised MMU mode when doing hyp accesses | Alistair Francis | 1 | -13/+17 |
| 2020-11-09 | target/riscv: Add a virtualised MMU Mode | Alistair Francis | 3 | -3/+14 |
| 2020-11-04 | Merge remote-tracking branch 'remotes/philmd-gitlab/tags/mips-fixes-20201103'... | Peter Maydell | 11 | -13/+13 |
| 2020-11-03 | target/mips: Add unaligned access support for MIPS64R6 and Loongson-3 | Huacai Chen | 1 | -2/+2 |
| 2020-11-03 | target/mips: Fix Lesser GPL version number | Chetan Pant | 11 | -11/+11 |
| 2020-11-03 | target/riscv/csr.c : add space before the open parenthesis '(' | Xinhao Zhang | 1 | -1/+1 |
| 2020-11-03 | target/riscv: Add V extension state description | Yifei Jiang | 1 | -0/+25 |
| 2020-11-03 | target/riscv: Add H extension state description | Yifei Jiang | 1 | -0/+47 |
| 2020-11-03 | target/riscv: Add PMP state description | Yifei Jiang | 3 | -11/+70 |
| 2020-11-03 | target/riscv: Add basic vmstate description of CPU | Yifei Jiang | 4 | -8/+81 |
| 2020-11-03 | target/riscv: Merge m/vsstatus and m/vsstatush into one uint64_t unit | Yifei Jiang | 6 | -74/+41 |
| 2020-11-02 | target/arm: Get correct MMU index for other-security-state | Peter Maydell | 1 | -1/+2 |
| 2020-11-02 | target/arm: fix LORID_EL1 access check | Rémi Denis-Courmont | 1 | -14/+5 |
| 2020-11-02 | target/arm: fix handling of HCR.FB | Rémi Denis-Courmont | 1 | -3/+2 |
| 2020-11-02 | target/arm: Fix VUDOT/VSDOT (scalar) on big-endian hosts | Peter Maydell | 1 | -2/+2 |
| 2020-11-02 | target/arm: Fix float16 pairwise Neon ops on big-endian hosts | Peter Maydell | 1 | -4/+4 |
| 2020-11-02 | target/arm: Improve do_prewiden_3d | Richard Henderson | 2 | -31/+45 |
| 2020-11-02 | target/arm: Simplify do_long_3d and do_2scalar_long | Richard Henderson | 1 | -14/+9 |
| 2020-11-02 | target/arm: Rename neon_load_reg64 to vfp_load_reg64 | Richard Henderson | 2 | -46/+46 |
| 2020-11-02 | target/arm: Add read/write_neon_element64 | Richard Henderson | 2 | -47/+73 |
| 2020-11-02 | target/arm: Rename neon_load_reg32 to vfp_load_reg32 | Richard Henderson | 2 | -94/+94 |
| 2020-11-02 | target/arm: Expand read/write_neon_element32 to all MemOp | Richard Henderson | 2 | -84/+37 |
| 2020-11-02 | target/arm: Add read/write_neon_element32 | Richard Henderson | 2 | -99/+183 |
| 2020-11-02 | target/arm: Use neon_element_offset in vfp_reg_offset | Richard Henderson | 1 | -9/+4 |
| 2020-11-02 | target/arm: Use neon_element_offset in neon_load/store_reg | Richard Henderson | 1 | -12/+2 |
| 2020-11-02 | target/arm: Move neon_element_offset to translate.c | Richard Henderson | 2 | -19/+20 |
| 2020-11-02 | target/arm: Introduce neon_full_reg_offset | Richard Henderson | 3 | -23/+31 |
| 2020-10-29 | Merge remote-tracking branch 'remotes/dgibson/tags/ppc-for-5.2-20201028' into... | Peter Maydell | 10 | -22/+24 |
| 2020-10-29 | Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20201027-... | Peter Maydell | 2 | -2/+7 |
| 2020-10-28 | Merge remote-tracking branch 'remotes/philmd-gitlab/tags/renesas-20201027' in... | Peter Maydell | 6 | -10/+14 |
| 2020-10-28 | Merge remote-tracking branch 'remotes/vivier2/tags/linux-user-for-5.2-pull-re... | Peter Maydell | 1 | -0/+1 |
| 2020-10-28 | ppc/: fix some comment spelling errors | zhaolichang | 9 | -14/+14 |
| 2020-10-28 | target/ppc: Fix kvmppc_load_htab_chunk() error reporting | Greg Kurz | 2 | -8/+8 |
| 2020-10-28 | spapr: Unrealize vCPUs with qdev_unrealize() | Greg Kurz | 1 | -0/+2 |
| 2020-10-27 | linux-user: Set PAGE_TARGET_1 for TARGET_PROT_BTI | Richard Henderson | 2 | -2/+7 |
| 2020-10-27 | target/rx: Fix Lesser GPL version number | Chetan Pant | 1 | -1/+1 |
| 2020-10-27 | target/rx: Fix some comment spelling errors | Lichang Zhao | 2 | -2/+2 |
| 2020-10-27 | target/sh4: fix some comment spelling errors | Lichang Zhao | 3 | -3/+3 |
| 2020-10-27 | target/sh4: Update coding style to make checkpatch.pl happy | Philippe Mathieu-Daudé | 2 | -6/+10 |
| 2020-10-26 | Merge remote-tracking branch 'remotes/cohuck/tags/s390x-20201026' into staging | Peter Maydell | 4 | -2/+14 |
| 2020-10-26 | target/xtensa: enable all coprocessors for linux-user | Max Filippov | 1 | -0/+1 |
| 2020-10-22 | target/riscv: raise exception to HS-mode at get_physical_address | Yifei Jiang | 2 | -12/+34 |
| 2020-10-22 | target/riscv: Fix implementation of HLVX.WU instruction | Georg Kotheimer | 1 | -3/+3 |
| 2020-10-22 | target/riscv: Fix update of hstatus.GVA in riscv_cpu_do_interrupt | Georg Kotheimer | 1 | -1/+3 |
| 2020-10-22 | target/riscv: Fix update of hstatus.SPVP | Georg Kotheimer | 1 | -1/+1 |
| 2020-10-22 | riscv: Convert interrupt logs to use qemu_log_mask() | Alistair Francis | 2 | -2/+7 |
| 2020-10-22 | s390x: pv: Fix diag318 PV fencing | Janosch Frank | 4 | -2/+14 |
| 2020-10-20 | target/arm: Implement FPSCR.LTPSIZE for M-profile LOB extension | Peter Maydell | 3 | -0/+16 |
| 2020-10-20 | target/arm: Allow M-profile CPUs with FP16 to set FPSCR.FP16 | Peter Maydell | 1 | -19/+28 |
