riscv-gnu-toolchain/qemu.git - Unnamed repository; edit this file 'description' to name the repository.

Age	Commit message (Expand)	Author	Files	Lines
2021-01-12	target/arm: Don't decode insns in the XScale/iWMMXt space as cp insns	Peter Maydell	1	-0/+7
2021-01-12	target/arm: add aarch32 ID register fields to cpu.h	Leif Lindholm	1	-0/+28
2021-01-12	target/arm: add aarch64 ID register fields to cpu.h	Leif Lindholm	1	-0/+15
2021-01-12	target/arm: add descriptions of CLIDR_EL1, CCSIDR_EL1, CTR_EL0 to cpu.h	Leif Lindholm	1	-0/+31
2021-01-12	target/arm: make ARMCPU.ctr 64-bit	Leif Lindholm	1	-1/+1
2021-01-12	target/arm: make ARMCPU.clidr 64-bit	Leif Lindholm	1	-1/+1
2021-01-12	target/arm: fix typo in cpu.h ID_AA64PFR1 field name	Leif Lindholm	1	-1/+1
2021-01-12	target/arm: enable Small Translation tables in max CPU	Rémi Denis-Courmont	1	-0/+1
2021-01-12	target/arm: ARMv8.4-TTST extension	Rémi Denis-Courmont	2	-2/+18
2021-01-08	target/arm: Remove timer_del()/timer_deinit() before timer_free()	Peter Maydell	1	-2/+0
2021-01-08	Remove superfluous timer_del() calls	Peter Maydell	1	-2/+0
2021-01-08	target/arm: Implement Cortex-M55 model	Peter Maydell	1	-0/+42
2021-01-08	target/arm: Implement FPCXT_NS fp system register	Peter Maydell	1	-3/+99
2021-01-08	target/arm: Correct store of FPSCR value via FPCXT_S	Peter Maydell	1	-6/+6
2021-01-08	target/arm: Fix MTE0_ACTIVE	Richard Henderson	1	-1/+1
2021-01-07	tcg: Make tb arg to synchronize_from_tb const	Richard Henderson	11	-11/+21
2021-01-07	tcg: Make DisasContextBase.tb const	Richard Henderson	1	-1/+1
2021-01-06	Merge remote-tracking branch 'remotes/bonzini-gitlab/tags/for-upstream' into ...	Peter Maydell	1	-14/+21
2021-01-04	target/mips: Don't use clock_get_ns() in clock period calculation	Peter Maydell	1	-2/+2
2021-01-02	target/i386: Check privilege level for protected mode 'int N' task gate	Peter Maydell	1	-14/+21
2021-01-01	Merge remote-tracking branch 'remotes/ehabkost-gl/tags/machine-next-pull-requ...	Peter Maydell	1	-7/+2
2021-01-01	Merge remote-tracking branch 'remotes/cohuck-gitlab/tags/s390x-20201222' into...	Peter Maydell	7	-295/+276
2021-01-01	Merge remote-tracking branch 'remotes/armbru/tags/pull-qapi-2020-12-19' into ...	Peter Maydell	15	-64/+27
2020-12-31	Merge remote-tracking branch 'remotes/vivier2/tags/linux-user-for-6.0-pull-re...	Peter Maydell	3	-9/+25
2020-12-30	Merge remote-tracking branch 'remotes/huth-gitlab/tags/pull-request-2020-12-1...	Peter Maydell	4	-4/+9
2020-12-21	target/s390x: Improve SUB LOGICAL WITH BORROW	Richard Henderson	5	-73/+45
2020-12-21	target/s390x: Improve cc computation for SUBTRACT LOGICAL	Richard Henderson	5	-82/+43
2020-12-21	target/s390x: Improve ADD LOGICAL WITH CARRY	Richard Henderson	5	-67/+34
2020-12-21	target/s390x: Improve cc computation for ADD LOGICAL	Richard Henderson	5	-74/+97
2020-12-21	s390x: pv: Fence additional unavailable SCLP facilities for PV guests	Janosch Frank	2	-3/+61
2020-12-19	migration: Replace migration's JSON writer by the general one	Markus Armbruster	9	-18/+18
2020-12-19	qapi: Use QAPI_LIST_PREPEND() where possible	Eric Blake	6	-46/+9
2020-12-18	qdev: Move dev->realized check to qdev_property_set()	Eduardo Habkost	1	-6/+0
2020-12-18	sparc: Use DEFINE_PROP for nwindows property	Eduardo Habkost	1	-1/+2
2020-12-18	linux-user/sparc: Handle tstate in sparc64_get/set_context()	Peter Maydell	2	-8/+21
2020-12-18	linux-user/sparc: Correct sparc64_get/set_context() FPU handling	Peter Maydell	1	-1/+3
2020-12-18	target/sparc/win_helper: silence the compiler warnings	Chen Qun	1	-1/+1
2020-12-18	target/sparc/translate: silence the compiler warnings	Chen Qun	1	-1/+1
2020-12-18	target/i386: silence the compiler warnings in gen_shiftd_rm_T1	Chen Qun	1	-2/+5
2020-12-18	target/unicore32/translate: Add missing fallthrough annotations	Thomas Huth	1	-0/+2
2020-12-17	target/riscv: cpu: Set XLEN independently from target	Alistair Francis	1	-9/+16
2020-12-17	target/riscv: csr: Remove compile time XLEN checks	Alistair Francis	2	-88/+92
2020-12-17	target/riscv: cpu_helper: Remove compile time XLEN checks	Alistair Francis	1	-5/+7
2020-12-17	target/riscv: cpu: Remove compile time XLEN checks	Alistair Francis	1	-9/+10
2020-12-17	target/riscv: Specify the XLEN for CPUs	Alistair Francis	1	-10/+23
2020-12-17	target/riscv: Add a riscv_cpu_is_32bit() helper function	Alistair Francis	2	-0/+11
2020-12-17	target/riscv: fpu_helper: Match function defs in HELPER macros	Alistair Francis	2	-24/+8
2020-12-17	target/riscv: Add a TYPE_RISCV_CPU_BASE CPU	Alistair Francis	1	-0/+6
2020-12-17	target/riscv: Fix definition of MSTATUS_TW and MSTATUS_TSR	Alex Richardson	1	-2/+2
2020-12-17	target/riscv: Fix the bug of HLVX/HLV/HSV	Yifei Jiang	1	-1/+2