riscv-gnu-toolchain/qemu.git - Unnamed repository; edit this file 'description' to name the repository.

Age	Commit message (Expand)	Author	Files	Lines
2019-01-14	i386/kvm: add a comment explaining why .feat_names are commented out for Hype...	Vitaly Kuznetsov	1	-0/+7
2019-01-14	x86: host-phys-bits-limit option	Eduardo Habkost	2	-0/+8
2019-01-14	target/i386: Disable MPX support on named CPU models	Paolo Bonzini	1	-7/+7
2019-01-14	target-i386: Reenable RDTSCP support on Opteron_G[345] CPU models CPU models	Borislav Petkov	1	-7/+4
2019-01-14	i386/kvm: expose HV_CPUID_ENLIGHTMENT_INFO.EAX and HV_CPUID_NESTED_FEATURES.E...	Vitaly Kuznetsov	3	-40/+77
2019-01-14	Merge remote-tracking branch 'remotes/palmer/tags/riscv-for-master-3.2-part2'...	Peter Maydell	7	-609/+933
2019-01-11	avoid TABs in files that only contain a few	Paolo Bonzini	7	-16/+16
2019-01-11	qemu/queue.h: leave head structs anonymous unless necessary	Paolo Bonzini	2	-2/+2
2019-01-11	hax: Support for Linux hosts	Alexandro Sanchez Bach	4	-6/+6
2019-01-09	RISC-V: Implement existential predicates for CSRs	Michael Clark	4	-79/+105
2019-01-09	RISC-V: Implement atomic mip/sip CSR updates	Michael Clark	1	-28/+28
2019-01-09	ppc: replace the 'Object intc' by a 'ICPState icp' pointer under the CPU	Cédric Le Goater	1	-1/+2
2019-01-09	ppc/xive: introduce a XiveTCTX pointer under PowerPCCPU	Cédric Le Goater	1	-0/+2
2019-01-09	target/ppc: replace AVR* macros with Vsr* macros	Mark Cave-Ayland	1	-17/+13
2019-01-09	target/ppc: move FP and VMX registers into aligned vsr register array	Mark Cave-Ayland	12	-70/+149
2019-01-09	target/ppc: merge ppc_vsr_t and ppc_avr_t union types	Mark Cave-Ayland	3	-45/+39
2019-01-09	target/ppc: switch FPR, VMX and VSX helpers to access data directly from cpu_env	Mark Cave-Ayland	2	-45/+18
2019-01-09	target/ppc: introduce get_cpu_vsr{l,h}() and set_cpu_vsr{l,h}() helpers for V...	Mark Cave-Ayland	1	-224/+638
2019-01-09	target/ppc: introduce get_avr64() and set_avr64() helpers for VMX register ac...	Mark Cave-Ayland	2	-33/+124
2019-01-09	target/ppc: introduce get_fpr() and set_fpr() helpers for FP register access	Mark Cave-Ayland	2	-110/+386
2019-01-09	target/ppc: switch EXTRACT_HELPER macros over to use sextract32/extract32	Mark Cave-Ayland	1	-4/+4
2019-01-09	target/ppc: fix typo in SIMM5 extraction helper	Mark Cave-Ayland	1	-1/+1
2019-01-08	RISC-V: Implement modular CSR helper interface	Michael Clark	6	-606/+904
2019-01-08	target/alpha: Fix user-only initialization of fpcr	Richard Henderson	1	-3/+3
2019-01-07	Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20190107'...	Peter Maydell	5	-144/+107
2019-01-07	target/arm: Emit barriers for A32/T32 load-acquire/store-release insns	Peter Maydell	1	-7/+26
2019-01-07	target/arm: SVE brk[ab] merging does not have s bit	Richard Henderson	1	-2/+3
2019-01-07	target/arm: Convert ARM_TBFLAG_* to FIELDs	Richard Henderson	4	-135/+78
2019-01-07	arm: replace instance_post_init()	Marc-André Lureau	4	-10/+49
2019-01-07	qdev-props: remove errp from GlobalProperty	Marc-André Lureau	2	-2/+0
2019-01-04	Merge remote-tracking branch 'remotes/amarkovic/tags/mips-queue-december-2018...	Peter Maydell	1	-126/+883
2019-01-03	target/mips: Support R5900 three-operand MADD1 and MADDU1 instructions	Fredrik Noring	1	-3/+9
2019-01-03	target/mips: Support R5900 three-operand MADD and MADDU instructions	Philippe Mathieu-Daudé	1	-5/+53
2019-01-03	target/mips: MXU: Add handler for an align instruction	Aleksandar Markovic	1	-3/+194
2019-01-03	target/mips: MXU: Add handlers for max/min instructions	Aleksandar Markovic	1	-21/+279
2019-01-03	target/mips: MXU: Add handlers for logic instructions	Aleksandar Markovic	1	-34/+205
2019-01-03	target/mips: MXU: Improve the comment containing MXU overview	Aleksandar Markovic	1	-30/+44
2019-01-03	target/mips: MXU: Add generic naming for optn2 constants	Aleksandar Markovic	1	-0/+5
2019-01-03	target/mips: MXU: Add missing opcodes/decoding for LX* instructions	Aleksandar Markovic	1	-38/+102
2019-01-03	Merge remote-tracking branch 'remotes/palmer/tags/riscv-for-master-3.2-part1'...	Peter Maydell	3	-11/+13
2018-12-21	Changes requirement for "vsubsbs" instruction	Paul A. Clarke	1	-1/+1
2018-12-21	target/ppc: use g_new(T, n) instead of g_malloc(sizeof(T) * n)	Greg Kurz	1	-3/+3
2018-12-21	target/ppc: tcg: Implement addex instruction	Suraj Jitindar Singh	1	-27/+33
2018-12-21	target/ppc: Remove silly GETFIELD/SETFIELD/MASK_TO_LSH macros	David Gibson	1	-12/+0
2018-12-21	target/ppc: fix the PPC_BIT definitions	Cédric Le Goater	1	-3/+3
2018-12-20	riscv/cpu: use device_class_set_parent_realize	Mao Zhongyi	1	-2/+2
2018-12-20	target/riscv/pmp.c: Fix pmp_decode_napot()	Anup Patel	1	-1/+1
2018-12-20	RISC-V: Add hartid and \n to interrupt logging	Michael Clark	1	-8/+10
2018-12-20	Clean up includes	Markus Armbruster	3	-3/+2
2018-12-19	Merge remote-tracking branch 'remotes/vivier2/tags/trivial-patches-pull-reque...	Peter Maydell	1	-2/+0